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authorMarek Vasut <marek.vasut+renesas@gmail.com>2019-08-31 17:33:06 +0200
committerMarek Vasut <marex@denx.de>2019-09-02 17:38:42 +0200
commit6756762024ccacf48e1419a02e0880f337a9030f (patch)
tree350c24841d2d8960394f18a8b4cb7da7039334b5 /arch/sh
parentd7677bfc04920aa5e6a7c886a5095bcd53e0503a (diff)
downloadu-boot-6756762024ccacf48e1419a02e0880f337a9030f.tar.gz
sh: tmu: Fix SH4 TCNT0 offset
Fix the offset of TCNT0 register, which is 0xc on SH4. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'arch/sh')
-rw-r--r--arch/sh/include/asm/config.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/sh/include/asm/config.h b/arch/sh/include/asm/config.h
index df38c82abc..406156dff5 100644
--- a/arch/sh/include/asm/config.h
+++ b/arch/sh/include/asm/config.h
@@ -10,7 +10,7 @@
/* Timer */
#define CONFIG_SYS_TIMER_COUNTS_DOWN
-#define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0x8) /* TCNT0 */
+#define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */
#define CONFIG_SYS_TIMER_RATE (CONFIG_SYS_CLK_FREQ / 4)
#endif