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| author | Simon Glass <sjg@chromium.org> | 2016-01-17 16:11:16 -0700 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2016-01-24 12:08:16 +0800 |
| commit | 655925a9c5bd756140f21dd935d1aca092ab7a01 (patch) | |
| tree | b45efeb3f13f2e2b6279f0b43fdb3f13b1e4e3ea /arch/x86/cpu/ivybridge/cpu.c | |
| parent | e40a6e3f104fc632a66553e29a7ea1d4500e6189 (diff) | |
| download | u-boot-655925a9c5bd756140f21dd935d1aca092ab7a01.tar.gz | |
x86: ivybridge: Move northbridge init into the probe() method
Now that we have a proper driver for the nortbridge, set it up in by probing
it, and move the early init code into the probe() method.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/cpu/ivybridge/cpu.c')
| -rw-r--r-- | arch/x86/cpu/ivybridge/cpu.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c index 2a15fc0220..f32b4a18e1 100644 --- a/arch/x86/cpu/ivybridge/cpu.c +++ b/arch/x86/cpu/ivybridge/cpu.c @@ -243,6 +243,8 @@ int print_cpuinfo(void) } /* Early chipset init required before RAM init can work */ + uclass_first_device(UCLASS_NORTHBRIDGE, &dev); + ret = uclass_first_device(UCLASS_PCH, &dev); if (ret) return ret; |