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author | Simon Glass <sjg@chromium.org> | 2014-11-12 22:42:13 -0700 |
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committer | Simon Glass <sjg@chromium.org> | 2014-11-21 07:34:12 +0100 |
commit | 6e5b12b6144acd83dcfb4a79ea0beff787f3f545 (patch) | |
tree | 2cbf6620bcd926e3de2d4cc0531efc05ee47723e /arch/x86/cpu/ivybridge/cpu.c | |
parent | 7430f1086429fa93e80c3951baac90e1c578898a (diff) | |
download | u-boot-6e5b12b6144acd83dcfb4a79ea0beff787f3f545.tar.gz |
x86: ivybridge: Enable PCI in early init
Enable PCI so we can access devices that need to be set up before relocation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/cpu/ivybridge/cpu.c')
-rw-r--r-- | arch/x86/cpu/ivybridge/cpu.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c index 5863811b8c..ff6b7b3e7a 100644 --- a/arch/x86/cpu/ivybridge/cpu.c +++ b/arch/x86/cpu/ivybridge/cpu.c @@ -12,6 +12,7 @@ #include <common.h> #include <asm/cpu.h> +#include <asm/pci.h> #include <asm/post.h> #include <asm/processor.h> @@ -19,6 +20,7 @@ DECLARE_GLOBAL_DATA_PTR; int arch_cpu_init(void) { + struct pci_controller *hose; int ret; post_code(POST_CPU_INIT); @@ -28,6 +30,10 @@ int arch_cpu_init(void) if (ret) return ret; + ret = pci_early_init_hose(&hose); + if (ret) + return ret; + return 0; } |