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authorSimon Glass <sjg@chromium.org>2019-09-25 08:11:40 -0600
committerBin Meng <bmeng.cn@gmail.com>2019-10-08 13:57:36 +0800
commit12c81b2f4196ed7eb9f2d7d377b34280b1ca26c1 (patch)
treec5f781d1a09b9f58ad35d2cb6c72ab8c27b60d1e /arch/x86/cpu
parentdaade119aa4b49d5ff6b1ebbdfeab0a8775c9344 (diff)
downloadu-boot-12c81b2f4196ed7eb9f2d7d377b34280b1ca26c1.tar.gz
x86: spl: Move broadwell-specific code out of generic x86 spl
When TPL is running, broadwell needs to do different init from SPL. There is no need for this code to be in the generic x86 SPL file, so move it to arch_cpu_init(). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/cpu')
-rw-r--r--arch/x86/cpu/broadwell/cpu.c5
-rw-r--r--arch/x86/cpu/broadwell/cpu_full.c7
2 files changed, 12 insertions, 0 deletions
diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c
index bb7c361408..bba8cd1e94 100644
--- a/arch/x86/cpu/broadwell/cpu.c
+++ b/arch/x86/cpu/broadwell/cpu.c
@@ -67,7 +67,12 @@ int arch_cpu_init(void)
{
post_code(POST_CPU_INIT);
+#ifdef CONFIG_TPL
+ /* Do a mini-init if TPL has already done the full init */
+ return x86_cpu_reinit_f();
+#else
return x86_cpu_init_f();
+#endif
}
int checkcpu(void)
diff --git a/arch/x86/cpu/broadwell/cpu_full.c b/arch/x86/cpu/broadwell/cpu_full.c
index d8b8482658..bd0b2037fa 100644
--- a/arch/x86/cpu/broadwell/cpu_full.c
+++ b/arch/x86/cpu/broadwell/cpu_full.c
@@ -81,6 +81,13 @@ static const u8 power_limit_time_msr_to_sec[] = {
[0x11] = 128,
};
+#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
+int arch_cpu_init(void)
+{
+ return 0;
+}
+#endif
+
/*
* The core 100MHz BLCK is disabled in deeper c-states. One needs to calibrate
* the 100MHz BCLCK against the 24MHz BLCK to restore the clocks properly