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authorPeter Robinson <pbrobinson@gmail.com>2021-07-22 16:20:44 +0100
committerKever Yang <kever.yang@rock-chips.com>2021-08-12 09:33:13 +0800
commit100583473cac1d6dd5c5900f34201db038f9e8dc (patch)
tree4c26700d91fe59c2f5cfd27219961f00d2020e90 /arch
parent27e1b5ee9b3d9b1a5dd92e22d3450929d4a57c49 (diff)
downloadu-boot-100583473cac1d6dd5c5900f34201db038f9e8dc.tar.gz
arm: dts: sync the Rockhip 3368 SoCs from Linux
Sync the rk3368 DTs and associated bits from 5.14-rc1. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/rk3368-geekbox.dts70
-rw-r--r--arch/arm/dts/rk3368-lion-haikou.dts4
-rw-r--r--arch/arm/dts/rk3368-lion.dtsi21
-rw-r--r--arch/arm/dts/rk3368-px5-evb.dts178
-rw-r--r--arch/arm/dts/rk3368.dtsi65
5 files changed, 118 insertions, 220 deletions
diff --git a/arch/arm/dts/rk3368-geekbox.dts b/arch/arm/dts/rk3368-geekbox.dts
index 46cdddfcea..62aa97a0b8 100644
--- a/arch/arm/dts/rk3368-geekbox.dts
+++ b/arch/arm/dts/rk3368-geekbox.dts
@@ -1,43 +1,6 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2016 Andreas Färber
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- * a) This file is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This file is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- * b) Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use,
- * copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following
- * conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
@@ -48,6 +11,10 @@
model = "GeekBox";
compatible = "geekbuying,geekbox", "rockchip,rk3368";
+ aliases {
+ mmc0 = &emmc;
+ };
+
chosen {
stdout-path = "serial2:115200n8";
};
@@ -66,7 +33,7 @@
ir: ir-receiver {
compatible = "gpio-ir-receiver";
- gpios = <&gpio3 30 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio3 RK_PD6 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&ir_int>;
};
@@ -77,7 +44,7 @@
pinctrl-0 = <&pwr_key>;
power {
- gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
label = "GPIO Power";
linux,code = <KEY_POWER>;
wakeup-source;
@@ -87,14 +54,14 @@
leds: gpio-leds {
compatible = "gpio-leds";
- blue {
- gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
+ blue_led: led-0 {
+ gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_HIGH>;
label = "geekbox:blue:led";
default-state = "on";
};
- red {
- gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
+ red_led: led-1 {
+ gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>;
label = "geekbox:red:led";
default-state = "off";
};
@@ -115,10 +82,7 @@
bus-width = <8>;
cap-mmc-highspeed;
clock-frequency = <150000000>;
- disable-wp;
- keep-power-in-suspend;
non-removable;
- num-slots = <1>;
vmmc-supply = <&vcc_io>;
vqmmc-supply = <&vcc18_flash>;
pinctrl-names = "default";
@@ -147,7 +111,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pmic_int>, <&pmic_sleep>;
interrupt-parent = <&gpio0>;
- interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
+ interrupts = <RK_PA5 IRQ_TYPE_LEVEL_LOW>;
rockchip,system-power-controller;
vcc1-supply = <&vcc_sys>;
vcc2-supply = <&vcc_sys>;
@@ -258,8 +222,6 @@
};
vcc_sd: SWITCH_REG1 {
- regulator-always-on;
- regulator-boot-on;
regulator-name = "vcc_sd";
};
@@ -275,23 +237,23 @@
&pinctrl {
ir {
ir_int: ir-int {
- rockchip,pins = <3 30 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
keys {
pwr_key: pwr-key {
- rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
pmic_sleep: pmic-sleep {
- rockchip,pins = <0 0 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PA0 2 &pcfg_pull_none>;
};
pmic_int: pmic-int {
- rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
diff --git a/arch/arm/dts/rk3368-lion-haikou.dts b/arch/arm/dts/rk3368-lion-haikou.dts
index 7fcb1eacea..cae01d35b9 100644
--- a/arch/arm/dts/rk3368-lion-haikou.dts
+++ b/arch/arm/dts/rk3368-lion-haikou.dts
@@ -10,6 +10,10 @@
model = "Theobroma Systems RK3368-uQ7 Baseboard";
compatible = "tsd,rk3368-lion-haikou", "rockchip,rk3368";
+ aliases {
+ mmc1 = &sdmmc;
+ };
+
chosen {
stdout-path = "serial0:115200n8";
};
diff --git a/arch/arm/dts/rk3368-lion.dtsi b/arch/arm/dts/rk3368-lion.dtsi
index 532e6a6828..bcd7977fb0 100644
--- a/arch/arm/dts/rk3368-lion.dtsi
+++ b/arch/arm/dts/rk3368-lion.dtsi
@@ -7,6 +7,10 @@
#include "rk3368.dtsi"
/ {
+ aliases {
+ mmc0 = &emmc;
+ };
+
chosen {
stdout-path = "serial0:115200n8";
};
@@ -150,7 +154,6 @@
assigned-clocks = <&cru SCLK_MAC>;
assigned-clock-parents = <&ext_gmac>;
clock_in_out = "input";
- phy-handle = <&phy0>;
phy-supply = <&vcc33_io>;
phy-mode = "rgmii";
pinctrl-names = "default";
@@ -161,22 +164,6 @@
tx_delay = <0x10>;
rx_delay = <0x10>;
status = "okay";
-
- mdio {
- compatible = "snps,dwmac-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
-
- /* Microsemi VSC8531-02 */
- phy0: phy@0 {
- compatible = "ethernet-phy-id0007.0570";
- reg = <0>;
- vsc8531,clk-out-frequency = <125000000>;
- vsc8531,edge-slowdown = <7>;
- vsc8531,led-0-mode = <1>;
- vsc8531,led-1-mode = <2>;
- };
- };
};
&i2c0 {
diff --git a/arch/arm/dts/rk3368-px5-evb.dts b/arch/arm/dts/rk3368-px5-evb.dts
index e9c5ebad47..5ccaa5f7a3 100644
--- a/arch/arm/dts/rk3368-px5-evb.dts
+++ b/arch/arm/dts/rk3368-px5-evb.dts
@@ -1,43 +1,6 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
- * Copyright (c) 2017 Rockchip Electronics Co., Ltd
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- * a) This file is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This file is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- * b) Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use,
- * copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following
- * conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
+ * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
*/
/dts-v1/;
@@ -45,30 +8,21 @@
#include <dt-bindings/input/input.h>
/ {
- model = "PX5 EVB";
+ model = "Rockchip PX5 EVB";
compatible = "rockchip,px5-evb", "rockchip,px5", "rockchip,rk3368";
+ aliases {
+ mmc0 = &sdmmc;
+ mmc1 = &emmc;
+ };
+
chosen {
stdout-path = "serial4:115200n8";
};
memory@0 {
- device_type = "memory";
reg = <0x0 0x0 0x0 0x40000000>;
- };
-
- ext_gmac: gmac-clk {
- compatible = "fixed-clock";
- clock-frequency = <125000000>;
- clock-output-names = "ext_gmac";
- #clock-cells = <0>;
- };
-
- ir: ir-receiver {
- compatible = "gpio-ir-receiver";
- gpios = <&gpio3 30 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&ir_int>;
+ device_type = "memory";
};
keys: gpio-keys {
@@ -77,29 +31,13 @@
pinctrl-0 = <&pwr_key>;
power {
- gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
label = "GPIO Power";
linux,code = <KEY_POWER>;
wakeup-source;
};
};
- leds: gpio-leds {
- compatible = "gpio-leds";
-
- blue {
- gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
- label = "geekbox:blue:led";
- default-state = "on";
- };
-
- red {
- gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
- label = "geekbox:red:led";
- default-state = "off";
- };
- };
-
vcc_sys: vcc-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc_sys";
@@ -115,27 +53,14 @@
bus-width = <8>;
cap-mmc-highspeed;
clock-frequency = <150000000>;
- disable-wp;
- keep-power-in-suspend;
+ mmc-hs200-1_8v;
+ no-sdio;
+ no-sd;
non-removable;
- num-slots = <1>;
- vmmc-supply = <&vcc_io>;
- vqmmc-supply = <&vcc18_flash>;
pinctrl-names = "default";
pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>;
-};
-
-&gmac {
- status = "okay";
- phy-supply = <&vcc_lan>;
- phy-mode = "rgmii";
- clock_in_out = "input";
- assigned-clocks = <&cru SCLK_MAC>;
- assigned-clock-parents = <&ext_gmac>;
- pinctrl-names = "default";
- pinctrl-0 = <&rgmii_pins>;
- tx_delay = <0x30>;
- rx_delay = <0x10>;
+ vmmc-supply = <&vcc_io>;
+ vqmmc-supply = <&vcc18_flash>;
};
&i2c0 {
@@ -144,10 +69,10 @@
rk808: pmic@1b {
compatible = "rockchip,rk808";
reg = <0x1b>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PA5 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_int>, <&pmic_sleep>;
- interrupt-parent = <&gpio0>;
- interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
rockchip,system-power-controller;
vcc1-supply = <&vcc_sys>;
vcc2-supply = <&vcc_sys>;
@@ -202,12 +127,12 @@
regulator-name = "vcc18_flash";
};
- vcc33_lcd: LDO_REG2 {
+ vcca_33: LDO_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
- regulator-name = "vcc33_lcd";
+ regulator-name = "vcca_33";
};
vdd_10: LDO_REG3 {
@@ -218,11 +143,10 @@
regulator-name = "vdd_10";
};
- vcca_18: LDO_REG4 {
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vcca_18";
+ avdd_33: LDO_REG4 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "avdd_33";
};
vccio_sd: LDO_REG5 {
@@ -258,46 +182,76 @@
};
vcc_sd: SWITCH_REG1 {
- regulator-always-on;
- regulator-boot-on;
regulator-name = "vcc_sd";
};
- vcc_lan: SWITCH_REG2 {
+ vcc33_lcd: SWITCH_REG2 {
regulator-always-on;
regulator-boot-on;
- regulator-name = "vcc_lan";
+ regulator-name = "vcc33_lcd";
};
};
};
};
-&pinctrl {
- ir {
- ir_int: ir-int {
- rockchip,pins = <3 30 RK_FUNC_GPIO &pcfg_pull_none>;
- };
+&i2c1 {
+ status = "okay";
+
+ accelerometer@18 {
+ compatible = "bosch,bma250";
+ reg = <0x18>;
+ interrupt-parent = <&gpio2>;
+ interrupts = <RK_PC1 IRQ_TYPE_LEVEL_LOW>;
};
+};
+&i2c2 {
+ status = "okay";
+
+ gsl1680: touchscreen@40 {
+ compatible = "silead,gsl1680";
+ reg = <0x40>;
+ interrupt-parent = <&gpio3>;
+ interrupts = <RK_PD4 IRQ_TYPE_EDGE_FALLING>;
+ power-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>;
+ touchscreen-size-x = <800>;
+ touchscreen-size-y = <1280>;
+ silead,max-fingers = <5>;
+ };
+};
+
+&pinctrl {
keys {
pwr_key: pwr-key {
- rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
pmic_sleep: pmic-sleep {
- rockchip,pins = <0 0 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PA0 2 &pcfg_pull_none>;
};
pmic_int: pmic-int {
- rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
-&saradc {
+&sdmmc {
status = "okay";
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ card-detect-delay = <200>;
+ no-sdio;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_bus4>, <&sdmmc_cd>;
+ rockchip,default-sample-phase = <90>;
+ vmmc-supply = <&vcc_sd>;
+ vqmmc-supply = <&vccio_sd>;
};
&tsadc {
diff --git a/arch/arm/dts/rk3368.dtsi b/arch/arm/dts/rk3368.dtsi
index cd2c322071..4c64fbefb4 100644
--- a/arch/arm/dts/rk3368.dtsi
+++ b/arch/arm/dts/rk3368.dtsi
@@ -136,37 +136,6 @@
};
};
- amba: bus {
- compatible = "simple-bus";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- dmac_peri: dma-controller@ff250000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x0 0xff250000 0x0 0x4000>;
- interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
- #dma-cells = <1>;
- arm,pl330-broken-no-flushp;
- arm,pl330-periph-burst;
- clocks = <&cru ACLK_DMAC_PERI>;
- clock-names = "apb_pclk";
- };
-
- dmac_bus: dma-controller@ff600000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x0 0xff600000 0x0 0x4000>;
- interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
- #dma-cells = <1>;
- arm,pl330-broken-no-flushp;
- arm,pl330-periph-burst;
- clocks = <&cru ACLK_DMAC_BUS>;
- clock-names = "apb_pclk";
- };
- };
-
arm-pmu {
compatible = "arm,armv8-pmuv3";
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
@@ -399,8 +368,20 @@
status = "disabled";
};
+ dmac_peri: dma-controller@ff250000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x0 0xff250000 0x0 0x4000>;
+ interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ arm,pl330-broken-no-flushp;
+ arm,pl330-periph-burst;
+ clocks = <&cru ACLK_DMAC_PERI>;
+ clock-names = "apb_pclk";
+ };
+
thermal-zones {
- cpu {
+ cpu_thermal: cpu-thermal {
polling-delay-passive = <100>; /* milliseconds */
polling-delay = <5000>; /* milliseconds */
@@ -444,7 +425,7 @@
};
};
- gpu {
+ gpu_thermal: gpu-thermal {
polling-delay-passive = <100>; /* milliseconds */
polling-delay = <5000>; /* milliseconds */
@@ -532,6 +513,18 @@
status = "disabled";
};
+ dmac_bus: dma-controller@ff600000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x0 0xff600000 0x0 0x4000>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ arm,pl330-broken-no-flushp;
+ arm,pl330-periph-burst;
+ clocks = <&cru ACLK_DMAC_BUS>;
+ clock-names = "apb_pclk";
+ };
+
i2c0: i2c@ff650000 {
compatible = "rockchip,rk3368-i2c", "rockchip,rk3288-i2c";
reg = <0x0 0xff650000 0x0 0x1000>;
@@ -565,7 +558,6 @@
pinctrl-names = "default";
pinctrl-0 = <&pwm0_pin>;
clocks = <&cru PCLK_PWM1>;
- clock-names = "pwm";
status = "disabled";
};
@@ -576,7 +568,6 @@
pinctrl-names = "default";
pinctrl-0 = <&pwm1_pin>;
clocks = <&cru PCLK_PWM1>;
- clock-names = "pwm";
status = "disabled";
};
@@ -585,7 +576,6 @@
reg = <0x0 0xff680020 0x0 0x10>;
#pwm-cells = <3>;
clocks = <&cru PCLK_PWM1>;
- clock-names = "pwm";
status = "disabled";
};
@@ -596,7 +586,6 @@
pinctrl-names = "default";
pinctrl-0 = <&pwm3_pin>;
clocks = <&cru PCLK_PWM1>;
- clock-names = "pwm";
status = "disabled";
};
@@ -675,6 +664,8 @@
compatible = "rockchip,rk3368-timer", "rockchip,rk3288-timer";
reg = <0x0 0xff810000 0x0 0x20>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru PCLK_TIMER0>, <&cru SCLK_TIMER00>;
+ clock-names = "pclk", "timer";
};
spdif: spdif@ff880000 {