diff options
author | Florinel Iordache <florinel.iordache@nxp.com> | 2020-03-16 15:35:59 +0200 |
---|---|---|
committer | Priyanka Jain <priyanka.jain@nxp.com> | 2020-04-20 13:35:11 +0530 |
commit | 5d3bcdb12fc48421573e1cef5c260643337bfada (patch) | |
tree | 6d68220dc8978567ee1bdf4271b3f6bfd68f5150 /arch | |
parent | 316fc6ff762b44044ef164f51e042cb8a90dc147 (diff) | |
download | u-boot-5d3bcdb12fc48421573e1cef5c260643337bfada.tar.gz |
phy: add support for backplane kr mode
Add generic support for backplane kr modes currently available:
10gbase-kr, 40gbase-kr4. Remove platform generic fixups
(armv8/layerscape and powerpc) for ethernet interfaces specified
in device tree as supported backplane modes.
Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 9 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc8xxx/fdt.c | 9 |
2 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c index 87c3e05f45..077438765c 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2014-2015 Freescale Semiconductor, Inc. + * Copyright 2020 NXP */ #include <common.h> @@ -31,6 +32,14 @@ int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc) { + const char *conn; + + /* Do NOT apply fixup for backplane modes specified in DT */ + if (phyc == PHY_INTERFACE_MODE_XGMII) { + conn = fdt_getprop(blob, offset, "phy-connection-type", NULL); + if (is_backplane_mode(conn)) + return 0; + } return fdt_setprop_string(blob, offset, "phy-connection-type", phy_string_for_interface(phyc)); } diff --git a/arch/powerpc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c index 485c2d4feb..67f8b10001 100644 --- a/arch/powerpc/cpu/mpc8xxx/fdt.c +++ b/arch/powerpc/cpu/mpc8xxx/fdt.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2009-2014 Freescale Semiconductor, Inc. + * Copyright 2020 NXP * * This file is derived from arch/powerpc/cpu/mpc85xx/cpu.c and * arch/powerpc/cpu/mpc86xx/cpu.c. Basically this file contains @@ -76,6 +77,14 @@ void ft_fixup_num_cores(void *blob) { int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc) { + const char *conn; + + /* Do NOT apply fixup for backplane modes specified in DT */ + if (phyc == PHY_INTERFACE_MODE_XGMII) { + conn = fdt_getprop(blob, offset, "phy-connection-type", NULL); + if (is_backplane_mode(conn)) + return 0; + } return fdt_setprop_string(blob, offset, "phy-connection-type", phy_string_for_interface(phyc)); } |