diff options
| author | Álvaro Fernández Rojas <noltari@gmail.com> | 2018-01-20 02:13:39 +0100 |
|---|---|---|
| committer | Jagan Teki <jagan@amarulasolutions.com> | 2018-01-24 12:04:07 +0530 |
| commit | 80be057c729b7cfb608a2de5294816f3d1660d05 (patch) | |
| tree | 506f54e0fabfef3cc2e6174787175dace173e892 /arch | |
| parent | 29cc4368ad4b8d67ae457681e9249e2008d6fee5 (diff) | |
| download | u-boot-80be057c729b7cfb608a2de5294816f3d1660d05.tar.gz | |
mips: bmips: add bcm63xx-hsspi driver support for BCM6328
This driver manages the SPI controller present on this SoC.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/dts/brcm,bcm6328.dtsi | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/mips/dts/brcm,bcm6328.dtsi b/arch/mips/dts/brcm,bcm6328.dtsi index a996075743..67d9278be4 100644 --- a/arch/mips/dts/brcm,bcm6328.dtsi +++ b/arch/mips/dts/brcm,bcm6328.dtsi @@ -13,6 +13,10 @@ / { compatible = "brcm,bcm6328"; + aliases { + spi0 = &spi; + }; + cpus { reg = <0x10000000 0x4>; #address-cells = <1>; @@ -40,6 +44,12 @@ #size-cells = <1>; u-boot,dm-pre-reloc; + hsspi_pll: hsspi-pll { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <133333333>; + }; + periph_osc: periph-osc { compatible = "fixed-clock"; #clock-cells = <0>; @@ -123,6 +133,20 @@ status = "disabled"; }; + spi: spi@10001000 { + compatible = "brcm,bcm6328-hsspi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10001000 0x600>; + clocks = <&periph_clk BCM6328_CLK_HSSPI>, <&hsspi_pll>; + clock-names = "hsspi", "pll"; + resets = <&periph_rst BCM6328_RST_SPI>; + spi-max-frequency = <33333334>; + num-cs = <3>; + + status = "disabled"; + }; + periph_pwr: power-controller@10001848 { compatible = "brcm,bcm6328-power-domain"; reg = <0x10001848 0x4>; |