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author | Luka Kovacic <luka.kovacic@sartura.hr> | 2020-08-29 00:35:51 +0200 |
---|---|---|
committer | Stefan Roese <sr@denx.de> | 2020-10-14 07:55:56 +0200 |
commit | 87c220d0419a6073bd20184cbb81e15214affda0 (patch) | |
tree | ae5ef4f7cf572b629b25990b1b4aed79c27aa5bb /board/Marvell | |
parent | 2ae2b8a2f241e5b6ac493c5b2deff247b86a51b4 (diff) | |
download | u-boot-87c220d0419a6073bd20184cbb81e15214affda0.tar.gz |
arm: mvebu: mvebu_armada-8k: Add support for initializing iEi Puzzle-M801 networking
Add support for the marvell,armada8040-puzzle-m801 compatible string
in the board/Marvell/mvebu_armada-8k/board.c file to initialize the
networking on iEi Puzzle-M801 board (2x CP1 1 Gb ports).
Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/Marvell')
-rw-r--r-- | board/Marvell/mvebu_armada-8k/board.c | 20 |
1 files changed, 19 insertions, 1 deletions
diff --git a/board/Marvell/mvebu_armada-8k/board.c b/board/Marvell/mvebu_armada-8k/board.c index 60b0024630..bf8a929ec1 100644 --- a/board/Marvell/mvebu_armada-8k/board.c +++ b/board/Marvell/mvebu_armada-8k/board.c @@ -34,6 +34,17 @@ DECLARE_GLOBAL_DATA_PTR; #define I2C_IO_REG_CL ((1 << I2C_IO_REG_0_USB_H0_CL) | \ (1 << I2C_IO_REG_0_USB_H1_CL)) +/* + * Information specific to the iEi Puzzle-M801 board. + */ + +/* Internal configuration registers */ +#define CP1_CONF_REG_BASE 0xf4440000 +#define CONF_REG_MPP0 0x0 +#define CONF_REG_MPP1 0x4 +#define CONF_REG_MPP2 0x8 +#define CONF_REG_MPP3 0xC + static int usb_enabled = 0; /* Board specific xHCI dis-/enable code */ @@ -141,7 +152,14 @@ int board_xhci_enable(fdt_addr_t base) int board_early_init_f(void) { - /* Nothing to do (yet), perhaps later some pin-muxing etc */ + /* Initialize some platform specific memory locations */ + if (of_machine_is_compatible("marvell,armada8040-puzzle-m801")) { + /* MPP setup */ + writel(0x00444444, CP1_CONF_REG_BASE + CONF_REG_MPP0); + writel(0x00000000, CP1_CONF_REG_BASE + CONF_REG_MPP1); + writel(0x00000000, CP1_CONF_REG_BASE + CONF_REG_MPP2); + writel(0x08888000, CP1_CONF_REG_BASE + CONF_REG_MPP3); + } return 0; } |