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| author | Tom Rini <trini@ti.com> | 2014-08-29 11:06:51 -0400 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-08-29 11:06:51 -0400 |
| commit | 5a1095a830299aef8dd32495e505e92ab1749e89 (patch) | |
| tree | 9383de2534455119d51200bc87766a330591df27 /board/aristainetos/clocks.cfg | |
| parent | 6af857c50df4e62ec08e51ad73c96f63f1480386 (diff) | |
| parent | d145878d59c80a44d8c6e6d606b898ab87d205ee (diff) | |
| download | u-boot-5a1095a830299aef8dd32495e505e92ab1749e89.tar.gz | |
Merge branch 'master' of git://www.denx.de/git/u-boot-imx
Diffstat (limited to 'board/aristainetos/clocks.cfg')
| -rw-r--r-- | board/aristainetos/clocks.cfg | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/board/aristainetos/clocks.cfg b/board/aristainetos/clocks.cfg new file mode 100644 index 0000000000..651449e567 --- /dev/null +++ b/board/aristainetos/clocks.cfg @@ -0,0 +1,24 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* set the default clock gate to save power */ +DATA 4, CCM_CCGR0, 0x00c03f3f +DATA 4, CCM_CCGR1, 0x0030fcff +DATA 4, CCM_CCGR2, 0x0fffcfc0 +DATA 4, CCM_CCGR3, 0x3ff0300f +DATA 4, CCM_CCGR4, 0xfffff30c /* enable NAND/GPMI/BCH clocks */ +DATA 4, CCM_CCGR5, 0x0f0000c3 +DATA 4, CCM_CCGR6, 0x000003ff |