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authorChris Packham <judge.packham@gmail.com>2018-05-10 13:28:30 +1200
committerStefan Roese <sr@denx.de>2018-05-14 10:01:56 +0200
commite6f61622d32327907f824154c7f88ddce3c700cc (patch)
treeda08a5e3e1811a0fda31e4a4e64e37f3318d947d /board/solidrun
parent2b4ffbf6b4944a0b3125fd2c9c0ba3568264367a (diff)
downloadu-boot-e6f61622d32327907f824154c7f88ddce3c700cc.tar.gz
ARM: mvebu: a38x: restore support for setting timing
This restores support for configuring the timing mode based on the ddr_topology. This was originally implemented in commit 90bcc3d38d2b ("driver/ddr: Add support for setting timing in hws_topology_map") but was removed as part of the upstream sync. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/solidrun')
-rw-r--r--board/solidrun/clearfog/clearfog.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c
index cc11feb85e..ede303d4eb 100644
--- a/board/solidrun/clearfog/clearfog.c
+++ b/board/solidrun/clearfog/clearfog.c
@@ -83,7 +83,8 @@ static struct mv_ddr_topology_map board_topology_map = {
MV_DDR_DIE_CAP_4GBIT, /* mem_size */
DDR_FREQ_800, /* frequency */
0, 0, /* cas_wl cas_l */
- MV_DDR_TEMP_LOW} }, /* temperature */
+ MV_DDR_TEMP_LOW, /* temperature */
+ MV_DDR_TIM_DEFAULT} }, /* timing */
BUS_MASK_32BIT, /* Busses mask */
MV_DDR_CFG_DEFAULT, /* ddr configuration data source */
{ {0} }, /* raw spd data */