Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq

- Add DM_ETH support for DPAA1, DPAA2 based RDB platforms: ls1046ardb,
  ls1043ardb, lx2160ardb, ls2088ardb, ls1088ardb.
- Add GICv3 support for ls1028a, ls2088a, ls1088a.
- Add lpuart support on ls1028aqds.
- Few bug fixes and updates on ls2088a, ls1012a, ls1046a, ls1021a based
  platforms.

12 files changed, 60 insertions, 26 deletions

diff --git a/board/freescale/ls1028a/MAINTAINERS b/board/freescale/ls1028a/MAINTAINERS
index 2c28825698..5b7a8db2fa 100644
--- a/board/freescale/ls1028a/MAINTAINERS
+++ b/board/freescale/ls1028a/MAINTAINERS
@@ -8,6 +8,7 @@ F:	board/freescale/ls1028a/
 F:	include/configs/ls1028a_common.h
 F:	include/configs/ls1028aqds.h
 F:	configs/ls1028aqds_tfa_defconfig
+F:	configs/ls1028aqds_tfa_lpuart_defconfig
 
 LS1028ARDB BOARD
 M:	Sudhanshu Gupta <sudhanshu.gupta@nxp.com>
diff --git a/board/freescale/ls1028a/ls1028a.c b/board/freescale/ls1028a/ls1028a.c
index 0b7504aea1..1e2973f0c8 100644
--- a/board/freescale/ls1028a/ls1028a.c
+++ b/board/freescale/ls1028a/ls1028a.c
@@ -31,6 +31,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int config_board_mux(void)
 {
+#ifndef CONFIG_LPUART
 #if defined(CONFIG_TARGET_LS1028AQDS) && defined(CONFIG_FSL_QIXIS)
 	u8 reg;
 
@@ -55,9 +56,18 @@ int config_board_mux(void)
 	reg &= ~(0xc0);
 	QIXIS_WRITE(brdcfg[15], reg);
 #endif
+#endif
+
 	return 0;
 }
 
+#ifdef CONFIG_LPUART
+u32 get_lpuart_clk(void)
+{
+	return gd->bus_clk / CONFIG_SYS_FSL_LPUART_CLK_DIV;
+}
+#endif
+
 int board_init(void)
 {
 #ifdef CONFIG_ENV_IS_NOWHERE
@@ -120,11 +130,33 @@ int misc_init_r(void)
 
 int board_early_init_f(void)
 {
+#ifdef CONFIG_LPUART
+	u8 uart;
+#endif
+
 #ifdef CONFIG_SYS_I2C_EARLY_INIT
 	i2c_early_init_f();
 #endif
 
 	fsl_lsch3_early_init_f();
+
+#ifdef CONFIG_LPUART
+	/*
+	 * Field| Function
+	 * --------------------------------------------------------------
+	 * 7-6  | Controls I2C3 routing (net CFG_MUX_I2C3):
+	 * I2C3 | 11= Routes {SCL, SDA} to LPUART1 header as {SOUT, SIN}.
+	 * --------------------------------------------------------------
+	 * 5-4  | Controls I2C4 routing (net CFG_MUX_I2C4):
+	 * I2C4 |11= Routes {SCL, SDA} to LPUART1 header as {CTS_B, RTS_B}.
+	 */
+	/* use lpuart0 as system console */
+	uart = QIXIS_READ(brdcfg[13]);
+	uart &= ~CFG_LPUART_MUX_MASK;
+	uart |= CFG_LPUART_EN;
+	QIXIS_WRITE(brdcfg[13], uart);
+#endif
+
 	return 0;
 }
 
diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c
index 9bc78d6543..26a192957b 100644
--- a/board/freescale/ls1043ardb/ls1043ardb.c
+++ b/board/freescale/ls1043ardb/ls1043ardb.c
@@ -285,8 +285,10 @@ int ft_board_setup(void *blob, bd_t *bd)
 	ft_cpu_setup(blob, bd);
 
 #ifdef CONFIG_SYS_DPAA_FMAN
+#ifndef CONFIG_DM_ETH
 	fdt_fixup_fman_ethernet(blob);
 #endif
+#endif
 
 	fdt_fixup_icid(blob);
 
diff --git a/board/freescale/ls1046afrwy/ls1046afrwy.c b/board/freescale/ls1046afrwy/ls1046afrwy.c
index 8c0abb63a9..71ace192e2 100644
--- a/board/freescale/ls1046afrwy/ls1046afrwy.c
+++ b/board/freescale/ls1046afrwy/ls1046afrwy.c
@@ -232,8 +232,10 @@ int ft_board_setup(void *blob, bd_t *bd)
 	ft_cpu_setup(blob, bd);
 
 #ifdef CONFIG_SYS_DPAA_FMAN
+#ifndef CONFIG_DM_ETH
 	fdt_fixup_fman_ethernet(blob);
 #endif
+#endif
 
 	fdt_fixup_icid(blob);
 
diff --git a/board/freescale/ls1046aqds/ls1046aqds.c b/board/freescale/ls1046aqds/ls1046aqds.c
index cabd7ee648..e6648e9d70 100644
--- a/board/freescale/ls1046aqds/ls1046aqds.c
+++ b/board/freescale/ls1046aqds/ls1046aqds.c
@@ -462,7 +462,9 @@ int ft_board_setup(void *blob, bd_t *bd)
 	ft_cpu_setup(blob, bd);
 
 #ifdef CONFIG_SYS_DPAA_FMAN
+#ifndef CONFIG_DM_ETH
 	fdt_fixup_fman_ethernet(blob);
+#endif
 	fdt_fixup_board_enet(blob);
 #endif
 
diff --git a/board/freescale/ls1046ardb/ddr.h b/board/freescale/ls1046ardb/ddr.h
index 3b4d44d465..05baef232a 100644
--- a/board/freescale/ls1046ardb/ddr.h
+++ b/board/freescale/ls1046ardb/ddr.h
@@ -32,7 +32,7 @@ static const struct board_specific_parameters udimm0[] = {
 	{2,  1350, 0, 8,     6, 0x0708090B, 0x0C0D0E09,},
 	{2,  1666, 0, 8,     7, 0x08090A0C, 0x0D0F100B,},
 	{2,  1900, 0, 8,     7, 0x09090B0D, 0x0E10120B,},
-	{2,  2300, 0, 8,     9, 0x0A0B0C10, 0x1213140E,},
+	{2,  2300, 0, 8,     7, 0x08090A0E, 0x1011120C,},
 	{}
 };
 
diff --git a/board/freescale/ls1046ardb/ls1046ardb.c b/board/freescale/ls1046ardb/ls1046ardb.c
index cc6bd883c3..5308cb2e1c 100644
--- a/board/freescale/ls1046ardb/ls1046ardb.c
+++ b/board/freescale/ls1046ardb/ls1046ardb.c
@@ -172,8 +172,10 @@ int ft_board_setup(void *blob, bd_t *bd)
 	ft_cpu_setup(blob, bd);
 
 #ifdef CONFIG_SYS_DPAA_FMAN
+#ifndef CONFIG_DM_ETH
 	fdt_fixup_fman_ethernet(blob);
 #endif
+#endif
 
 	fdt_fixup_icid(blob);
 
diff --git a/board/freescale/ls1088a/eth_ls1088ardb.c b/board/freescale/ls1088a/eth_ls1088ardb.c
index 01f56db0a1..f56ce7d9ae 100644
--- a/board/freescale/ls1088a/eth_ls1088ardb.c
+++ b/board/freescale/ls1088a/eth_ls1088ardb.c
@@ -18,6 +18,7 @@
 #include <fsl-mc/fsl_mc.h>
 #include <fsl-mc/ldpaa_wriop.h>
 
+#ifndef CONFIG_DM_ETH
 int board_eth_init(bd_t *bis)
 {
 #if defined(CONFIG_FSL_MC_ENET)
@@ -95,6 +96,7 @@ int board_eth_init(bd_t *bis)
 
 	return pci_eth_init(bis);
 }
+#endif
 
 #if defined(CONFIG_RESET_PHY_R)
 void reset_phy(void)
diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c
index 0bd397a0be..225e787c75 100644
--- a/board/freescale/ls1088a/ls1088a.c
+++ b/board/freescale/ls1088a/ls1088a.c
@@ -801,6 +801,11 @@ int board_init(void)
 #ifdef CONFIG_FSL_LS_PPA
 	ppa_init();
 #endif
+
+#if !defined(CONFIG_SYS_EARLY_PCI_INIT) && defined(CONFIG_DM_ETH)
+	pci_init();
+#endif
+
 	return 0;
 }
 
diff --git a/board/freescale/ls2080ardb/eth_ls2080rdb.c b/board/freescale/ls2080ardb/eth_ls2080rdb.c
index b0f276e839..f0f6ca53cb 100644
--- a/board/freescale/ls2080ardb/eth_ls2080rdb.c
+++ b/board/freescale/ls2080ardb/eth_ls2080rdb.c
@@ -23,6 +23,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int board_eth_init(bd_t *bis)
 {
+#ifndef CONFIG_DM_ETH
 #if defined(CONFIG_FSL_MC_ENET)
 	int i, interface;
 	struct memac_mdio_info mdio_info;
@@ -99,6 +100,7 @@ int board_eth_init(bd_t *bis)
 
 	cpu_eth_init(bis);
 #endif /* CONFIG_FSL_MC_ENET */
+#endif /* !CONFIG_DM_ETH */
 
 #ifdef CONFIG_PHY_AQUANTIA
 	/*
@@ -112,7 +114,12 @@ int board_eth_init(bd_t *bis)
 	gd->jt->mdio_phydev_for_ethname = mdio_phydev_for_ethname;
 	gd->jt->miiphy_set_current_dev = miiphy_set_current_dev;
 #endif
+
+#ifdef CONFIG_DM_ETH
+	return 0;
+#else
 	return pci_eth_init(bis);
+#endif
 }
 
 #if defined(CONFIG_RESET_PHY_R)
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c
index 282aaf47fb..5e2fc7cc98 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -244,6 +244,10 @@ int board_init(void)
 	sec_init();
 #endif
 
+#if !defined(CONFIG_SYS_EARLY_PCI_INIT) && defined(CONFIG_DM_ETH)
+	pci_init();
+#endif
+
 	return 0;
 }
 
diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c
index 23ea1b6f16..0d94107def 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -29,14 +29,11 @@
 #include "../common/vid.h"
 #include <fsl_immap.h>
 #include <asm/arch-fsl-layerscape/fsl_icid.h>
-#include <asm/gic-v3.h>
-#include <cpu_func.h>
 
 #ifdef CONFIG_EMC2305
 #include "../common/emc2305.h"
 #endif
 
-#define GIC_LPI_SIZE                             0x200000
 #ifdef CONFIG_TARGET_LX2160AQDS
 #define CFG_MUX_I2C_SDHC(reg, value)		((reg & 0x3f) | value)
 #define SET_CFG_MUX1_SDHC1_SDHC(reg)		(reg & 0x3f)
@@ -644,21 +641,6 @@ void board_quiesce_devices(void)
 }
 #endif
 
-#ifdef CONFIG_GIC_V3_ITS
-void fdt_fixup_gic_lpi_memory(void *blob, u64 gic_lpi_base)
-{
-	u32 phandle;
-	int err;
-	struct fdt_memory gic_lpi;
-
-	gic_lpi.start = gic_lpi_base;
-	gic_lpi.end = gic_lpi_base + GIC_LPI_SIZE - 1;
-	err = fdtdec_add_reserved_memory(blob, "gic-lpi", &gic_lpi, &phandle);
-	if (err < 0)
-		debug("failed to add reserved memory: %d\n", err);
-}
-#endif
-
 #ifdef CONFIG_OF_BOARD_SETUP
 int ft_board_setup(void *blob, bd_t *bd)
 {
@@ -670,7 +652,6 @@ int ft_board_setup(void *blob, bd_t *bd)
 	u64 mc_memory_base = 0;
 	u64 mc_memory_size = 0;
 	u16 total_memory_banks;
-	u64 __maybe_unused gic_lpi_base;
 
 	ft_cpu_setup(blob, bd);
 
@@ -690,12 +671,6 @@ int ft_board_setup(void *blob, bd_t *bd)
 		size[i] = gd->bd->bi_dram[i].size;
 	}
 
-#ifdef CONFIG_GIC_V3_ITS
-	gic_lpi_base = gd->arch.resv_ram - GIC_LPI_SIZE;
-	gic_lpi_tables_init(gic_lpi_base, cpu_numcores());
-	fdt_fixup_gic_lpi_memory(blob, gic_lpi_base);
-#endif
-
 #ifdef CONFIG_RESV_RAM
 	/* reduce size if reserved memory is within this bank */
 	if (gd->arch.resv_ram >= base[0] &&