Merge branch 'master' of git://git.denx.de/u-boot-mips

13 files changed, 262 insertions, 1 deletions

diff --git a/board/imgtec/malta/lowlevel_init.S b/board/imgtec/malta/lowlevel_init.S
index ae09c27d07..534db1d832 100644
--- a/board/imgtec/malta/lowlevel_init.S
+++ b/board/imgtec/malta/lowlevel_init.S
@@ -24,7 +24,6 @@
 
 	.text
 	.set noreorder
-	.set mips32
 
 	.globl	lowlevel_init
 lowlevel_init:
diff --git a/board/qca/ap121/Kconfig b/board/qca/ap121/Kconfig
new file mode 100644
index 0000000000..f7e768ad58
--- /dev/null
+++ b/board/qca/ap121/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_AP121
+
+config SYS_VENDOR
+	default "qca"
+
+config SYS_BOARD
+	default "ap121"
+
+config SYS_CONFIG_NAME
+	default "ap121"
+
+endif
diff --git a/board/qca/ap121/MAINTAINERS b/board/qca/ap121/MAINTAINERS
new file mode 100644
index 0000000000..8b02988d60
--- /dev/null
+++ b/board/qca/ap121/MAINTAINERS
@@ -0,0 +1,6 @@
+AP121 BOARD
+M:	Wills Wang <wills.wang@live.com>
+S:	Maintained
+F:	board/qca/ap121/
+F:	include/configs/ap121.h
+F:	configs/ap121_defconfig
diff --git a/board/qca/ap121/Makefile b/board/qca/ap121/Makefile
new file mode 100644
index 0000000000..ced5432e86
--- /dev/null
+++ b/board/qca/ap121/Makefile
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	= ap121.o
diff --git a/board/qca/ap121/ap121.c b/board/qca/ap121/ap121.c
new file mode 100644
index 0000000000..d6c60fea86
--- /dev/null
+++ b/board/qca/ap121/ap121.c
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/addrspace.h>
+#include <asm/types.h>
+#include <mach/ar71xx_regs.h>
+#include <mach/ddr.h>
+#include <debug_uart.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT
+void board_debug_uart_init(void)
+{
+	void __iomem *regs;
+	u32 val;
+
+	regs = map_physmem(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE,
+			   MAP_NOCACHE);
+
+	/*
+	 * GPIO9 as input, GPIO10 as output
+	 */
+	val = readl(regs + AR71XX_GPIO_REG_OE);
+	val &= ~AR933X_GPIO(9);
+	val |= AR933X_GPIO(10);
+	writel(val, regs + AR71XX_GPIO_REG_OE);
+
+	/*
+	 * Enable UART, GPIO9 as UART_SI, GPIO10 as UART_SO
+	 */
+	val = readl(regs + AR71XX_GPIO_REG_FUNC);
+	val |= AR933X_GPIO_FUNC_UART_EN | AR933X_GPIO_FUNC_RES_TRUE;
+	writel(val, regs + AR71XX_GPIO_REG_FUNC);
+}
+#endif
+
+int board_early_init_f(void)
+{
+#ifdef CONFIG_DEBUG_UART
+	debug_uart_init();
+#endif
+	ddr_init();
+	return 0;
+}
diff --git a/board/qca/ap143/Kconfig b/board/qca/ap143/Kconfig
new file mode 100644
index 0000000000..4cdac0d06d
--- /dev/null
+++ b/board/qca/ap143/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_AP143
+
+config SYS_VENDOR
+	default "qca"
+
+config SYS_BOARD
+	default "ap143"
+
+config SYS_CONFIG_NAME
+	default "ap143"
+
+endif
diff --git a/board/qca/ap143/MAINTAINERS b/board/qca/ap143/MAINTAINERS
new file mode 100644
index 0000000000..11cb14fc74
--- /dev/null
+++ b/board/qca/ap143/MAINTAINERS
@@ -0,0 +1,6 @@
+AP143 BOARD
+M:	Wills Wang <wills.wang@live.com>
+S:	Maintained
+F:	board/qca/ap143/
+F:	include/configs/ap143.h
+F:	configs/ap143_defconfig
diff --git a/board/qca/ap143/Makefile b/board/qca/ap143/Makefile
new file mode 100644
index 0000000000..00f78376ec
--- /dev/null
+++ b/board/qca/ap143/Makefile
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	= ap143.o
diff --git a/board/qca/ap143/ap143.c b/board/qca/ap143/ap143.c
new file mode 100644
index 0000000000..1572472ca3
--- /dev/null
+++ b/board/qca/ap143/ap143.c
@@ -0,0 +1,66 @@
+/*
+ * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/addrspace.h>
+#include <asm/types.h>
+#include <mach/ar71xx_regs.h>
+#include <mach/ddr.h>
+#include <debug_uart.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT
+void board_debug_uart_init(void)
+{
+	void __iomem *regs;
+	u32 val;
+
+	regs = map_physmem(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE,
+			   MAP_NOCACHE);
+
+	/*
+	 * GPIO9 as input, GPIO10 as output
+	 */
+	val = readl(regs + AR71XX_GPIO_REG_OE);
+	val |= QCA953X_GPIO(9);
+	val &= ~QCA953X_GPIO(10);
+	writel(val, regs + AR71XX_GPIO_REG_OE);
+
+	/*
+	 * Enable GPIO10 as UART0_SOUT
+	 */
+	val = readl(regs + QCA953X_GPIO_REG_OUT_FUNC2);
+	val &= ~QCA953X_GPIO_MUX_MASK(16);
+	val |= QCA953X_GPIO_OUT_MUX_UART0_SOUT << 16;
+	writel(val, regs + QCA953X_GPIO_REG_OUT_FUNC2);
+
+	/*
+	 * Enable GPIO9 as UART0_SIN
+	 */
+	val = readl(regs + QCA953X_GPIO_REG_IN_ENABLE0);
+	val &= ~QCA953X_GPIO_MUX_MASK(8);
+	val |= QCA953X_GPIO_IN_MUX_UART0_SIN << 8;
+	writel(val, regs + QCA953X_GPIO_REG_IN_ENABLE0);
+
+	/*
+	 * Enable GPIO10 output
+	 */
+	val = readl(regs + AR71XX_GPIO_REG_OUT);
+	val |= QCA953X_GPIO(10);
+	writel(val, regs + AR71XX_GPIO_REG_OUT);
+}
+#endif
+
+int board_early_init_f(void)
+{
+#ifdef CONFIG_DEBUG_UART
+	debug_uart_init();
+#endif
+	ddr_init();
+	return 0;
+}
diff --git a/board/tplink/wdr4300/Kconfig b/board/tplink/wdr4300/Kconfig
new file mode 100644
index 0000000000..902abf560d
--- /dev/null
+++ b/board/tplink/wdr4300/Kconfig
@@ -0,0 +1,15 @@
+if BOARD_TPLINK_WDR4300
+
+config SYS_VENDOR
+	default "tplink"
+
+config SYS_SOC
+	default "ath79"
+
+config SYS_BOARD
+	default "wdr4300"
+
+config SYS_CONFIG_NAME
+	default "tplink_wdr4300"
+
+endif
diff --git a/board/tplink/wdr4300/MAINTAINERS b/board/tplink/wdr4300/MAINTAINERS
new file mode 100644
index 0000000000..db239c291a
--- /dev/null
+++ b/board/tplink/wdr4300/MAINTAINERS
@@ -0,0 +1,6 @@
+TPLINK_WDR4300 BOARD
+M:	Marek Vasut <marex@denx.de>
+S:	Maintained
+F:	board/tplink/wdr4300/
+F:	include/configs/tplink_wdr4300.h
+F:	configs/tplink_wdr4300_defconfig
diff --git a/board/tplink/wdr4300/Makefile b/board/tplink/wdr4300/Makefile
new file mode 100644
index 0000000000..4f0c296628
--- /dev/null
+++ b/board/tplink/wdr4300/Makefile
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	= wdr4300.o
diff --git a/board/tplink/wdr4300/wdr4300.c b/board/tplink/wdr4300/wdr4300.c
new file mode 100644
index 0000000000..6e070fd558
--- /dev/null
+++ b/board/tplink/wdr4300/wdr4300.c
@@ -0,0 +1,74 @@
+/*
+ * Copyright (C) 2016 Marek Vasut <marex@denx.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/addrspace.h>
+#include <asm/types.h>
+#include <mach/ath79.h>
+#include <mach/ar71xx_regs.h>
+#include <mach/ddr.h>
+#include <debug_uart.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_USB
+static void wdr4300_usb_start(void)
+{
+	void __iomem *gpio_regs = map_physmem(AR71XX_GPIO_BASE,
+					      AR71XX_GPIO_SIZE, MAP_NOCACHE);
+	if (!gpio_regs)
+		return;
+
+	/* Power up the USB HUB. */
+	clrbits_be32(gpio_regs + AR71XX_GPIO_REG_OE, BIT(21) | BIT(22));
+	writel(BIT(21) | BIT(22), gpio_regs + AR71XX_GPIO_REG_SET);
+	mdelay(1);
+
+	ath79_usb_reset();
+}
+#else
+static inline void wdr4300_usb_start(void) {}
+#endif
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f(void)
+{
+	void __iomem *regs;
+
+	regs = map_physmem(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE,
+			   MAP_NOCACHE);
+
+	/* Assure JTAG is not disconnected. */
+	writel(0x40, regs + AR934X_GPIO_REG_FUNC);
+
+	/* Configure default GPIO input/output regs. */
+	writel(0x3031b, regs + AR71XX_GPIO_REG_OE);
+	writel(0x0f804, regs + AR71XX_GPIO_REG_OUT);
+
+	/* Configure pin multiplexing. */
+	writel(0x00000000, regs + AR934X_GPIO_REG_OUT_FUNC0);
+	writel(0x0b0a0980, regs + AR934X_GPIO_REG_OUT_FUNC1);
+	writel(0x00180000, regs + AR934X_GPIO_REG_OUT_FUNC2);
+	writel(0x00000000, regs + AR934X_GPIO_REG_OUT_FUNC3);
+	writel(0x0000004d, regs + AR934X_GPIO_REG_OUT_FUNC4);
+	writel(0x00000000, regs + AR934X_GPIO_REG_OUT_FUNC5);
+
+#ifdef CONFIG_DEBUG_UART
+	debug_uart_init();
+#endif
+
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+	ar934x_pll_init(560, 480, 240);
+	ar934x_ddr_init(560, 480, 240);
+#endif
+
+	wdr4300_usb_start();
+	ath79_eth_reset();
+
+	return 0;
+}
+#endif