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| author | Michal Simek <michal.simek@xilinx.com> | 2016-05-17 14:03:50 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2016-05-24 13:17:59 +0200 |
| commit | 62afc601883e788f3f22291202d5b2a23c1a8b06 (patch) | |
| tree | c5d12c83cb1f46ed08de698494885de63f2f329a /common/image-fit.c | |
| parent | b733c278d7adc48c71bd06faf359db3d9e385185 (diff) | |
| download | u-boot-62afc601883e788f3f22291202d5b2a23c1a8b06.tar.gz | |
image: Add boot_get_fpga() to load fpga with bootm
Add function boot_get_fpga() which find and load bitstream to
programmable logic if fpga entry is present.
Function is supported on Xilinx devices for full and partial bitstreams
in BIN and BIT format.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Remove additional blankline in image.h
Diffstat (limited to 'common/image-fit.c')
| -rw-r--r-- | common/image-fit.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/common/image-fit.c b/common/image-fit.c index 8a0ca2a803..98739572a1 100644 --- a/common/image-fit.c +++ b/common/image-fit.c @@ -422,7 +422,8 @@ void fit_image_print(const void *fit, int image_noffset, const char *p) } if ((type == IH_TYPE_KERNEL) || (type == IH_TYPE_STANDALONE) || - (type == IH_TYPE_FIRMWARE) || (type == IH_TYPE_RAMDISK)) { + (type == IH_TYPE_FIRMWARE) || (type == IH_TYPE_RAMDISK) || + (type == IH_TYPE_FPGA)) { ret = fit_image_get_load(fit, image_noffset, &load); printf("%s Load Address: ", p); if (ret) @@ -1571,6 +1572,8 @@ static const char *fit_get_image_type_property(int type) return FIT_SETUP_PROP; case IH_TYPE_LOADABLE: return FIT_LOADABLE_PROP; + case IH_TYPE_FPGA: + return FIT_FPGA_PROP; } return "unknown"; @@ -1685,7 +1688,7 @@ int fit_image_load(bootm_headers_t *images, ulong addr, fit_image_check_type(fit, noffset, IH_TYPE_KERNEL_NOLOAD)); - os_ok = image_type == IH_TYPE_FLATDT || + os_ok = image_type == IH_TYPE_FLATDT || IH_TYPE_FPGA || fit_image_check_os(fit, noffset, IH_OS_LINUX) || fit_image_check_os(fit, noffset, IH_OS_OPENRTOS); |