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authorSimon Glass <sjg@chromium.org>2016-09-12 23:18:22 -0600
committerTom Rini <trini@konsulko.com>2016-09-16 17:03:36 -0400
commitc2ae7d822086fd07386c3a67f76350e749418f66 (patch)
tree367346c45b58a8af3fa884967118a6e865197e47 /configs/Linksprite_pcDuino3_Nano_defconfig
parent9ede21234172ac9dff078e3e5f6dbd4a407c4680 (diff)
downloadu-boot-c2ae7d822086fd07386c3a67f76350e749418f66.tar.gz
Kconfig: Move SPL settings into their own file
Move the SPL settings into common/spl where most of the SPL code is kept. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'configs/Linksprite_pcDuino3_Nano_defconfig')
-rw-r--r--configs/Linksprite_pcDuino3_Nano_defconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/configs/Linksprite_pcDuino3_Nano_defconfig b/configs/Linksprite_pcDuino3_Nano_defconfig
index 378abce94b..bc4eb492cc 100644
--- a/configs/Linksprite_pcDuino3_Nano_defconfig
+++ b/configs/Linksprite_pcDuino3_Nano_defconfig
@@ -7,8 +7,8 @@ CONFIG_USB1_VBUS_PIN="PH11"
CONFIG_GMAC_TX_DELAY=3
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-pcduino3-nano"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,AHCI,SATAPWR=SUNXI_GPH(2)"
+CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set