diff options
| author | Tom Rini <trini@konsulko.com> | 2019-08-09 07:29:20 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-08-09 07:29:20 -0400 |
| commit | 21bc1935b1a84176367af982f7f8da11c29cb2eb (patch) | |
| tree | 5746bbe342c196fc47f3cf4cf0cbbdedbd42cf1c /configs/khadas-edge-rk3399_defconfig | |
| parent | fef408679b2f634ebfd6298d9fc99db99e60fb1d (diff) | |
| parent | 6a452e5bd33cf8f4e851445f29ab94b66485700a (diff) | |
| download | u-boot-21bc1935b1a84176367af982f7f8da11c29cb2eb.tar.gz | |
Merge tag 'u-boot-rockchip-20190809' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- Add rk3399 boards Khadas Edge/-V/-Captain
- Add fully souce code support for rk3328 including TPL/DRAM init
- Enable boot from eMMC for rk3399 rock960/ficus boards
- turn on the IO supply for dw_mmc
Diffstat (limited to 'configs/khadas-edge-rk3399_defconfig')
| -rw-r--r-- | configs/khadas-edge-rk3399_defconfig | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/configs/khadas-edge-rk3399_defconfig b/configs/khadas-edge-rk3399_defconfig new file mode 100644 index 0000000000..c31360af86 --- /dev/null +++ b/configs/khadas-edge-rk3399_defconfig @@ -0,0 +1,59 @@ +CONFIG_ARM=y +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SYS_TEXT_BASE=0x00200000 +CONFIG_ROCKCHIP_RK3399=y +CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_SPL_STACK_R_ADDR=0x80000 +CONFIG_DEBUG_UART_BASE=0xFF1A0000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_DEBUG_UART=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 +CONFIG_TPL=y +CONFIG_SYS_PROMPT="kedge# " +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TIME=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="rk3399-khadas-edge" +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_GMAC_ROCKCHIP=y +CONFIG_PMIC_RK8XX=y +CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_RAM_RK3399_LPDDR4=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_ASIX88179=y +CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_SPL_TINY_MEMSET=y +CONFIG_ERRNO_STR=y |