diff options
| author | Simon Glass <sjg@chromium.org> | 2019-09-25 08:56:42 -0600 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2019-10-08 13:57:48 +0800 |
| commit | 75d8f49481a5c260d0cf1024d41f0b29d57e0efe (patch) | |
| tree | f434a546d0cc97e9cad48f59e54902d1307fad24 /drivers/misc | |
| parent | 594d272cfd3dc43f118efb952676715b0382af24 (diff) | |
| download | u-boot-75d8f49481a5c260d0cf1024d41f0b29d57e0efe.tar.gz | |
sandbox: pci: Create a new sandbox_pci_read_bar() function
The code in swapcase can be used by other sandbox drivers. Move it into a
common place to allow this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove inclusion of <asm/test.h> in pci_sandbox.c]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'drivers/misc')
| -rw-r--r-- | drivers/misc/Makefile | 2 | ||||
| -rw-r--r-- | drivers/misc/swap_case.c | 18 |
2 files changed, 4 insertions, 16 deletions
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 509c588582..0001d105ba 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_$(SPL_TPL_)CROS_EC_LPC) += cros_ec_lpc.o ifndef CONFIG_SPL_BUILD obj-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o +obj-$(CONFIG_SANDBOX) += swap_case.o endif ifdef CONFIG_DM_I2C @@ -52,7 +53,6 @@ obj-$(CONFIG_PCA9551_LED) += pca9551_led.o obj-$(CONFIG_$(SPL_)PWRSEQ) += pwrseq-uclass.o obj-$(CONFIG_QFW) += qfw.o obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o -obj-$(CONFIG_SANDBOX) += swap_case.o obj-$(CONFIG_SANDBOX) += syscon_sandbox.o misc_sandbox.o obj-$(CONFIG_SMSC_LPC47M) += smsc_lpc47m.o obj-$(CONFIG_SMSC_SIO1007) += smsc_sio1007.o diff --git a/drivers/misc/swap_case.c b/drivers/misc/swap_case.c index 75fe641670..11189d16c8 100644 --- a/drivers/misc/swap_case.c +++ b/drivers/misc/swap_case.c @@ -139,25 +139,13 @@ static int sandbox_swap_case_read_config(struct udevice *emul, uint offset, case PCI_BASE_ADDRESS_4: case PCI_BASE_ADDRESS_5: { int barnum; - u32 *bar, result; + u32 *bar; barnum = pci_offset_to_barnum(offset); bar = &plat->bar[barnum]; - result = *bar; - if (*bar == 0xffffffff) { - if (barinfo[barnum].type) { - result = (~(barinfo[barnum].size - 1) & - PCI_BASE_ADDRESS_IO_MASK) | - PCI_BASE_ADDRESS_SPACE_IO; - } else { - result = (~(barinfo[barnum].size - 1) & - PCI_BASE_ADDRESS_MEM_MASK) | - PCI_BASE_ADDRESS_MEM_TYPE_32; - } - } - debug("r bar %d=%x\n", barnum, result); - *valuep = result; + *valuep = sandbox_pci_read_bar(*bar, barinfo[barnum].type, + barinfo[barnum].size); break; } case PCI_CAPABILITY_LIST: |