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authorPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>2018-03-21 12:18:58 +0100
committerJagan Teki <jagan@amarulasolutions.com>2018-04-25 10:29:38 +0530
commit5ff8e54888e4d26a352453564f7f599d29696dc9 (patch)
treed28014452b59790ad13496f1b1e249874e2039c5 /drivers/mmc/sunxi_mmc.c
parent4744d81cc0dbe238bd4d8cd88c1c71022bffa621 (diff)
downloadu-boot-5ff8e54888e4d26a352453564f7f599d29696dc9.tar.gz
sunxi: improve throughput in the sunxi_mmc driver
Throughput tests have shown the sunxi_mmc driver to take over 10s to read 10MB from a fast eMMC device due to excessive delays in polling loops. This commit restructures the main polling loops to use get_timer(...) to determine whether a (millisecond) timeout has expired. We choose not to use the wait_bit function, as we don't need interruptability with ctrl-c and have at least one case where two bits (one for an error condition and another one for completion) need to be read and using wait_bit would have not added to the clarity. The observed speedup in testing on a A31 is greater than 10x (e.g. a 10MB write decreases from 9.302s to 0.884s). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Mylène Josserand <mylene.josserand@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'drivers/mmc/sunxi_mmc.c')
-rw-r--r--drivers/mmc/sunxi_mmc.c27
1 files changed, 16 insertions, 11 deletions
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index f4c245c5eb..5292f2d3cc 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -188,15 +188,16 @@ static int mmc_update_clk(struct sunxi_mmc_priv *priv)
{
unsigned int cmd;
unsigned timeout_msecs = 2000;
+ unsigned long start = get_timer(0);
cmd = SUNXI_MMC_CMD_START |
SUNXI_MMC_CMD_UPCLK_ONLY |
SUNXI_MMC_CMD_WAIT_PRE_OVER;
+
writel(cmd, &priv->reg->cmd);
while (readl(&priv->reg->cmd) & SUNXI_MMC_CMD_START) {
- if (!timeout_msecs--)
+ if (get_timer(start) > timeout_msecs)
return -1;
- udelay(1000);
}
/* clock update sets various irq status bits, clear these */
@@ -277,18 +278,21 @@ static int mmc_trans_data_by_cpu(struct sunxi_mmc_priv *priv, struct mmc *mmc,
unsigned i;
unsigned *buff = (unsigned int *)(reading ? data->dest : data->src);
unsigned byte_cnt = data->blocksize * data->blocks;
- unsigned timeout_usecs = (byte_cnt >> 8) * 1000;
- if (timeout_usecs < 2000000)
- timeout_usecs = 2000000;
+ unsigned timeout_msecs = byte_cnt >> 8;
+ unsigned long start;
+
+ if (timeout_msecs < 2000)
+ timeout_msecs = 2000;
/* Always read / write data through the CPU */
setbits_le32(&priv->reg->gctrl, SUNXI_MMC_GCTRL_ACCESS_BY_AHB);
+ start = get_timer(0);
+
for (i = 0; i < (byte_cnt >> 2); i++) {
while (readl(&priv->reg->status) & status_bit) {
- if (!timeout_usecs--)
+ if (get_timer(start) > timeout_msecs)
return -1;
- udelay(1);
}
if (reading)
@@ -304,16 +308,16 @@ static int mmc_rint_wait(struct sunxi_mmc_priv *priv, struct mmc *mmc,
uint timeout_msecs, uint done_bit, const char *what)
{
unsigned int status;
+ unsigned long start = get_timer(0);
do {
status = readl(&priv->reg->rint);
- if (!timeout_msecs-- ||
+ if ((get_timer(start) > timeout_msecs) ||
(status & SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT)) {
debug("%s timeout %x\n", what,
status & SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT);
return -ETIMEDOUT;
}
- udelay(1000);
} while (!(status & done_bit));
return 0;
@@ -405,15 +409,16 @@ static int sunxi_mmc_send_cmd_common(struct sunxi_mmc_priv *priv,
}
if (cmd->resp_type & MMC_RSP_BUSY) {
+ unsigned long start = get_timer(0);
timeout_msecs = 2000;
+
do {
status = readl(&priv->reg->status);
- if (!timeout_msecs--) {
+ if (get_timer(start) > timeout_msecs) {
debug("busy timeout\n");
error = -ETIMEDOUT;
goto out;
}
- udelay(1000);
} while (status & SUNXI_MMC_STATUS_CARD_DATA_BUSY);
}