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authorDario Binacchi <dariobin@libero.it>2020-05-27 13:56:20 +0200
committerTom Rini <trini@konsulko.com>2020-07-08 17:21:46 -0400
commit9f6a14c47ff95354185248ea6e7b1c695e64939e (patch)
tree980cba335253d0a47cdc06246d2f82cc18214ca8 /drivers/mtd
parent585b468a8c73df0445e994443a39869697fc53a8 (diff)
downloadu-boot-9f6a14c47ff95354185248ea6e7b1c695e64939e.tar.gz
spl: fit: nand: fix fit loading in case of bad blocks
The offset at which the image to be loaded from NAND is located is retrieved from the itb header. The presence of bad blocks in the area of the NAND where the itb image is located could invalidate the offset which must therefore be adjusted taking into account the state of the sectors concerned. cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/nand/raw/nand_spl_loaders.c28
1 files changed, 28 insertions, 0 deletions
diff --git a/drivers/mtd/nand/raw/nand_spl_loaders.c b/drivers/mtd/nand/raw/nand_spl_loaders.c
index 177c12b581..4befc75c04 100644
--- a/drivers/mtd/nand/raw/nand_spl_loaders.c
+++ b/drivers/mtd/nand/raw/nand_spl_loaders.c
@@ -41,6 +41,34 @@ int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
return 0;
}
+/**
+ * nand_spl_adjust_offset - Adjust offset from a starting sector
+ * @sector: Address of the sector
+ * @offs: Offset starting from @sector
+ *
+ * If one or more bad blocks are in the address space between @sector
+ * and @sector + @offs, @offs is increased by the NAND block size for
+ * each bad block found.
+ */
+u32 nand_spl_adjust_offset(u32 sector, u32 offs)
+{
+ unsigned int block, lastblock;
+
+ block = sector / CONFIG_SYS_NAND_BLOCK_SIZE;
+ lastblock = (sector + offs) / CONFIG_SYS_NAND_BLOCK_SIZE;
+
+ while (block <= lastblock) {
+ if (nand_is_bad_block(block)) {
+ offs += CONFIG_SYS_NAND_BLOCK_SIZE;
+ lastblock++;
+ }
+
+ block++;
+ }
+
+ return offs;
+}
+
#ifdef CONFIG_SPL_UBI
/*
* Temporary storage for non NAND page aligned and non NAND page sized