diff options
| author | Marek Vasut <marek.vasut+renesas@gmail.com> | 2019-03-04 22:39:51 +0100 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2019-04-09 18:19:10 +0200 |
| commit | 8719ca81136474277d117975082c48a19d307b30 (patch) | |
| tree | 2a60eb64d2dd9e42be22e0c5bebb82ca83aa20b4 /drivers/pinctrl/renesas/sh_pfc.h | |
| parent | a6a743df242a50fe40272235fdaf2c4ba2e800f0 (diff) | |
| download | u-boot-8719ca81136474277d117975082c48a19d307b30.tar.gz | |
pinctrl: renesas: Synchronize Gen3 tables with Linux 5.0
Synchronize R-Car Gen3 pin control tables with Linux 5.0,
commit 1c163f4c7b3f621efff9b28a47abb36f7378d783 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'drivers/pinctrl/renesas/sh_pfc.h')
| -rw-r--r-- | drivers/pinctrl/renesas/sh_pfc.h | 34 |
1 files changed, 31 insertions, 3 deletions
diff --git a/drivers/pinctrl/renesas/sh_pfc.h b/drivers/pinctrl/renesas/sh_pfc.h index 13d9b99935..09e11d31b3 100644 --- a/drivers/pinctrl/renesas/sh_pfc.h +++ b/drivers/pinctrl/renesas/sh_pfc.h @@ -66,6 +66,12 @@ struct sh_pfc_pin_group { .nr_pins = ARRAY_SIZE(n##__VA_ARGS__##_pins.data##s), \ } +union vin_data12 { + unsigned int data12[12]; + unsigned int data10[10]; + unsigned int data8[8]; +}; + union vin_data16 { unsigned int data16[16]; unsigned int data12[12]; @@ -282,6 +288,7 @@ extern const struct sh_pfc_soc_info r8a77965_pinmux_info; extern const struct sh_pfc_soc_info r8a77970_pinmux_info; extern const struct sh_pfc_soc_info r8a77990_pinmux_info; extern const struct sh_pfc_soc_info r8a77995_pinmux_info; + /* ----------------------------------------------------------------------------- * Helper macros to create pin and port lists */ @@ -351,6 +358,28 @@ extern const struct sh_pfc_soc_info r8a77995_pinmux_info; PINMUX_DATA(fn##_MARK, FN_##msel, FN_##fn, FN_##ipsr) /* + * Describe a pinmux configuration similar to PINMUX_IPSR_MSEL, but with + * an additional select register that controls physical multiplexing + * with another pin. + * - ipsr: IPSR field + * - fn: Function name, also referring to the IPSR field + * - psel: Physical multiplexing selector + * - msel: Module selector + */ +#define PINMUX_IPSR_PHYS_MSEL(ipsr, fn, psel, msel) \ + PINMUX_DATA(fn##_MARK, FN_##psel, FN_##msel, FN_##fn, FN_##ipsr) + +/* + * Describe a pinmux configuration in which a pin is physically multiplexed + * with other pins. + * - ipsr: IPSR field + * - fn: Function name, also referring to the IPSR field + * - psel: Physical multiplexing selector + */ +#define PINMUX_IPSR_PHYS(ipsr, fn, psel) \ + PINMUX_DATA(fn##_MARK, FN_##psel) + +/* * Describe a pinmux configuration for a single-function pin with GPIO * capability. * - fn: Function name @@ -397,12 +426,11 @@ extern const struct sh_pfc_soc_info r8a77995_pinmux_info; #define PORT_GP_CFG_11(bank, fn, sfx, cfg) \ PORT_GP_CFG_10(bank, fn, sfx, cfg), \ - PORT_GP_CFG_1(bank, 10, fn, sfx, cfg) + PORT_GP_CFG_1(bank, 10, fn, sfx, cfg) #define PORT_GP_11(bank, fn, sfx) PORT_GP_CFG_11(bank, fn, sfx, 0) #define PORT_GP_CFG_12(bank, fn, sfx, cfg) \ - PORT_GP_CFG_10(bank, fn, sfx, cfg), \ - PORT_GP_CFG_1(bank, 10, fn, sfx, cfg), \ + PORT_GP_CFG_11(bank, fn, sfx, cfg), \ PORT_GP_CFG_1(bank, 11, fn, sfx, cfg) #define PORT_GP_12(bank, fn, sfx) PORT_GP_CFG_12(bank, fn, sfx, 0) |