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authorKen Ma <make@marvell.com>2018-03-26 15:55:59 +0800
committerStefan Roese <sr@denx.de>2018-03-30 12:52:48 +0200
commit44ac747bdfceeefdf3cd70caed05eddfe23affb8 (patch)
treefd0f689106aacd9986b7870b7f0168bf6216a891 /drivers/pinctrl
parent4382e53e962a8f3fb34cd0747061987a477a5d64 (diff)
downloadu-boot-44ac747bdfceeefdf3cd70caed05eddfe23affb8.tar.gz
arm64: a37xx: pinctrl: Fix number of pin in south bridge
On the south bridge we have pin from 0 to 29, so it gives 30 pins (and not 29). Reviewed-on: http://vgitil04.il.marvell.com:8080/43285 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Hua Jing <jinghua@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Ken Ma <make@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r--drivers/pinctrl/mvebu/pinctrl-armada-37xx.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
index 2bf853eba1..d058fbace8 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
@@ -189,7 +189,7 @@ const struct armada_37xx_pin_data armada_37xx_pin_nb = {
};
const struct armada_37xx_pin_data armada_37xx_pin_sb = {
- .nr_pins = 29,
+ .nr_pins = 30,
.name = "GPIO2",
.groups = armada_37xx_sb_groups,
.ngroups = ARRAY_SIZE(armada_37xx_sb_groups),