diff options
| author | Simon Glass <sjg@chromium.org> | 2020-12-22 19:30:28 -0700 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2021-01-05 12:24:40 -0700 |
| commit | 0fd3d91152df5bb6c5f7b9ee68f01a9a1c9a875d (patch) | |
| tree | 1dbc5b936b98393e343cc99a40382b2734ac778e /drivers/pinctrl | |
| parent | 12559f5bab3e43b603dccfa6c354ffd7da03249c (diff) | |
| download | u-boot-0fd3d91152df5bb6c5f7b9ee68f01a9a1c9a875d.tar.gz | |
dm: Use access methods for dev/uclass private data
Most drivers use these access methods but a few do not. Update them.
In some cases the access is not permitted, so mark those with a FIXME tag
for the maintainer to check.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Pratyush Yadav <p.yadav@ti.com>
Diffstat (limited to 'drivers/pinctrl')
| -rw-r--r-- | drivers/pinctrl/pinctrl-qe-io.c | 4 | ||||
| -rw-r--r-- | drivers/pinctrl/pinctrl-single.c | 6 |
2 files changed, 5 insertions, 5 deletions
diff --git a/drivers/pinctrl/pinctrl-qe-io.c b/drivers/pinctrl/pinctrl-qe-io.c index 690e5c7706..e129ab2f83 100644 --- a/drivers/pinctrl/pinctrl-qe-io.c +++ b/drivers/pinctrl/pinctrl-qe-io.c @@ -122,7 +122,7 @@ void qe_config_iopin(u8 port, u8 pin, int dir, int open_drain, int assign) #else static int qe_io_of_to_plat(struct udevice *dev) { - struct qe_io_plat *plat = dev->plat; + struct qe_io_plat *plat = dev_get_plat(dev); fdt_addr_t addr; addr = dev_read_addr(dev); @@ -143,7 +143,7 @@ static int qe_io_of_to_plat(struct udevice *dev) */ static int par_io_of_config_node(struct udevice *dev, ofnode pio) { - struct qe_io_plat *plat = dev->plat; + struct qe_io_plat *plat = dev_get_plat(dev); qepio83xx_t *par_io = plat->base; const unsigned int *pio_map; int pio_map_len; diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index 25d646a26f..20c3c82aa9 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c @@ -47,7 +47,7 @@ static int single_configure_pins(struct udevice *dev, const struct single_fdt_pin_cfg *pins, int size) { - struct single_pdata *pdata = dev->plat; + struct single_pdata *pdata = dev_get_plat(dev); int count = size / sizeof(struct single_fdt_pin_cfg); phys_addr_t n, reg; u32 val; @@ -81,7 +81,7 @@ static int single_configure_bits(struct udevice *dev, const struct single_fdt_bits_cfg *pins, int size) { - struct single_pdata *pdata = dev->plat; + struct single_pdata *pdata = dev_get_plat(dev); int count = size / sizeof(struct single_fdt_bits_cfg); phys_addr_t n, reg; u32 val, mask; @@ -153,7 +153,7 @@ static int single_of_to_plat(struct udevice *dev) fdt_addr_t addr; u32 of_reg[2]; int res; - struct single_pdata *pdata = dev->plat; + struct single_pdata *pdata = dev_get_plat(dev); pdata->width = dev_read_u32_default(dev, "pinctrl-single,register-width", 0); |