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| author | Patrick Delaunay <patrick.delaunay@st.com> | 2018-05-17 14:50:45 +0200 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-05-26 18:19:18 -0400 |
| commit | bc709a41caadc3323f912633b646cc8314c6cd01 (patch) | |
| tree | 848d76af4c53868fe37e15c4320e989b056f0254 /drivers/serial/serial_stm32.h | |
| parent | eae4764f1ac2f3968a5c87a17b2e894a5fe05d0b (diff) | |
| download | u-boot-bc709a41caadc3323f912633b646cc8314c6cd01.tar.gz | |
serial: stm32: Add setparity support
Add possibility to update the serial parity used.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Diffstat (limited to 'drivers/serial/serial_stm32.h')
| -rw-r--r-- | drivers/serial/serial_stm32.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/serial/serial_stm32.h b/drivers/serial/serial_stm32.h index c478e35070..ccafa31219 100644 --- a/drivers/serial/serial_stm32.h +++ b/drivers/serial/serial_stm32.h @@ -13,6 +13,7 @@ #define ISR_OFFSET(x) (x ? 0x00 : 0x1c) #define ICR_OFFSET 0x20 + /* * STM32F4 has one Data Register (DR) for received or transmitted * data, so map Receive Data Register (RDR) and Transmit Data @@ -53,7 +54,11 @@ struct stm32x7_serial_platdata { }; #define USART_CR1_FIFOEN BIT(29) +#define USART_CR1_M1 BIT(28) #define USART_CR1_OVER8 BIT(15) +#define USART_CR1_M0 BIT(12) +#define USART_CR1_PCE BIT(10) +#define USART_CR1_PS BIT(9) #define USART_CR1_TE BIT(3) #define USART_CR1_RE BIT(2) @@ -62,10 +67,13 @@ struct stm32x7_serial_platdata { #define USART_ISR_TXE BIT(7) #define USART_ISR_RXNE BIT(5) #define USART_ISR_ORE BIT(3) +#define USART_ISR_PE BIT(0) #define USART_BRR_F_MASK GENMASK(7, 0) #define USART_BRR_M_SHIFT 4 #define USART_BRR_M_MASK GENMASK(15, 4) #define USART_ICR_ORECF BIT(3) +#define USART_ICR_PCECF BIT(0) + #endif |