diff options
| author | Patrice Chotard <patrice.chotard@st.com> | 2018-05-14 15:42:56 +0200 |
|---|---|---|
| committer | Jagan Teki <jagan@amarulasolutions.com> | 2018-05-16 18:41:21 +0530 |
| commit | 5e46123bf3fe2cc67c30f36b64b5d2c460ca5bc9 (patch) | |
| tree | 7a33778a1bc1ef203561ceaf8def38f74b1a438d /drivers | |
| parent | 2a6ca736919835a04dbac235509afd7c201dd5cf (diff) | |
| download | u-boot-5e46123bf3fe2cc67c30f36b64b5d2c460ca5bc9.tar.gz | |
spi: stm32_qspi: Add reset support
In some situation, QSPI controller is already configured by an early
boot stage, adding reset support will insure that QSPI controller is
started from a pristine state.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/spi/stm32_qspi.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c index 62875e2e4c..f6cc353363 100644 --- a/drivers/spi/stm32_qspi.c +++ b/drivers/spi/stm32_qspi.c @@ -12,6 +12,7 @@ #include <dm.h> #include <errno.h> #include <malloc.h> +#include <reset.h> #include <spi.h> #include <spi_flash.h> #include <asm/io.h> @@ -457,6 +458,7 @@ static int stm32_qspi_probe(struct udevice *bus) struct stm32_qspi_priv *priv = dev_get_priv(bus); struct dm_spi_bus *dm_spi_bus; struct clk clk; + struct reset_ctl reset_ctl; int ret; dm_spi_bus = bus->uclass_priv; @@ -484,6 +486,19 @@ static int stm32_qspi_probe(struct udevice *bus) return priv->clock_rate; } + ret = reset_get_by_index(bus, 0, &reset_ctl); + if (ret) { + if (ret != -ENOENT) { + dev_err(bus, "failed to get reset\n"); + clk_disable(&clk); + return ret; + } + } else { + /* Reset QSPI controller */ + reset_assert(&reset_ctl); + udelay(2); + reset_deassert(&reset_ctl); + } setbits_le32(&priv->regs->cr, STM32_QSPI_CR_SSHIFT); |