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| author | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2019-02-03 16:17:30 +0100 |
|---|---|---|
| committer | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2019-05-01 00:00:04 +0200 |
| commit | 7e0e5c552f2afcb9b6eeb2836232dfc4bbe29865 (patch) | |
| tree | 4ce5f74f2c64f79aa6f122200bcc91246b33d5fb /drivers | |
| parent | b6101e906f5afbb35d1980965f0633a3ca412616 (diff) | |
| download | u-boot-7e0e5c552f2afcb9b6eeb2836232dfc4bbe29865.tar.gz | |
rockchip: spi: only wait for completion, if transmitting
The logic in the main transmit loop took a bit of reading the TRM to
fully understand (due to silent assumptions based in internal logic):
the "wait until idle" at the end of each iteration through the loop is
required for the transmit-path as each clearing of the ENA register
(to update run-length in the CTRLR1 register) will implicitly flush
the FIFOs... transmisson can therefore not overlap loop iterations.
This change adds a comment to clarify the reason/need for waiting
until the controller becomes idle and wraps the entire check into an
'if (out)' to make it clear that this is required for transfers with a
transmit-component only (for transfers having a receive-component,
completion of the transmit-side is trivially ensured by having
received the correct number of bytes).
The change does not increase execution time measurably in any of my
tests.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/spi/rk_spi.c | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/drivers/spi/rk_spi.c b/drivers/spi/rk_spi.c index aaf244d426..c807d78185 100644 --- a/drivers/spi/rk_spi.c +++ b/drivers/spi/rk_spi.c @@ -379,9 +379,18 @@ static int rockchip_spi_xfer(struct udevice *dev, unsigned int bitlen, toread--; } } - ret = rkspi_wait_till_not_busy(regs); - if (ret) - break; + + /* + * In case that there's a transmit-component, we need to wait + * until the control goes idle before we can disable the SPI + * control logic (as this will implictly flush the FIFOs). + */ + if (out) { + ret = rkspi_wait_till_not_busy(regs); + if (ret) + break; + } + len -= todo; } |