diff options
author | Tom Rini <trini@konsulko.com> | 2018-10-16 13:57:23 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2018-10-16 13:57:23 -0400 |
commit | d0423c44f1acc68da10da8c16af4d82016479d7b (patch) | |
tree | b361709388fef7be02c48fe78dfe16c083cb0a04 /drivers | |
parent | 2364b70c87a8d4ac327a44161df32d2c8e209545 (diff) | |
parent | b92055064e56207e284ae966dbd7bd407a7b0e8d (diff) | |
download | u-boot-d0423c44f1acc68da10da8c16af4d82016479d7b.tar.gz |
Merge git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.11-rc2-v2
FPGA:
- Fix SPL fpga loading from FIT
ARM64:
- Fix gic accesses in EL2/EL1
Xilinx:
- Add dlc20 board support
- Add Versal board support
- Sync defconfigs
- Enable MP via Kconfig
- Add missing efuse node
- Enable CDC for zcu100
cmd:
- Fix kgdb Kconfig dependency
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/mmc/Kconfig | 2 | ||||
-rw-r--r-- | drivers/net/Kconfig | 2 | ||||
-rw-r--r-- | drivers/net/zynq_gem.c | 4 | ||||
-rw-r--r-- | drivers/spi/Kconfig | 4 |
4 files changed, 8 insertions, 4 deletions
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 0a0d4aaf6c..27246ee465 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -538,7 +538,7 @@ config MMC_SDHCI_TEGRA config MMC_SDHCI_ZYNQ bool "Arasan SDHCI controller support" - depends on ARCH_ZYNQ || ARCH_ZYNQMP + depends on ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL depends on DM_MMC && OF_CONTROL && BLK depends on MMC_SDHCI help diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 5441da47d1..f1f0e2d94e 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -344,7 +344,7 @@ config XILINX_EMACLITE This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs. config ZYNQ_GEM - depends on DM_ETH && (ARCH_ZYNQ || ARCH_ZYNQMP) + depends on DM_ETH && (ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL) select PHYLIB bool "Xilinx Ethernet GEM" help diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index e22d048e8f..bc33126536 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -461,6 +461,7 @@ static int zynq_gem_init(struct udevice *dev) break; } +#if !defined(CONFIG_ARCH_VERSAL) ret = clk_set_rate(&priv->clk, clk_rate); if (IS_ERR_VALUE(ret) && ret != (unsigned long)-ENOSYS) { dev_err(dev, "failed to set tx clock rate\n"); @@ -472,6 +473,9 @@ static int zynq_gem_init(struct udevice *dev) dev_err(dev, "failed to enable tx clock\n"); return ret; } +#else + debug("requested clk_rate %ld\n", clk_rate); +#endif setbits_le32(®s->nwctrl, ZYNQ_GEM_NWCTRL_RXEN_MASK | ZYNQ_GEM_NWCTRL_TXEN_MASK); diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 1df6876e9b..516188ea88 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -243,7 +243,7 @@ config XILINX_SPI config ZYNQ_SPI bool "Zynq SPI driver" - depends on ARCH_ZYNQ || ARCH_ZYNQMP + depends on ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL help Enable the Zynq SPI driver. This driver can be used to access the SPI NOR flash on platforms embedding this Zynq @@ -260,7 +260,7 @@ config ZYNQ_QSPI config ZYNQMP_GQSPI bool "Configure ZynqMP Generic QSPI" - depends on ARCH_ZYNQMP + depends on ARCH_ZYNQMP || ARCH_VERSAL help This option is used to enable ZynqMP QSPI controller driver which is used to communicate with qspi flash devices. |