diff options
| author | Mario Six <mario.six@gdsys.cc> | 2019-01-21 09:17:58 +0100 |
|---|---|---|
| committer | Mario Six <mario.six@gdsys.cc> | 2019-05-21 07:52:33 +0200 |
| commit | 9c5df7a2a9f72ee397a67c2f19476566a35d7c18 (patch) | |
| tree | 3d93af511fb2792737f7b45dbdac6d97b3757da3 /include/configs/MPC8313ERDB_NOR.h | |
| parent | 30915ab95d9a95328623010390d94da1325529f9 (diff) | |
| download | u-boot-9c5df7a2a9f72ee397a67c2f19476566a35d7c18.tar.gz | |
mpc83xx: Migrate LBLAW_* to Kconfig
The LBLAW_* values determine the window configuration of the memory
controller. Hence, they must be known at compile time, and cannot be
implemented in the DT mechanism.
Configuration of this crucial variable should still be somewhat
comfortable. Hence, make its fields configurable in Kconfig, and
assemble the final value from these.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Diffstat (limited to 'include/configs/MPC8313ERDB_NOR.h')
| -rw-r--r-- | include/configs/MPC8313ERDB_NOR.h | 18 |
1 files changed, 0 insertions, 18 deletions
diff --git a/include/configs/MPC8313ERDB_NOR.h b/include/configs/MPC8313ERDB_NOR.h index 9d1ce200ec..1b2bba96d3 100644 --- a/include/configs/MPC8313ERDB_NOR.h +++ b/include/configs/MPC8313ERDB_NOR.h @@ -153,10 +153,6 @@ | OR_GPCM_EHTR \ | OR_GPCM_EAD) /* 0xFF006FF7 TODO SLOW 16 MB flash size */ - /* window base at flash base */ -#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE - /* 16 MB window size */ -#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_16MB) #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ #define CONFIG_SYS_MAX_FLASH_SECT 135 /* sectors per device */ @@ -222,12 +218,6 @@ #define CONFIG_SYS_NAND_BR_PRELIM CONFIG_SYS_BR1_PRELIM #define CONFIG_SYS_NAND_OR_PRELIM CONFIG_SYS_OR1_PRELIM -#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_NAND_BASE -#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_32KB) - -#define CONFIG_SYS_NAND_LBLAWBAR_PRELIM CONFIG_SYS_LBLAWBAR1_PRELIM -#define CONFIG_SYS_NAND_LBLAWAR_PRELIM CONFIG_SYS_LBLAWAR1_PRELIM - /* local bus write LED / read status buffer (BCSR) mapping */ #define CONFIG_SYS_BCSR_ADDR 0xFA000000 #define CONFIG_SYS_BCSR_SIZE (32 * 1024) /* 0x00008000 */ @@ -246,9 +236,6 @@ | OR_GPCM_EHTR_SET \ | OR_GPCM_EAD) /* 0xFFFF8FF7 */ -#define CONFIG_SYS_LBLAWBAR3_PRELIM CONFIG_SYS_BCSR_ADDR -#define CONFIG_SYS_LBLAWAR3_PRELIM (LBLAWAR_EN | LBLAWAR_32KB) - /* Vitesse 7385 */ #ifdef CONFIG_VSC7385_ENET @@ -270,11 +257,6 @@ | OR_GPCM_EHTR_SET \ | OR_GPCM_EAD) /* 0xFFFE09FF */ - - /* Access window base at VSC7385 base */ -#define CONFIG_SYS_LBLAWBAR2_PRELIM CONFIG_SYS_VSC7385_BASE -#define CONFIG_SYS_LBLAWAR2_PRELIM (LBLAWAR_EN | LBLAWAR_128KB) - #endif #define CONFIG_MPC83XX_GPIO 1 |