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author | Hou Zhiqiang <Zhiqiang.Hou@nxp.com> | 2019-05-23 11:52:44 +0800 |
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committer | Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> | 2019-06-20 10:44:09 +0530 |
commit | 2b12f6cfe6239d8b6b8c5e7b0c5b5851f7bc489a (patch) | |
tree | 6d0ebb01974bb833c5a5be3f379919e7256259f1 /include/configs/T208xQDS.h | |
parent | c16dfd016afb92771d425ae84a2949da1d7e112b (diff) | |
download | u-boot-2b12f6cfe6239d8b6b8c5e7b0c5b5851f7bc489a.tar.gz |
powerpc: mpc85xx: Move CONFIG_FSL_PCIE_RESET to Kconfig
Use the Kconfig option to select the PCIe reset errata.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Diffstat (limited to 'include/configs/T208xQDS.h')
-rw-r--r-- | include/configs/T208xQDS.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 98bb3342b9..f09a9ddf3b 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -491,7 +491,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ #define CONFIG_PCIE4 /* PCIE controller 4 */ -#define CONFIG_FSL_PCIE_RESET /* pcie reset fix link width 2x-4x*/ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ /* controller 1, direct to uli, tgtid 3, Base address 20000 */ |