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| author | Fabio Estevam <fabio.estevam@freescale.com> | 2014-11-14 11:27:23 -0200 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2014-11-20 10:30:19 +0100 |
| commit | cdbdde3f56e1752d7a3f479693251f0ab459431a (patch) | |
| tree | debac2e248e34f431c0504308137eaabb98b43aa /include/configs/mx6qsabreauto.h | |
| parent | 573960aca5c420c7c62ff49c0ab13a4a9c50c7b3 (diff) | |
| download | u-boot-cdbdde3f56e1752d7a3f479693251f0ab459431a.tar.gz | |
mx6qsabreauto: Add parallel NOR flash support
mx6sabreauto boards come with 32 MiB of parallel NOR flash.
Add support for it:
U-Boot 2015.01-rc1-18107-g1543636-dirty (Nov 14 2014 - 11:11:04)
CPU: Freescale i.MX6Q rev1.2 at 792 MHz
Reset cause: POR
Board: MX6Q-Sabreauto revA
I2C: ready
DRAM: 2 GiB
Flash: 32 MiB
NAND: 0 MiB
Due to pin conflict with I2C3, only define configure I2C3 IOMUX when flash is
not used.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Diffstat (limited to 'include/configs/mx6qsabreauto.h')
| -rw-r--r-- | include/configs/mx6qsabreauto.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/include/configs/mx6qsabreauto.h b/include/configs/mx6qsabreauto.h index 3f1c88e239..559937a712 100644 --- a/include/configs/mx6qsabreauto.h +++ b/include/configs/mx6qsabreauto.h @@ -37,6 +37,16 @@ #include "mx6sabre_common.h" +#undef CONFIG_SYS_NO_FLASH +#define CONFIG_SYS_FLASH_BASE WEIM_ARB_BASE_ADDR +#define CONFIG_SYS_FLASH_SECT_SIZE (128 * 1024) +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ +#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ +#define CONFIG_FLASH_CFI_DRIVER /* Use drivers/cfi_flash.c */ +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* Use buffered writes*/ +#define CONFIG_SYS_FLASH_EMPTY_INFO + #define CONFIG_SYS_FSL_USDHC_NUM 2 #if defined(CONFIG_ENV_IS_IN_MMC) #define CONFIG_SYS_MMC_ENV_DEV 0 |