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| author | Nicolas Ferre <nicolas.ferre@microchip.com> | 2019-08-08 07:48:26 +0000 |
|---|---|---|
| committer | Eugen Hristev <eugen.hristev@microchip.com> | 2019-10-08 09:16:11 +0300 |
| commit | 44b5c40be3dc4f063ec8bec1f3a71b1160e3788c (patch) | |
| tree | 9f0070c78bade327c5b40f4039637fb4aee1a613 /include/configs/sama5d27_wlsom1_ek.h | |
| parent | 00561e7d24e0d1986a6ed896003a03618a9ca17c (diff) | |
| download | u-boot-44b5c40be3dc4f063ec8bec1f3a71b1160e3788c.tar.gz | |
board: atmel: add sama5d27_wlsom1_ek board
Add support for the SAMA5D27-WLSOM1-EK. It's based on the Microchip
WireLess SoM which contains the SAMa5D27 LPDDR2 2Gbits SiP.
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
[eugen.hristev@microchip.com]: added u-boot specific dtsi and ported to 2019.10
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Diffstat (limited to 'include/configs/sama5d27_wlsom1_ek.h')
| -rw-r--r-- | include/configs/sama5d27_wlsom1_ek.h | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/include/configs/sama5d27_wlsom1_ek.h b/include/configs/sama5d27_wlsom1_ek.h new file mode 100644 index 0000000000..cc41560c1f --- /dev/null +++ b/include/configs/sama5d27_wlsom1_ek.h @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Configuration file for the SAMA5D27 WLSOM1 EK Board. + * + * Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries + * + * Author: Nicolas Ferre <nicolas.ferre@microcihp.com> + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "at91-sama5_common.h" + +#undef CONFIG_SYS_AT91_MAIN_CLOCK +#define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ + +/* SDRAM */ +#define CONFIG_SYS_SDRAM_BASE 0x20000000 +#define CONFIG_SYS_SDRAM_SIZE 0x10000000 + +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) + +#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ + +/* NAND flash */ +#undef CONFIG_CMD_NAND + +#ifdef CONFIG_SD_BOOT +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 +#endif + +#endif |