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authorSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>2019-04-02 21:29:41 +0200
committerMarek Vasut <marex@denx.de>2019-04-25 00:00:49 +0200
commit4aab2329b282956b3a8a22de7bd30116d1c8df20 (patch)
treebe48725fa5bef36b878048dbfc4e6004961675b2 /include/configs/socfpga_sr1500.h
parentfaea9e7a78d78b178a26198ab8459f6daf423792 (diff)
downloadu-boot-4aab2329b282956b3a8a22de7bd30116d1c8df20.tar.gz
arm: socfpga: clean up board config files
Remove outdated defines (not used any more, outdated due to DM conversion) from various socfpga files in include/config. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Marek Vasut <marex@denx.de> Series-version: 3 Series-changes: 2 - added (this) patch with further cleanups to the socfpga board config files
Diffstat (limited to 'include/configs/socfpga_sr1500.h')
-rw-r--r--include/configs/socfpga_sr1500.h11
1 files changed, 0 insertions, 11 deletions
diff --git a/include/configs/socfpga_sr1500.h b/include/configs/socfpga_sr1500.h
index b6a98611c0..3a8ccc3021 100644
--- a/include/configs/socfpga_sr1500.h
+++ b/include/configs/socfpga_sr1500.h
@@ -19,8 +19,6 @@
/* The PHY is autodetected, so no MII PHY address is needed here */
#define PHY_ANEG_TIMEOUT 8000
-/* Environment */
-
/* Enable SPI NOR flash reset, needed for SPI booting */
#define CONFIG_SPI_N25Q256A_RESET
@@ -36,15 +34,6 @@
#define CONFIG_ENV_OFFSET 0x000e0000
#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE)
-/*
- * The QSPI NOR flash layout on SR1500:
- *
- * 0000.0000 - 0003.ffff: SPL (4 times)
- * 0004.0000 - 000d.ffff: U-Boot
- * 000e.0000 - 000e.ffff: env1
- * 000f.0000 - 000f.ffff: env2
- */
-
/* The rest of the configuration is shared */
#include <configs/socfpga_common.h>