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authorMarco Franchi <marco.franchi@nxp.com>2016-06-10 14:45:28 -0300
committerStefano Babic <sbabic@denx.de>2016-06-18 10:35:05 +0200
commit0a35cc9395b7e4e5bc2b1370016f7c3156f945a4 (patch)
tree800fe91a261db87ef06479d73ca9ce7d9e9c496b /include/configs/warp7.h
parent0d7cdc2abfc34125f0bc85f864d285f06675290a (diff)
downloadu-boot-0a35cc9395b7e4e5bc2b1370016f7c3156f945a4.tar.gz
warp7: Fix watchdog reset
The latest version of warp7 board provides the connection of the WDOG1_B pin to the PMIC. Program the watchdog to enable the WDOG1_B output which causes a POR reset. Based on the imx7dsabresd code. Signed-off-by: Marco Franchi <marco.franchi@nxp.com> Acked-by: Fabio Estevam <fabio.estevam@nxp.com>
Diffstat (limited to 'include/configs/warp7.h')
-rw-r--r--include/configs/warp7.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/configs/warp7.h b/include/configs/warp7.h
index f112fa5f16..8b9ed2b032 100644
--- a/include/configs/warp7.h
+++ b/include/configs/warp7.h
@@ -19,6 +19,7 @@
#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_LATE_INIT
/* MMC Config*/
#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR