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authorChris Brandt <chris.brandt@renesas.com>2017-08-23 14:53:59 -0500
committerMarek Vasut <marex@denx.de>2019-05-07 05:41:32 +0200
commit3529596442c9cf588b7b8a3e7573f0ff9d8ed350 (patch)
tree43788e18c840f67244a5cfd6171c1e1625f3f313 /include/dt-bindings/pinctrl
parentb5b665679453fe8ad3b3c67b44c88d2e812ca45c (diff)
downloadu-boot-3529596442c9cf588b7b8a3e7573f0ff9d8ed350.tar.gz
ARM: dts: renesas: Add RZ/A1 platform code
Add platform code and DTs for Renesas RZ/A1 R7S72100 SoC. Distinguishing feature of this SoC is that it has up to 10 MiB of on-SoC static RAM (SRAM). The DTs are imported from Linux 5.0.11, commit d5a2675b207d . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'include/dt-bindings/pinctrl')
-rw-r--r--include/dt-bindings/pinctrl/r7s72100-pinctrl.h18
1 files changed, 18 insertions, 0 deletions
diff --git a/include/dt-bindings/pinctrl/r7s72100-pinctrl.h b/include/dt-bindings/pinctrl/r7s72100-pinctrl.h
new file mode 100644
index 0000000000..31ee37610e
--- /dev/null
+++ b/include/dt-bindings/pinctrl/r7s72100-pinctrl.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Defines macros and constants for Renesas RZ/A1 pin controller pin
+ * muxing functions.
+ */
+#ifndef __DT_BINDINGS_PINCTRL_RENESAS_RZA1_H
+#define __DT_BINDINGS_PINCTRL_RENESAS_RZA1_H
+
+#define RZA1_PINS_PER_PORT 16
+
+/*
+ * Create the pin index from its bank and position numbers and store in
+ * the upper 16 bits the alternate function identifier
+ */
+#define RZA1_PINMUX(b, p, f) \
+ ((b) * RZA1_PINS_PER_PORT + (p) | ((f) << 16))
+
+#endif /* __DT_BINDINGS_PINCTRL_RENESAS_RZA1_H */