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authorPeter Tyser <ptyser@xes-inc.com>2009-06-30 17:15:51 -0500
committerKumar Gala <galak@kernel.crashing.org>2009-07-02 11:15:57 -0500
commite94e460c6e8741f42dab6d8dd4b596ba5d9d79ae (patch)
tree35d8c3f5a8070fe16cffb4d4212fe469a2d8a69b /include/mpc83xx.h
parent9adda5459ca62120c0c50b82b766fe1cf6925bbf (diff)
downloadu-boot-e94e460c6e8741f42dab6d8dd4b596ba5d9d79ae.tar.gz
83xx: Add support for fsl_dma driver
Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Reviewed-by: Ira W. Snyder <iws@ovro.caltech.edu> Tested-by: Ira W. Snyder <iws@ovro.caltech.edu> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/mpc83xx.h')
-rw-r--r--include/mpc83xx.h16
1 files changed, 0 insertions, 16 deletions
diff --git a/include/mpc83xx.h b/include/mpc83xx.h
index c5bd6cb16a..fd742c7809 100644
--- a/include/mpc83xx.h
+++ b/include/mpc83xx.h
@@ -1041,22 +1041,6 @@
#define ECC_ERROR_MAN_SBEC (0xff000000>>24) /* Single Bit Error Counter 0..255 */
#define ECC_ERROR_MAN_SBEC_SHIFT 0
-/* DMAMR - DMA Mode Register
- */
-#define DMA_CHANNEL_START 0x00000001 /* Bit - DMAMRn CS */
-#define DMA_CHANNEL_TRANSFER_MODE_DIRECT 0x00000004 /* Bit - DMAMRn CTM */
-#define DMA_CHANNEL_SOURCE_ADRESSS_HOLD_EN 0x00001000 /* Bit - DMAMRn SAHE */
-#define DMA_CHANNEL_SOURCE_ADDRESS_HOLD_1B 0x00000000 /* 2Bit- DMAMRn SAHTS 1byte */
-#define DMA_CHANNEL_SOURCE_ADDRESS_HOLD_2B 0x00004000 /* 2Bit- DMAMRn SAHTS 2bytes */
-#define DMA_CHANNEL_SOURCE_ADDRESS_HOLD_4B 0x00008000 /* 2Bit- DMAMRn SAHTS 4bytes */
-#define DMA_CHANNEL_SOURCE_ADDRESS_HOLD_8B 0x0000c000 /* 2Bit- DMAMRn SAHTS 8bytes */
-#define DMA_CHANNEL_SNOOP 0x00010000 /* Bit - DMAMRn DMSEN */
-
-/* DMASR - DMA Status Register
- */
-#define DMA_CHANNEL_BUSY 0x00000004 /* Bit - DMASRn CB */
-#define DMA_CHANNEL_TRANSFER_ERROR 0x00000080 /* Bit - DMASRn TE */
-
/* CONFIG_ADDRESS - PCI Config Address Register
*/
#define PCI_CONFIG_ADDRESS_EN 0x80000000