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authorBin Meng <bmeng.cn@gmail.com>2015-08-06 02:36:01 -0700
committerSimon Glass <sjg@chromium.org>2015-08-14 03:24:20 -0600
commit44a8b96f6488bc0392f99e6caa424539813dee20 (patch)
treed7fe3f0ee2f0e7959252098d153abfc14ddfd748 /include/pci_ids.h
parent715f599f8a0f8a0e60ee483f55eb207ade34ad49 (diff)
downloadu-boot-44a8b96f6488bc0392f99e6caa424539813dee20.tar.gz
x86: baytrail: Add all IDE/SATA PCI device IDs
The BayTrail SoC has 4 different PCI devices IDs regarding to IDE and AHCI. Add these IDs in pci_ids.h and also add the other SATA ID in the Bayley Bay and MinnowMax board configuration header. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'include/pci_ids.h')
-rw-r--r--include/pci_ids.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/include/pci_ids.h b/include/pci_ids.h
index 5771e12e72..49f7d7dd88 100644
--- a/include/pci_ids.h
+++ b/include/pci_ids.h
@@ -2602,7 +2602,10 @@
#define PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDIO 0x0f15
#define PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDCARD 0x0f16
#define PCI_DEVICE_ID_INTEL_VALLEYVIEW_LPC 0x0f1c
-#define PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA 0x0f23
+#define PCI_DEVICE_ID_INTEL_VALLEYVIEW_IDE 0x0f20
+#define PCI_DEVICE_ID_INTEL_VALLEYVIEW_IDE_ALT 0x0f21
+#define PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA 0x0f22
+#define PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT 0x0f23
#define PCI_DEVICE_ID_INTEL_82541ER 0x1078
#define PCI_DEVICE_ID_INTEL_82541GI_LF 0x107c
#define PCI_DEVICE_ID_INTEL_82542 0x1000