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| author | Shawn Guo <shawn.guo@linaro.org> | 2019-07-07 20:59:55 +0800 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2019-10-13 22:49:11 +0200 |
| commit | 6802d7951c8f5a6098a30ab686e867dc0724affc (patch) | |
| tree | 31c2bdec547fe6f3b3ac2813952ac2d497af231c /include | |
| parent | ad61658dd6d81f451454074e9d41d0cf3317763f (diff) | |
| download | u-boot-6802d7951c8f5a6098a30ab686e867dc0724affc.tar.gz | |
Add i.MX7D based Meerkat96 board support
The Meerkat96 board, based on the NXP i.MX7D SoC, is a member of
96Boards community and complies with all Consumer Edition board
specifications.
https://www.novtech.com/products/meerkat96.html
https://www.96boards.org/product/imx7-96/
The initial supported/tested devices include:
- Debug serial
- SD
- USB Host (with Ethernet)
With these support, it's good enough for loading Linux Kernel from SD or
Ethernet over USB.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/meerkat96.h | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/include/configs/meerkat96.h b/include/configs/meerkat96.h new file mode 100644 index 0000000000..d0450af954 --- /dev/null +++ b/include/configs/meerkat96.h @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2019 Linaro Ltd. + * Copyright (C) 2016 NXP Semiconductors + * + * Configuration settings for Meerkat96 board. + */ + +#ifndef __MEERKAT96_CONFIG_H +#define __MEERKAT96_CONFIG_H + +#include "mx7_common.h" +#include <imximage.h> + +#define PHYS_SDRAM_SIZE SZ_512M + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) + +#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000) + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_SYS_HZ 1000 + +/* Physical Memory Map */ +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* Environment configs */ +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMC_ENV_PART 0 +#define CONFIG_ENV_SIZE SZ_8K +#define CONFIG_ENV_OFFSET (8 * SZ_64K) + +/* USB configs */ +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) + +#endif |