diff options
author | Rajesh Bhagat <rajesh.bhagat@nxp.com> | 2018-11-05 18:02:48 +0000 |
---|---|---|
committer | York Sun <york.sun@nxp.com> | 2018-12-06 14:37:19 -0800 |
commit | 8aa6b17a4d2fe4f75414da8493cf8c0fa59ccf3a (patch) | |
tree | 981b019b7c5cac5cf6ec3f3ad559a556282f4363 /include | |
parent | f71b5f1101f6445af9b0dc53d533f84c9e7a8a04 (diff) | |
download | u-boot-8aa6b17a4d2fe4f75414da8493cf8c0fa59ccf3a.tar.gz |
armv8: ls1043aqds: Add TFABOOT support
TFABOOT support includes:
- ls1043aqds_tfa_defconfig to be loaded by trusted firmware
- environment address and size changes for TFABOOT
- define BOOTCOMMAND for TFABOOT
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/configs/ls1043aqds.h | 50 |
1 files changed, 48 insertions, 2 deletions
diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index 68f202f97a..ed07d9f28e 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -196,7 +196,8 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_NAND_U_BOOT_SIZE (640 << 10) #endif -#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) +#if defined(CONFIG_TFABOOT) || \ + defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) #define CONFIG_QIXIS_I2C_ACCESS #define CONFIG_SYS_I2C_EARLY_INIT #endif @@ -251,6 +252,40 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_FPGA_FTIM3 0x0 #endif +#ifdef CONFIG_TFABOOT +#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT +#define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR +#define CONFIG_SYS_AMASK0 CONFIG_SYS_NOR_AMASK +#define CONFIG_SYS_CSOR0 CONFIG_SYS_NOR_CSOR +#define CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_NOR_FTIM0 +#define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NOR_FTIM1 +#define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NOR_FTIM2 +#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NOR_FTIM3 +#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR1_CSPR_EXT +#define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR1_CSPR +#define CONFIG_SYS_AMASK1 CONFIG_SYS_NOR_AMASK +#define CONFIG_SYS_CSOR1 CONFIG_SYS_NOR_CSOR +#define CONFIG_SYS_CS1_FTIM0 CONFIG_SYS_NOR_FTIM0 +#define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_NOR_FTIM1 +#define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NOR_FTIM2 +#define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NOR_FTIM3 +#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_NAND_CSPR_EXT +#define CONFIG_SYS_CSPR2 CONFIG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK2 CONFIG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR2 CONFIG_SYS_NAND_CSOR +#define CONFIG_SYS_CS2_FTIM0 CONFIG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS2_FTIM1 CONFIG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3 +#define CONFIG_SYS_CSPR3_EXT CONFIG_SYS_FPGA_CSPR_EXT +#define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR +#define CONFIG_SYS_AMASK3 CONFIG_SYS_FPGA_AMASK +#define CONFIG_SYS_CSOR3 CONFIG_SYS_FPGA_CSOR +#define CONFIG_SYS_CS3_FTIM0 CONFIG_SYS_FPGA_FTIM0 +#define CONFIG_SYS_CS3_FTIM1 CONFIG_SYS_FPGA_FTIM1 +#define CONFIG_SYS_CS3_FTIM2 CONFIG_SYS_FPGA_FTIM2 +#define CONFIG_SYS_CS3_FTIM3 CONFIG_SYS_FPGA_FTIM3 +#else #ifdef CONFIG_NAND_BOOT #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT #define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR @@ -318,6 +353,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_CS3_FTIM2 CONFIG_SYS_FPGA_FTIM2 #define CONFIG_SYS_CS3_FTIM3 CONFIG_SYS_FPGA_FTIM3 #endif +#endif /* * I2C bus multiplexer @@ -349,7 +385,8 @@ unsigned long get_board_ddr_clk(void); #define VDD_MV_MAX 1212 /* QSPI device */ -#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) +#if defined(CONFIG_TFABOOT) || \ + (defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)) #define CONFIG_FSL_QSPI #ifdef CONFIG_FSL_QSPI #define CONFIG_SPI_FLASH_SPANSION @@ -381,6 +418,14 @@ unsigned long get_board_ddr_clk(void); */ #define CONFIG_ENV_OVERWRITE +#ifdef CONFIG_TFABOOT +#define CONFIG_SYS_MMC_ENV_DEV 0 + +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_OFFSET 0x500000 /* 5MB */ +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x500000) +#define CONFIG_ENV_SECT_SIZE 0x20000 +#else #ifdef CONFIG_NAND_BOOT #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_OFFSET (24 * CONFIG_SYS_NAND_BLOCK_SIZE) @@ -397,6 +442,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_ENV_SECT_SIZE 0x20000 #define CONFIG_ENV_SIZE 0x20000 #endif +#endif #define CONFIG_CMDLINE_TAG |