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authorTom Rini <trini@konsulko.com>2017-03-01 16:51:58 -0500
committerTom Rini <trini@konsulko.com>2017-03-09 11:37:24 -0500
commit285226785ee178c0bbe8a67185c21e461cf4bc9f (patch)
tree6616483a4fb2d0f900a37bce1f2d4c43d4776285 /include
parent8f42a2b64738394150a3249307f9fec62821e8db (diff)
downloadu-boot-285226785ee178c0bbe8a67185c21e461cf4bc9f.tar.gz
Freescale/NXP: Migrate CONFIG_FSL_CAAM to defconfigs
In some cases this is absolutely required, so select this for some secure features. This also requires migration of RSA_FREESCALE_EXP Cc: Ruchika Gupta <ruchika.gupta@nxp.com> Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com> Cc: Naveen Burmi <NaveenBurmi@freescale.com> Cc: Po Liu <po.liu@freescale.com> Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com> Cc: Priyanka Jain <Priyanka.Jain@freescale.com> Cc: Sumit Garg <sumit.garg@nxp.com> Cc: Shaohui Xie <Shaohui.Xie@freescale.com> Cc: Chunhe Lan <Chunhe.Lan@freescale.com> Cc: Feng Li <feng.li_2@nxp.com> Cc: Alison Wang <alison.wang@freescale.com> Cc: Mingkai Hu <Mingkai.Hu@freescale.com> Cc: York Sun <york.sun@nxp.com> Cc: Saksham Jain <saksham.jain@nxp.freescale.com> Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'include')
-rw-r--r--include/configs/B4860QDS.h1
-rw-r--r--include/configs/BSC9131RDB.h1
-rw-r--r--include/configs/BSC9132QDS.h1
-rw-r--r--include/configs/C29XPCIE.h1
-rw-r--r--include/configs/P1010RDB.h1
-rw-r--r--include/configs/P2041RDB.h1
-rw-r--r--include/configs/T102xQDS.h2
-rw-r--r--include/configs/T102xRDB.h2
-rw-r--r--include/configs/T1040QDS.h1
-rw-r--r--include/configs/T104xRDB.h1
-rw-r--r--include/configs/T208xQDS.h1
-rw-r--r--include/configs/T208xRDB.h1
-rw-r--r--include/configs/T4240QDS.h1
-rw-r--r--include/configs/T4240RDB.h1
-rw-r--r--include/configs/corenet_ds.h1
-rw-r--r--include/configs/ls1021aiot.h2
-rw-r--r--include/configs/ls1021aqds.h2
-rw-r--r--include/configs/ls1021atwr.h2
-rw-r--r--include/configs/ls1043a_common.h2
-rw-r--r--include/configs/ls1046a_common.h2
-rw-r--r--include/configs/ls2080a_common.h2
-rw-r--r--include/configs/mx6_common.h1
-rw-r--r--include/configs/mx7_common.h1
23 files changed, 0 insertions, 31 deletions
diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index 6b56fe7763..2a205cdf87 100644
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -61,7 +61,6 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_PCIE1 /* PCIE controller 1 */
#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h
index 3edf52ec08..282366c976 100644
--- a/include/configs/BSC9131RDB.h
+++ b/include/configs/BSC9131RDB.h
@@ -46,7 +46,6 @@
#endif
/* High Level Configuration Options */
-#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_TSEC_ENET
#define CONFIG_ENV_OVERWRITE
diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h
index 557f6ef427..969f448299 100644
--- a/include/configs/BSC9132QDS.h
+++ b/include/configs/BSC9132QDS.h
@@ -68,7 +68,6 @@
#endif
/* High Level Configuration Options */
-#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_SYS_HAS_SERDES /* common SERDES init code */
#if defined(CONFIG_PCI)
diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h
index b5d3737b2c..3af2425046 100644
--- a/include/configs/C29XPCIE.h
+++ b/include/configs/C29XPCIE.h
@@ -68,7 +68,6 @@
#endif
/* High Level Configuration Options */
-#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_SYS_HAS_SERDES /* common SERDES init code */
#ifdef CONFIG_PCI
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index a444a7895b..05a2360039 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -130,7 +130,6 @@
#endif
/* High Level Configuration Options */
-#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_SYS_HAS_SERDES /* common SERDES init code */
#if defined(CONFIG_PCI)
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index 480261bd43..325baa29e3 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -40,7 +40,6 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_PCIE1 /* PCIE controller 1 */
#define CONFIG_PCIE2 /* PCIE controller 2 */
#define CONFIG_PCIE3 /* PCIE controller 3 */
diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h
index 275d898f60..e850f54cb7 100644
--- a/include/configs/T102xQDS.h
+++ b/include/configs/T102xQDS.h
@@ -28,8 +28,6 @@
#define CONFIG_DEEP_SLEEP
-#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
-
#ifdef CONFIG_RAMBOOT_PBL
#define CONFIG_SYS_FSL_PBL_PBI board/freescale/t102xqds/t1024_pbi.cfg
#define CONFIG_SPL_FLUSH_IMAGE
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index e4646836d8..9a4af8021f 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -26,8 +26,6 @@
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
-
/* support deep sleep */
#ifdef CONFIG_ARCH_T1024
#define CONFIG_DEEP_SLEEP
diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
index 6fd8827edc..8343f371a7 100644
--- a/include/configs/T1040QDS.h
+++ b/include/configs/T1040QDS.h
@@ -51,7 +51,6 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_PCI_INDIRECT_BRIDGE
#define CONFIG_PCIE1 /* PCIE controller 1 */
#define CONFIG_PCIE2 /* PCIE controller 2 */
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index b3e9c28fae..bd1cfd4fcc 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -161,7 +161,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_PCI_INDIRECT_BRIDGE
#define CONFIG_PCIE1 /* PCIE controller 1 */
#define CONFIG_PCIE2 /* PCIE controller 2 */
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index ff6fc2df6f..17daf1dbd1 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -33,7 +33,6 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_ENV_OVERWRITE
#ifdef CONFIG_RAMBOOT_PBL
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index f9534b7ca0..e3d57e6a9f 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -27,7 +27,6 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_ENV_OVERWRITE
#ifdef CONFIG_RAMBOOT_PBL
diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h
index 3ef647e203..9d4baaa79f 100644
--- a/include/configs/T4240QDS.h
+++ b/include/configs/T4240QDS.h
@@ -12,7 +12,6 @@
#define CONFIG_FSL_SATA_V2
#define CONFIG_PCIE4
-#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index c35506c6e0..e8ac43c37a 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -72,7 +72,6 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_PCIE1 /* PCIE controller 1 */
#define CONFIG_PCIE2 /* PCIE controller 2 */
#define CONFIG_PCIE3 /* PCIE controller 3 */
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index 8bed3e3022..f810d34848 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -58,7 +58,6 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_PCIE1 /* PCIE controller 1 */
#define CONFIG_PCIE2 /* PCIE controller 2 */
#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h
index c4ee23eb1b..2fc3fe9dce 100644
--- a/include/configs/ls1021aiot.h
+++ b/include/configs/ls1021aiot.h
@@ -118,8 +118,6 @@
#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_FSL_CAAM /* Enable CAAM */
-
/*
* Serial Port
*/
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 774a1de961..6b640c4fc1 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -129,8 +129,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
-#define CONFIG_FSL_CAAM /* Enable CAAM */
-
#if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \
!defined(CONFIG_QSPI_BOOT)
#define CONFIG_U_QE
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index c49ad363bc..7279c89db5 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -154,8 +154,6 @@
#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_FSL_CAAM /* Enable CAAM */
-
#if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \
!defined(CONFIG_QSPI_BOOT)
#define CONFIG_U_QE
diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index c4b05e0e63..9a01e485d8 100644
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -145,8 +145,6 @@
#endif
#endif
-#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
-
/* FMan ucode */
#define CONFIG_SYS_DPAA_FMAN
#ifdef CONFIG_SYS_DPAA_FMAN
diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index be65e4fd76..8ec12474f6 100644
--- a/include/configs/ls1046a_common.h
+++ b/include/configs/ls1046a_common.h
@@ -118,8 +118,6 @@
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#endif
-#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
-
#define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */
/* FMan ucode */
diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index 4bfd0ac4af..4ba273aeef 100644
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -21,8 +21,6 @@
/* We need architecture specific misc initializations */
-#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
-
/* Link Definitions */
#ifndef CONFIG_QSPI_BOOT
#ifdef CONFIG_SPL
diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h
index 39d64189d3..cd52557ba8 100644
--- a/include/configs/mx6_common.h
+++ b/include/configs/mx6_common.h
@@ -90,7 +90,6 @@
/* Secure boot (HAB) support */
#ifdef CONFIG_SECURE_BOOT
#define CONFIG_CSF_SIZE 0x2000
-#define CONFIG_FSL_CAAM
#define CONFIG_CMD_DEKBLOB
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h
index 837d5f7322..b10b7f1b77 100644
--- a/include/configs/mx7_common.h
+++ b/include/configs/mx7_common.h
@@ -68,7 +68,6 @@
/* Secure boot (HAB) support */
#ifdef CONFIG_SECURE_BOOT
#define CONFIG_CSF_SIZE 0x2000
-#define CONFIG_FSL_CAAM
#define CONFIG_CMD_DEKBLOB
#endif
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