diff options
| -rw-r--r-- | drivers/serial/serial_stm32.c | 15 | ||||
| -rw-r--r-- | drivers/serial/serial_stm32.h | 8 |
2 files changed, 15 insertions, 8 deletions
diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c index dfef0d47e5..e2eeadef9d 100644 --- a/drivers/serial/serial_stm32.c +++ b/drivers/serial/serial_stm32.c @@ -43,10 +43,19 @@ static int stm32_serial_getc(struct udevice *dev) struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); bool stm32f4 = plat->uart_info->stm32f4; fdt_addr_t base = plat->base; + u32 isr = readl(base + ISR_OFFSET(stm32f4)); - if ((readl(base + ISR_OFFSET(stm32f4)) & USART_SR_FLAG_RXNE) == 0) + if ((isr & USART_SR_FLAG_RXNE) == 0) return -EAGAIN; + if (isr & USART_SR_FLAG_ORE) { + if (!stm32f4) + setbits_le32(base + ICR_OFFSET, USART_ICR_OREF); + else + readl(base + RDR_OFFSET(stm32f4)); + return -EIO; + } + return readl(base + RDR_OFFSET(stm32f4)); } @@ -107,11 +116,9 @@ static int stm32_serial_probe(struct udevice *dev) return plat->clock_rate; }; - /* Disable uart-> disable overrun-> enable uart */ + /* Disable uart-> enable fifo-> enable uart */ clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | BIT(uart_enable_bit)); - if (plat->uart_info->has_overrun_disable) - setbits_le32(base + CR3_OFFSET(stm32f4), USART_CR3_OVRDIS); if (plat->uart_info->has_fifo) setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | diff --git a/drivers/serial/serial_stm32.h b/drivers/serial/serial_stm32.h index d08ba1f55f..42fb1321e9 100644 --- a/drivers/serial/serial_stm32.h +++ b/drivers/serial/serial_stm32.h @@ -12,6 +12,8 @@ #define CR3_OFFSET(x) (x ? 0x14 : 0x08) #define BRR_OFFSET(x) (x ? 0x08 : 0x0c) #define ISR_OFFSET(x) (x ? 0x00 : 0x1c) + +#define ICR_OFFSET 0x20 /* * STM32F4 has one Data Register (DR) for received or transmitted * data, so map Receive Data Register (RDR) and Transmit Data @@ -23,28 +25,24 @@ struct stm32_uart_info { u8 uart_enable_bit; /* UART_CR1_UE */ bool stm32f4; /* true for STM32F4, false otherwise */ - bool has_overrun_disable; bool has_fifo; }; struct stm32_uart_info stm32f4_info = { .stm32f4 = true, .uart_enable_bit = 13, - .has_overrun_disable = false, .has_fifo = false, }; struct stm32_uart_info stm32f7_info = { .uart_enable_bit = 0, .stm32f4 = false, - .has_overrun_disable = true, .has_fifo = false, }; struct stm32_uart_info stm32h7_info = { .uart_enable_bit = 0, .stm32f4 = false, - .has_overrun_disable = true, .has_fifo = true, }; @@ -62,6 +60,7 @@ struct stm32x7_serial_platdata { #define USART_CR3_OVRDIS BIT(12) +#define USART_SR_FLAG_ORE BIT(3) #define USART_SR_FLAG_RXNE BIT(5) #define USART_SR_FLAG_TXE BIT(7) @@ -69,4 +68,5 @@ struct stm32x7_serial_platdata { #define USART_BRR_M_SHIFT 4 #define USART_BRR_M_MASK GENMASK(15, 4) +#define USART_ICR_OREF BIT(3) #endif |