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-rw-r--r--arch/arm/cpu/armv7/ls102xa/Kconfig6
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/Kconfig5
2 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig
index 28bf778d9c..f94568a2e4 100644
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -28,6 +28,12 @@ config NUM_DDR_CONTROLLERS
int "Maximum DDR controllers"
default 1
+config SECURE_BOOT
+ bool "Secure Boot"
+ help
+ Enable Freescale Secure Boot feature. Normally selected
+ by defconfig. If unsure, do not change.
+
config SYS_FSL_ERRATUM_A010315
bool "Workaround for PCIe erratum A010315"
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 94ec8d502b..ed1c4eeb03 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -71,6 +71,11 @@ config NUM_DDR_CONTROLLERS
default 3 if ARCH_LS2080A
default 1
+config SECURE_BOOT
+ bool
+ help
+ Enable Freescale Secure Boot feature
+
config SYS_FSL_IFC_BANK_COUNT
int "Maximum banks of Integrated flash controller"
depends on ARCH_LS1043A || ARCH_LS1046A || ARCH_LS2080A