diff options
Diffstat (limited to 'arch/arm/mach-socfpga/spl_a10.c')
| -rw-r--r-- | arch/arm/mach-socfpga/spl_a10.c | 28 |
1 files changed, 12 insertions, 16 deletions
diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c index 7d35e9daa8..3ea64f7e94 100644 --- a/arch/arm/mach-socfpga/spl_a10.c +++ b/arch/arm/mach-socfpga/spl_a10.c @@ -68,33 +68,26 @@ u32 spl_boot_mode(const u32 boot_device) void spl_board_init(void) { - /* configuring the clock based on handoff */ - cm_basic_init(gd->fdt_blob); - WATCHDOG_RESET(); - - config_dedicated_pins(gd->fdt_blob); - WATCHDOG_RESET(); - /* enable console uart printing */ preloader_console_init(); - WATCHDOG_RESET(); - /* Add device descriptor to FPGA device table */ - socfpga_fpga_add(); + arch_early_init_r(); } void board_init_f(ulong dummy) { - /* - * Configure Clock Manager to use intosc clock instead external osc to - * ensure success watchdog operation. We do it as early as possible. - */ - cm_use_intosc(); + socfpga_init_security_policies(); + socfpga_sdram_remap_zero(); + /* Assert reset to all except L4WD0 and L4TIMER0 */ + socfpga_per_reset_all(); socfpga_watchdog_disable(); - arch_early_init_r(); + spl_early_init(); + + /* Configure the clock based on handoff */ + cm_basic_init(gd->fdt_blob); #ifdef CONFIG_HW_WATCHDOG /* release osc1 watchdog timer 0 from reset */ @@ -104,4 +97,7 @@ void board_init_f(ulong dummy) hw_watchdog_init(); WATCHDOG_RESET(); #endif /* CONFIG_HW_WATCHDOG */ + + config_dedicated_pins(gd->fdt_blob); + WATCHDOG_RESET(); } |