diff options
Diffstat (limited to 'arch/x86')
47 files changed, 326 insertions, 220 deletions
diff --git a/arch/x86/cpu/acpi_gpe.c b/arch/x86/cpu/acpi_gpe.c index 70badb15a3..83128c33c2 100644 --- a/arch/x86/cpu/acpi_gpe.c +++ b/arch/x86/cpu/acpi_gpe.c @@ -51,7 +51,7 @@ static int acpi_gpe_read_and_clear(struct irq *irq) return ret; } -static int acpi_gpe_ofdata_to_platdata(struct udevice *dev) +static int acpi_gpe_of_to_plat(struct udevice *dev) { struct acpi_gpe_priv *priv = dev_get_priv(dev); @@ -107,6 +107,6 @@ U_BOOT_DRIVER(acpi_gpe_drv) = { .id = UCLASS_IRQ, .of_match = acpi_gpe_ids, .ops = &acpi_gpe_ops, - .ofdata_to_platdata = acpi_gpe_ofdata_to_platdata, - .priv_auto_alloc_size = sizeof(struct acpi_gpe_priv), + .of_to_plat = acpi_gpe_of_to_plat, + .priv_auto = sizeof(struct acpi_gpe_priv), }; diff --git a/arch/x86/cpu/apollolake/Kconfig b/arch/x86/cpu/apollolake/Kconfig index c6c1350f4f..f5dbd6cbd3 100644 --- a/arch/x86/cpu/apollolake/Kconfig +++ b/arch/x86/cpu/apollolake/Kconfig @@ -19,6 +19,7 @@ config INTEL_APOLLOLAKE select SMP_AP_WORK select INTEL_GMA_SWSMISCI select ACPI_GNVS_EXTERNAL + select TPL_OF_PLATDATA_PARENT imply ENABLE_MRC_CACHE imply AHCI_PCI imply SCSI diff --git a/arch/x86/cpu/apollolake/cpu.c b/arch/x86/cpu/apollolake/cpu.c index d37f91d1ce..328f79255f 100644 --- a/arch/x86/cpu/apollolake/cpu.c +++ b/arch/x86/cpu/apollolake/cpu.c @@ -63,7 +63,7 @@ static int apl_get_info(const struct udevice *dev, struct cpu_info *info) static int acpi_cpu_fill_ssdt(const struct udevice *dev, struct acpi_ctx *ctx) { - uint core_id = dev->req_seq; + uint core_id = dev_seq(dev); int cores_per_package; int ret; diff --git a/arch/x86/cpu/apollolake/fsp_m.c b/arch/x86/cpu/apollolake/fsp_m.c index cef937573b..c6be707e4e 100644 --- a/arch/x86/cpu/apollolake/fsp_m.c +++ b/arch/x86/cpu/apollolake/fsp_m.c @@ -32,7 +32,10 @@ int fspm_update_config(struct udevice *dev, struct fspm_upd *upd) node = dev_ofnode(dev); if (!ofnode_valid(node)) - return log_msg_ret("fsp-m settings", -ENOENT); + return log_msg_ret("node", -ENOENT); + node = ofnode_find_subnode(node, "fsp-m"); + if (!ofnode_valid(node)) + return log_msg_ret("fspm", -ENOENT); ret = fsp_m_update_config_from_dtb(node, cfg); if (ret) diff --git a/arch/x86/cpu/apollolake/hostbridge.c b/arch/x86/cpu/apollolake/hostbridge.c index cafd9d65b2..9decab7aa3 100644 --- a/arch/x86/cpu/apollolake/hostbridge.c +++ b/arch/x86/cpu/apollolake/hostbridge.c @@ -24,6 +24,7 @@ #include <asm/io.h> #include <asm/pci.h> #include <asm/arch/acpi.h> +#include <asm/arch/hostbridge.h> #include <asm/arch/systemagent.h> #include <dt-bindings/sound/nhlt.h> #include <dm/acpi.h> @@ -41,25 +42,7 @@ enum { TOLUD = 0xbc, }; -/** - * struct apl_hostbridge_platdata - platform data for hostbridge - * - * @dtplat: Platform data for of-platdata - * @early_pads: Early pad data to set up, each (pad, cfg0, cfg1) - * @early_pads_count: Number of pads to process - * @pciex_region_size: BAR length in bytes - * @bdf: Bus/device/function of hostbridge - */ -struct apl_hostbridge_platdata { -#if CONFIG_IS_ENABLED(OF_PLATDATA) - struct dtd_intel_apl_hostbridge dtplat; -#endif - u32 *early_pads; - int early_pads_count; - uint pciex_region_size; - pci_dev_t bdf; -}; - +#if CONFIG_IS_ENABLED(GENERATE_ACPI_TABLE) static const struct nhlt_format_config dmic_1ch_formats[] = { /* 48 KHz 16-bits per sample. */ { @@ -155,10 +138,11 @@ static const struct nhlt_endp_descriptor dmic_4ch_descriptors[] = { .num_formats = ARRAY_SIZE(dmic_4ch_formats), }, }; +#endif static int apl_hostbridge_early_init_pinctrl(struct udevice *dev) { - struct apl_hostbridge_platdata *plat = dev_get_platdata(dev); + struct apl_hostbridge_plat *plat = dev_get_plat(dev); struct udevice *pinctrl; int ret; @@ -172,7 +156,7 @@ static int apl_hostbridge_early_init_pinctrl(struct udevice *dev) static int apl_hostbridge_early_init(struct udevice *dev) { - struct apl_hostbridge_platdata *plat = dev_get_platdata(dev); + struct apl_hostbridge_plat *plat = dev_get_plat(dev); u32 region_size; ulong base; u32 reg; @@ -221,9 +205,9 @@ static int apl_hostbridge_early_init(struct udevice *dev) return 0; } -static int apl_hostbridge_ofdata_to_platdata(struct udevice *dev) +static int apl_hostbridge_of_to_plat(struct udevice *dev) { - struct apl_hostbridge_platdata *plat = dev_get_platdata(dev); + struct apl_hostbridge_plat *plat = dev_get_plat(dev); struct udevice *pinctrl; int ret; @@ -283,7 +267,7 @@ static int apl_acpi_hb_get_name(const struct udevice *dev, char *out_name) return acpi_copy_name(out_name, "RHUB"); } -#ifdef CONFIG_GENERATE_ACPI_TABLE +#if CONFIG_IS_ENABLED(GENERATE_ACPI_TABLE) static int apl_acpi_hb_write_tables(const struct udevice *dev, struct acpi_ctx *ctx) { @@ -322,7 +306,6 @@ static int apl_acpi_hb_write_tables(const struct udevice *dev, return 0; } -#endif static int apl_acpi_setup_nhlt(const struct udevice *dev, struct acpi_ctx *ctx) { @@ -347,6 +330,7 @@ static int apl_acpi_setup_nhlt(const struct udevice *dev, struct acpi_ctx *ctx) return log_msg_ret("channels", -EINVAL); } +#endif static int apl_hostbridge_remove(struct udevice *dev) { @@ -385,25 +369,27 @@ ulong sa_get_tseg_base(struct udevice *dev) struct acpi_ops apl_hostbridge_acpi_ops = { .get_name = apl_acpi_hb_get_name, -#ifdef CONFIG_GENERATE_ACPI_TABLE +#if CONFIG_IS_ENABLED(GENERATE_ACPI_TABLE) .write_tables = apl_acpi_hb_write_tables, -#endif .setup_nhlt = apl_acpi_setup_nhlt, +#endif }; +#if !CONFIG_IS_ENABLED(OF_PLATDATA) static const struct udevice_id apl_hostbridge_ids[] = { { .compatible = "intel,apl-hostbridge" }, { } }; +#endif U_BOOT_DRIVER(intel_apl_hostbridge) = { .name = "intel_apl_hostbridge", .id = UCLASS_NORTHBRIDGE, - .of_match = apl_hostbridge_ids, - .ofdata_to_platdata = apl_hostbridge_ofdata_to_platdata, + .of_match = of_match_ptr(apl_hostbridge_ids), + .of_to_plat = apl_hostbridge_of_to_plat, .probe = apl_hostbridge_probe, .remove = apl_hostbridge_remove, - .platdata_auto_alloc_size = sizeof(struct apl_hostbridge_platdata), + .plat_auto = sizeof(struct apl_hostbridge_plat), ACPI_OPS_PTR(&apl_hostbridge_acpi_ops) .flags = DM_FLAG_OS_PREPARE, }; diff --git a/arch/x86/cpu/apollolake/lpc.c b/arch/x86/cpu/apollolake/lpc.c index d8e05f6a8f..e085890d63 100644 --- a/arch/x86/cpu/apollolake/lpc.c +++ b/arch/x86/cpu/apollolake/lpc.c @@ -81,10 +81,11 @@ int lpc_open_pmio_window(uint base, uint size) lgir_reg_num = find_unused_pmio_window(); if (lgir_reg_num < 0) { - log_err("LPC: Cannot open IO window: %lx size %lx\n", - bridge_base, size - bridged_size); - log_err("No more IO windows\n"); - + if (spl_phase() > PHASE_TPL) { + log_err("LPC: Cannot open IO window: %lx size %lx\n", + bridge_base, size - bridged_size); + log_err("No more IO windows\n"); + } return -ENOSPC; } lgir_reg_offset = LPC_GENERIC_IO_RANGE(lgir_reg_num); @@ -127,15 +128,17 @@ struct acpi_ops apl_lpc_acpi_ops = { .inject_dsdt = southbridge_inject_dsdt, }; +#if !CONFIG_IS_ENABLED(OF_PLATDATA) static const struct udevice_id apl_lpc_ids[] = { { .compatible = "intel,apl-lpc" }, { } }; +#endif /* All pads are LPC already configured by the hostbridge, so no probing here */ U_BOOT_DRIVER(intel_apl_lpc) = { .name = "intel_apl_lpc", .id = UCLASS_LPC, - .of_match = apl_lpc_ids, + .of_match = of_match_ptr(apl_lpc_ids), ACPI_OPS_PTR(&apl_lpc_acpi_ops) }; diff --git a/arch/x86/cpu/apollolake/pch.c b/arch/x86/cpu/apollolake/pch.c index d9832ff249..39d6ad5ed4 100644 --- a/arch/x86/cpu/apollolake/pch.c +++ b/arch/x86/cpu/apollolake/pch.c @@ -23,14 +23,16 @@ static const struct pch_ops apl_pch_ops = { .set_spi_protect = apl_set_spi_protect, }; +#if !CONFIG_IS_ENABLED(OF_PLATDATA) static const struct udevice_id apl_pch_ids[] = { { .compatible = "intel,apl-pch" }, { } }; +#endif U_BOOT_DRIVER(intel_apl_pch) = { .name = "intel_apl_pch", .id = UCLASS_PCH, - .of_match = apl_pch_ids, + .of_match = of_match_ptr(apl_pch_ids), .ops = &apl_pch_ops, }; diff --git a/arch/x86/cpu/apollolake/pmc.c b/arch/x86/cpu/apollolake/pmc.c index cacaa007e0..e23d38ea07 100644 --- a/arch/x86/cpu/apollolake/pmc.c +++ b/arch/x86/cpu/apollolake/pmc.c @@ -16,6 +16,7 @@ #include <acpi/acpi_s3.h> #include <asm/io.h> #include <asm/pci.h> +#include <asm/arch/pmc.h> #include <linux/bitops.h> #include <power/acpi_pmc.h> @@ -53,13 +54,6 @@ enum { CF9_GLB_RST = 1 << 20, }; -struct apl_pmc_platdata { -#if CONFIG_IS_ENABLED(OF_PLATDATA) - struct dtd_intel_apl_pmc dtplat; -#endif - pci_dev_t bdf; -}; - static int apl_pmc_fill_power_state(struct udevice *dev) { struct acpi_pmc_upriv *upriv = dev_get_uclass_priv(dev); @@ -108,10 +102,10 @@ static int apl_global_reset_set_enable(struct udevice *dev, bool enable) return 0; } -int apl_pmc_ofdata_to_uc_platdata(struct udevice *dev) +int apl_pmc_ofdata_to_uc_plat(struct udevice *dev) { struct acpi_pmc_upriv *upriv = dev_get_uclass_priv(dev); - struct apl_pmc_platdata *plat = dev_get_platdata(dev); + struct apl_pmc_plat *plat = dev_get_plat(dev); #if !CONFIG_IS_ENABLED(OF_PLATDATA) u32 base[6]; @@ -144,7 +138,7 @@ int apl_pmc_ofdata_to_uc_platdata(struct udevice *dev) if (ret) return log_msg_ret("Bad gpe0-dw", ret); - return pmc_ofdata_to_uc_platdata(dev); + return pmc_ofdata_to_uc_plat(dev); #else struct dtd_intel_apl_pmc *dtplat = &plat->dtplat; @@ -169,7 +163,7 @@ int apl_pmc_ofdata_to_uc_platdata(struct udevice *dev) static int enable_pmcbar(struct udevice *dev) { struct acpi_pmc_upriv *upriv = dev_get_uclass_priv(dev); - struct apl_pmc_platdata *priv = dev_get_platdata(dev); + struct apl_pmc_plat *priv = dev_get_plat(dev); pci_dev_t pmc = priv->bdf; /* @@ -205,24 +199,26 @@ static int apl_pmc_probe(struct udevice *dev) return 0; } -static struct acpi_pmc_ops apl_pmc_ops = { +static const struct acpi_pmc_ops apl_pmc_ops = { .init = apl_pmc_fill_power_state, .prev_sleep_state = apl_prev_sleep_state, .disable_tco = apl_disable_tco, .global_reset_set_enable = apl_global_reset_set_enable, }; +#if !CONFIG_IS_ENABLED(OF_PLATDATA) static const struct udevice_id apl_pmc_ids[] = { { .compatible = "intel,apl-pmc" }, { } }; +#endif U_BOOT_DRIVER(intel_apl_pmc) = { .name = "intel_apl_pmc", .id = UCLASS_ACPI_PMC, - .of_match = apl_pmc_ids, - .ofdata_to_platdata = apl_pmc_ofdata_to_uc_platdata, + .of_match = of_match_ptr(apl_pmc_ids), + .of_to_plat = apl_pmc_ofdata_to_uc_plat, .probe = apl_pmc_probe, .ops = &apl_pmc_ops, - .platdata_auto_alloc_size = sizeof(struct apl_pmc_platdata), + .plat_auto = sizeof(struct apl_pmc_plat), }; diff --git a/arch/x86/cpu/apollolake/spl.c b/arch/x86/cpu/apollolake/spl.c index 089b37c59f..8991d5e648 100644 --- a/arch/x86/cpu/apollolake/spl.c +++ b/arch/x86/cpu/apollolake/spl.c @@ -83,33 +83,6 @@ static int apl_flash_probe(struct udevice *dev) return spi_flash_std_probe(dev); } -/* - * Manually set the parent of the SPI flash to SPI, since dtoc doesn't. We also - * need to allocate the parent_platdata since by the time this function is - * called device_bind() has already gone past that step. - */ -static int apl_flash_bind(struct udevice *dev) -{ - if (CONFIG_IS_ENABLED(OF_PLATDATA) && - !CONFIG_IS_ENABLED(OF_PLATDATA_PARENT)) { - struct dm_spi_slave_platdata *plat; - struct udevice *spi; - int ret; - - ret = uclass_first_device_err(UCLASS_SPI, &spi); - if (ret) - return ret; - dev->parent = spi; - - plat = calloc(sizeof(*plat), 1); - if (!plat) - return -ENOMEM; - dev->parent_platdata = plat; - } - - return 0; -} - static const struct dm_spi_flash_ops apl_flash_ops = { .read = apl_flash_std_read, }; @@ -123,9 +96,8 @@ U_BOOT_DRIVER(winbond_w25q128fw) = { .name = "winbond_w25q128fw", .id = UCLASS_SPI_FLASH, .of_match = apl_flash_ids, - .bind = apl_flash_bind, .probe = apl_flash_probe, - .priv_auto_alloc_size = sizeof(struct spi_flash), + .priv_auto = sizeof(struct spi_nor), .ops = &apl_flash_ops, }; diff --git a/arch/x86/cpu/apollolake/uart.c b/arch/x86/cpu/apollolake/uart.c index c522aa9780..876fa592b8 100644 --- a/arch/x86/cpu/apollolake/uart.c +++ b/arch/x86/cpu/apollolake/uart.c @@ -16,6 +16,8 @@ #include <asm/io.h> #include <asm/pci.h> #include <asm/lpss.h> +#include <dm/device-internal.h> +#include <asm/arch/uart.h> /* Low-power Subsystem (LPSS) clock register */ enum { @@ -68,48 +70,52 @@ void apl_uart_init(pci_dev_t bdf, ulong base) * This driver uses its own compatible string but almost everything else from * the standard ns16550 driver. This allows us to provide an of-platdata * implementation, since the platdata produced by of-platdata does not match - * struct ns16550_platdata. + * struct apl_ns16550_plat. * * When running with of-platdata (generally TPL), the platdata is converted to * something that ns16550 expects. When running withoutof-platdata (SPL, U-Boot - * proper), we use ns16550's ofdata_to_platdata routine. + * proper), we use ns16550's of_to_plat routine. */ static int apl_ns16550_probe(struct udevice *dev) { - struct ns16550_platdata *plat = dev_get_platdata(dev); + struct apl_ns16550_plat *plat = dev_get_plat(dev); if (!CONFIG_IS_ENABLED(PCI)) - apl_uart_init(plat->bdf, plat->base); + apl_uart_init(plat->ns16550.bdf, plat->ns16550.base); return ns16550_serial_probe(dev); } -static int apl_ns16550_ofdata_to_platdata(struct udevice *dev) +static int apl_ns16550_of_to_plat(struct udevice *dev) { #if CONFIG_IS_ENABLED(OF_PLATDATA) - struct dtd_intel_apl_ns16550 *dtplat = dev_get_platdata(dev); - struct ns16550_platdata *plat; + struct dtd_intel_apl_ns16550 *dtplat; + struct apl_ns16550_plat *plat = dev_get_plat(dev); + struct ns16550_plat ns; /* - * Convert our platdata to the ns16550's platdata, so we can just use - * that driver + * The device's plat uses struct apl_ns16550_plat which starts with the + * dtd struct, but the ns16550 driver expects it to be struct ns16550. + * Set up what that driver expects. Note that this means that the values + * cannot be read in this driver when using of-platdata. + * + * TODO(sjg@chromium.org): Consider having a separate plat pointer for + * of-platdata so that it is not necessary to overwrite this. */ - plat = malloc(sizeof(*plat)); - if (!plat) - return -ENOMEM; - plat->base = dtplat->early_regs[0]; - plat->reg_width = 1; - plat->reg_shift = dtplat->reg_shift; - plat->reg_offset = 0; - plat->clock = dtplat->clock_frequency; - plat->fcr = UART_FCR_DEFVAL; - plat->bdf = pci_ofplat_get_devfn(dtplat->reg[0]); - dev->platdata = plat; + dtplat = &plat->dtplat; + ns.base = dtplat->early_regs[0]; + ns.reg_width = 1; + ns.reg_shift = dtplat->reg_shift; + ns.reg_offset = 0; + ns.clock = dtplat->clock_frequency; + ns.fcr = UART_FCR_DEFVAL; + ns.bdf = pci_ofplat_get_devfn(dtplat->reg[0]); + memcpy(plat, &ns, sizeof(ns)); #else int ret; - ret = ns16550_serial_ofdata_to_platdata(dev); + ret = ns16550_serial_of_to_plat(dev); if (ret) return ret; #endif /* OF_PLATDATA */ @@ -117,18 +123,20 @@ static int apl_ns16550_ofdata_to_platdata(struct udevice *dev) return 0; } +#if !CONFIG_IS_ENABLED(OF_PLATDATA) static const struct udevice_id apl_ns16550_serial_ids[] = { { .compatible = "intel,apl-ns16550" }, { }, }; +#endif U_BOOT_DRIVER(intel_apl_ns16550) = { .name = "intel_apl_ns16550", .id = UCLASS_SERIAL, - .of_match = apl_ns16550_serial_ids, - .platdata_auto_alloc_size = sizeof(struct ns16550_platdata), - .priv_auto_alloc_size = sizeof(struct NS16550), + .of_match = of_match_ptr(apl_ns16550_serial_ids), + .plat_auto = sizeof(struct apl_ns16550_plat), + .priv_auto = sizeof(struct ns16550), .ops = &ns16550_serial_ops, - .ofdata_to_platdata = apl_ns16550_ofdata_to_platdata, + .of_to_plat = apl_ns16550_of_to_plat, .probe = apl_ns16550_probe, }; diff --git a/arch/x86/cpu/broadwell/adsp.c b/arch/x86/cpu/broadwell/adsp.c index 41f7d5d4d1..1fa1823780 100644 --- a/arch/x86/cpu/broadwell/adsp.c +++ b/arch/x86/cpu/broadwell/adsp.c @@ -122,7 +122,7 @@ static int broadwell_adsp_probe(struct udevice *dev) return 0; } -static int broadwell_adsp_ofdata_to_platdata(struct udevice *dev) +static int broadwell_adsp_of_to_plat(struct udevice *dev) { struct broadwell_adsp_priv *priv = dev_get_priv(dev); @@ -142,7 +142,7 @@ static const struct udevice_id broadwell_adsp_ids[] = { U_BOOT_DRIVER(broadwell_adsp_drv) = { .name = "adsp", .id = UCLASS_SYSCON, - .ofdata_to_platdata = broadwell_adsp_ofdata_to_platdata, + .of_to_plat = broadwell_adsp_of_to_plat, .of_match = broadwell_adsp_ids, .bind = dm_scan_fdt_dev, .probe = broadwell_adsp_probe, diff --git a/arch/x86/cpu/broadwell/cpu_full.c b/arch/x86/cpu/broadwell/cpu_full.c index 706f68f63d..ea9e98dde6 100644 --- a/arch/x86/cpu/broadwell/cpu_full.c +++ b/arch/x86/cpu/broadwell/cpu_full.c @@ -638,7 +638,7 @@ static int broadwell_get_count(const struct udevice *dev) static int cpu_x86_broadwell_probe(struct udevice *dev) { - if (dev->seq == 0) { + if (dev_seq(dev) == 0) { cpu_core_init(dev); return broadwell_init(dev); } @@ -665,6 +665,6 @@ U_BOOT_DRIVER(cpu_x86_broadwell_drv) = { .bind = cpu_x86_bind, .probe = cpu_x86_broadwell_probe, .ops = &cpu_x86_broadwell_ops, - .priv_auto_alloc_size = sizeof(struct cpu_broadwell_priv), + .priv_auto = sizeof(struct cpu_broadwell_priv), .flags = DM_FLAG_PRE_RELOC, }; diff --git a/arch/x86/cpu/broadwell/sata.c b/arch/x86/cpu/broadwell/sata.c index 641da515c8..ceb395ddcf 100644 --- a/arch/x86/cpu/broadwell/sata.c +++ b/arch/x86/cpu/broadwell/sata.c @@ -17,7 +17,7 @@ #include <asm/arch/pch.h> #include <linux/delay.h> -struct sata_platdata { +struct sata_plat { int port_map; uint port0_gen3_tx; uint port1_gen3_tx; @@ -41,7 +41,7 @@ struct sata_platdata { static void broadwell_sata_init(struct udevice *dev) { - struct sata_platdata *plat = dev_get_platdata(dev); + struct sata_plat *plat = dev_get_plat(dev); u32 reg32; u8 *abar; u16 reg16; @@ -211,7 +211,7 @@ static void broadwell_sata_init(struct udevice *dev) static int broadwell_sata_enable(struct udevice *dev) { - struct sata_platdata *plat = dev_get_platdata(dev); + struct sata_plat *plat = dev_get_plat(dev); struct gpio_desc desc; u16 map; int ret; @@ -232,9 +232,9 @@ static int broadwell_sata_enable(struct udevice *dev) return 0; } -static int broadwell_sata_ofdata_to_platdata(struct udevice *dev) +static int broadwell_sata_of_to_plat(struct udevice *dev) { - struct sata_platdata *plat = dev_get_platdata(dev); + struct sata_plat *plat = dev_get_plat(dev); const void *blob = gd->fdt_blob; int node = dev_of_offset(dev); @@ -264,7 +264,7 @@ U_BOOT_DRIVER(ahci_broadwell_drv) = { .name = "ahci_broadwell", .id = UCLASS_AHCI, .of_match = broadwell_ahci_ids, - .ofdata_to_platdata = broadwell_sata_ofdata_to_platdata, + .of_to_plat = broadwell_sata_of_to_plat, .probe = broadwell_sata_probe, - .platdata_auto_alloc_size = sizeof(struct sata_platdata), + .plat_auto = sizeof(struct sata_plat), }; diff --git a/arch/x86/cpu/cpu_x86.c b/arch/x86/cpu/cpu_x86.c index 7e83051646..bfb511a510 100644 --- a/arch/x86/cpu/cpu_x86.c +++ b/arch/x86/cpu/cpu_x86.c @@ -13,7 +13,7 @@ DECLARE_GLOBAL_DATA_PTR; int cpu_x86_bind(struct udevice *dev) { - struct cpu_platdata *plat = dev_get_parent_platdata(dev); + struct cpu_plat *plat = dev_get_parent_plat(dev); struct cpuid_result res; plat->cpu_id = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), diff --git a/arch/x86/cpu/i386/call64.S b/arch/x86/cpu/i386/call64.S index 275063c4af..0ffc1006bb 100644 --- a/arch/x86/cpu/i386/call64.S +++ b/arch/x86/cpu/i386/call64.S @@ -11,6 +11,7 @@ #include <asm/processor-flags.h> .code32 +.section .text_call64 .globl cpu_call64 cpu_call64: /* diff --git a/arch/x86/cpu/intel_common/Makefile b/arch/x86/cpu/intel_common/Makefile index 4a5cf17e41..8b9a810f66 100644 --- a/arch/x86/cpu/intel_common/Makefile +++ b/arch/x86/cpu/intel_common/Makefile @@ -26,7 +26,7 @@ obj-y += cpu.o obj-y += fast_spi.o obj-y += lpc.o obj-y += lpss.o -obj-$(CONFIG_INTEL_GENERIC_WIFI) += generic_wifi.o +obj-$(CONFIG_$(SPL_)INTEL_GENERIC_WIFI) += generic_wifi.o ifndef CONFIG_TARGET_EFI_APP obj-$(CONFIG_$(SPL_TPL_)X86_32BIT_INIT) += microcode.o ifndef CONFIG_$(SPL_)X86_64 diff --git a/arch/x86/cpu/intel_common/itss.c b/arch/x86/cpu/intel_common/itss.c index de17b93ed4..ae4de4ca8c 100644 --- a/arch/x86/cpu/intel_common/itss.c +++ b/arch/x86/cpu/intel_common/itss.c @@ -19,25 +19,6 @@ #include <spl.h> #include <asm/itss.h> -struct itss_platdata { -#if CONFIG_IS_ENABLED(OF_PLATDATA) - /* Put this first since driver model will copy the data here */ - struct dtd_intel_itss dtplat; -#endif -}; - -/* struct pmc_route - Routing for PMC to GPIO */ -struct pmc_route { - u32 pmc; - u32 gpio; -}; - -struct itss_priv { - struct pmc_route *route; - uint route_count; - u32 irq_snapshot[NUM_IPC_REGS]; -}; - static int set_polarity(struct udevice *dev, uint irq, bool active_low) { u32 mask; @@ -178,13 +159,13 @@ static int itss_bind(struct udevice *dev) return 0; } -static int itss_ofdata_to_platdata(struct udevice *dev) +static int itss_of_to_plat(struct udevice *dev) { struct itss_priv *priv = dev_get_priv(dev); int ret; #if CONFIG_IS_ENABLED(OF_PLATDATA) - struct itss_platdata *plat = dev_get_platdata(dev); + struct itss_plat *plat = dev_get_plat(dev); struct dtd_intel_itss *dtplat = &plat->dtplat; /* @@ -230,18 +211,20 @@ static const struct irq_ops itss_ops = { #endif }; +#if !CONFIG_IS_ENABLED(OF_PLATDATA) static const struct udevice_id itss_ids[] = { { .compatible = "intel,itss", .data = X86_IRQT_ITSS }, { } }; +#endif U_BOOT_DRIVER(intel_itss) = { .name = "intel_itss", .id = UCLASS_IRQ, - .of_match = itss_ids, + .of_match = of_match_ptr(itss_ids), .ops = &itss_ops, .bind = itss_bind, - .ofdata_to_platdata = itss_ofdata_to_platdata, - .platdata_auto_alloc_size = sizeof(struct itss_platdata), - .priv_auto_alloc_size = sizeof(struct itss_priv), + .of_to_plat = itss_of_to_plat, + .plat_auto = sizeof(struct itss_plat), + .priv_auto = sizeof(struct itss_priv), }; diff --git a/arch/x86/cpu/intel_common/p2sb.c b/arch/x86/cpu/intel_common/p2sb.c index a0a4001e03..d73ae438bb 100644 --- a/arch/x86/cpu/intel_common/p2sb.c +++ b/arch/x86/cpu/intel_common/p2sb.c @@ -13,20 +13,13 @@ #include <log.h> #include <p2sb.h> #include <spl.h> +#include <asm/p2sb.h> #include <asm/pci.h> #include <linux/bitops.h> #define PCH_P2SB_E0 0xe0 #define HIDE_BIT BIT(0) -struct p2sb_platdata { -#if CONFIG_IS_ENABLED(OF_PLATDATA) - struct dtd_intel_p2sb dtplat; -#endif - ulong mmio_base; - pci_dev_t bdf; -}; - /* PCI config space registers */ #define HPTC_OFFSET 0x60 #define HPTC_ADDR_ENABLE_BIT BIT(7) @@ -57,7 +50,7 @@ struct p2sb_platdata { */ static int p2sb_early_init(struct udevice *dev) { - struct p2sb_platdata *plat = dev_get_platdata(dev); + struct p2sb_plat *plat = dev_get_plat(dev); pci_dev_t pdev = plat->bdf; /* @@ -90,10 +83,10 @@ static int p2sb_spl_init(struct udevice *dev) return 0; } -int p2sb_ofdata_to_platdata(struct udevice *dev) +int p2sb_of_to_plat(struct udevice *dev) { struct p2sb_uc_priv *upriv = dev_get_uclass_priv(dev); - struct p2sb_platdata *plat = dev_get_platdata(dev); + struct p2sb_plat *plat = dev_get_plat(dev); #if !CONFIG_IS_ENABLED(OF_PLATDATA) int ret; @@ -167,7 +160,7 @@ static int p2sb_remove(struct udevice *dev) static int p2sb_child_post_bind(struct udevice *dev) { #if !CONFIG_IS_ENABLED(OF_PLATDATA) - struct p2sb_child_platdata *pplat = dev_get_parent_platdata(dev); + struct p2sb_child_plat *pplat = dev_get_parent_plat(dev); int ret; u32 pid; @@ -180,26 +173,27 @@ static int p2sb_child_post_bind(struct udevice *dev) return 0; } -struct p2sb_ops p2sb_ops = { +static const struct p2sb_ops p2sb_ops = { .set_hide = intel_p2sb_set_hide, }; +#if !CONFIG_IS_ENABLED(OF_PLATDATA) static const struct udevice_id p2sb_ids[] = { { .compatible = "intel,p2sb" }, { } }; +#endif U_BOOT_DRIVER(intel_p2sb) = { .name = "intel_p2sb", .id = UCLASS_P2SB, - .of_match = p2sb_ids, + .of_match = of_match_ptr(p2sb_ids), .probe = p2sb_probe, .remove = p2sb_remove, .ops = &p2sb_ops, - .ofdata_to_platdata = p2sb_ofdata_to_platdata, - .platdata_auto_alloc_size = sizeof(struct p2sb_platdata), - .per_child_platdata_auto_alloc_size = - sizeof(struct p2sb_child_platdata), + .of_to_plat = p2sb_of_to_plat, + .plat_auto = sizeof(struct p2sb_plat), + .per_child_plat_auto = sizeof(struct p2sb_child_plat), .child_post_bind = p2sb_child_post_bind, .flags = DM_FLAG_OS_PREPARE, }; diff --git a/arch/x86/cpu/irq.c b/arch/x86/cpu/irq.c index 836a0e8b86..8b53b96822 100644 --- a/arch/x86/cpu/irq.c +++ b/arch/x86/cpu/irq.c @@ -362,5 +362,5 @@ U_BOOT_DRIVER(irq_router_drv) = { .id = UCLASS_IRQ, .of_match = irq_router_ids, .probe = irq_router_probe, - .priv_auto_alloc_size = sizeof(struct irq_router), + .priv_auto = sizeof(struct irq_router), }; diff --git a/arch/x86/cpu/ivybridge/model_206ax.c b/arch/x86/cpu/ivybridge/model_206ax.c index 55f7cc2b2e..598ebcdf08 100644 --- a/arch/x86/cpu/ivybridge/model_206ax.c +++ b/arch/x86/cpu/ivybridge/model_206ax.c @@ -425,7 +425,7 @@ static int model_206ax_get_count(const struct udevice *dev) static int cpu_x86_model_206ax_probe(struct udevice *dev) { - if (dev->seq == 0) + if (dev_seq(dev) == 0) model_206ax_init(dev); return 0; diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c index d2f1ee38cf..0e61c7b5d7 100644 --- a/arch/x86/cpu/mp_init.c +++ b/arch/x86/cpu/mp_init.c @@ -87,7 +87,7 @@ DECLARE_GLOBAL_DATA_PTR; * intel,apic-id = <2>; * }; * - * Here the 'reg' property is the CPU number and then is placed in dev->req_seq + * Here the 'reg' property is the CPU number and then is placed in dev_seq(cpu) * so that we can index into ap_callbacks[] using that. The APIC ID is different * and may not be sequential (it typically is if hyperthreading is supported). * @@ -135,7 +135,7 @@ struct mp_flight_plan { * * @func: Function to run * @arg: Argument to pass to the function - * @logical_cpu_number: Either a CPU number (i.e. dev->req_seq) or a special + * @logical_cpu_number: Either a CPU number (i.e. dev_seq(cpu) or a special * value like MP_SELECT_BSP. It tells the AP whether it should process this * callback */ @@ -152,7 +152,7 @@ static struct mp_flight_plan mp_info; * ap_callbacks - Callback mailbox array * * Array of callback, one entry for each available CPU, indexed by the CPU - * number, which is dev->req_seq. The entry for the main CPU is never used. + * number, which is dev_seq(cpu). The entry for the main CPU is never used. * When this is NULL, there is no pending work for the CPU to run. When * non-NULL it points to the mp_callback structure. This is shared between all * CPUs, so should only be written by the main CPU. @@ -221,7 +221,7 @@ static int find_cpu_by_apic_id(int apic_id, struct udevice **devp) for (uclass_find_first_device(UCLASS_CPU, &dev); dev; uclass_find_next_device(&dev)) { - struct cpu_platdata *plat = dev_get_parent_platdata(dev); + struct cpu_plat *plat = dev_get_parent_plat(dev); if (plat->cpu_id == apic_id) { *devp = dev; @@ -562,7 +562,7 @@ static int get_bsp(struct udevice **devp, int *cpu_countp) if (cpu_countp) *cpu_countp = ret; - return dev->req_seq >= 0 ? dev->req_seq : 0; + return dev_seq(dev) >= 0 ? dev_seq(dev) : 0; } /** @@ -614,7 +614,7 @@ static void store_callback(struct mp_callback **slot, struct mp_callback *val) static int run_ap_work(struct mp_callback *callback, struct udevice *bsp, int num_cpus, uint expire_ms) { - int cur_cpu = bsp->req_seq; + int cur_cpu = dev_seq(bsp); int num_aps = num_cpus - 1; /* number of non-BSPs to get this message */ int cpus_accepted; ulong start; @@ -679,7 +679,7 @@ static int ap_wait_for_instruction(struct udevice *cpu, void *unused) if (!IS_ENABLED(CONFIG_SMP_AP_WORK)) return 0; - per_cpu_slot = &ap_callbacks[cpu->req_seq]; + per_cpu_slot = &ap_callbacks[dev_seq(cpu)]; while (1) { struct mp_callback *cb = read_callback(per_cpu_slot); @@ -694,7 +694,7 @@ static int ap_wait_for_instruction(struct udevice *cpu, void *unused) mfence(); if (lcb.logical_cpu_number == MP_SELECT_ALL || lcb.logical_cpu_number == MP_SELECT_APS || - cpu->req_seq == lcb.logical_cpu_number) + dev_seq(cpu) == lcb.logical_cpu_number) lcb.func(lcb.arg); /* Indicate we are finished */ @@ -706,7 +706,7 @@ static int ap_wait_for_instruction(struct udevice *cpu, void *unused) static int mp_init_cpu(struct udevice *cpu, void *unused) { - struct cpu_platdata *plat = dev_get_parent_platdata(cpu); + struct cpu_plat *plat = dev_get_parent_plat(cpu); plat->ucode_version = microcode_read_rev(); plat->device_id = gd->arch.x86_device; @@ -839,7 +839,6 @@ int mp_init(void) int num_aps, num_cpus; atomic_t *ap_count; struct udevice *cpu; - struct uclass *uc; int ret; if (IS_ENABLED(CONFIG_QFW)) { @@ -848,14 +847,6 @@ int mp_init(void) return ret; } - /* - * Multiple APs are brought up simultaneously and they may get the same - * seq num in the uclass_resolve_seq() during device_probe(). To avoid - * this, set req_seq to the reg number in the device tree in advance. - */ - uclass_id_foreach_dev(UCLASS_CPU, cpu, uc) - cpu->req_seq = dev_read_u32_default(cpu, "reg", -1); - ret = get_bsp(&cpu, &num_cpus); if (ret < 0) { debug("Cannot init boot CPU: err=%d\n", ret); diff --git a/arch/x86/cpu/qfw_cpu.c b/arch/x86/cpu/qfw_cpu.c index 349bab1583..a35de878b5 100644 --- a/arch/x86/cpu/qfw_cpu.c +++ b/arch/x86/cpu/qfw_cpu.c @@ -18,7 +18,7 @@ int qemu_cpu_fixup(void) int cpu_num; int cpu_online; struct udevice *dev, *pdev; - struct cpu_platdata *plat; + struct cpu_plat *plat; char *cpu; /* first we need to find '/cpus' */ @@ -67,7 +67,7 @@ int qemu_cpu_fixup(void) printf("binding cpu@%d failed: %d\n", cpu_num, ret); return ret; } - plat = dev_get_parent_platdata(dev); + plat = dev_get_parent_plat(dev); plat->cpu_id = cpu_num; } return 0; diff --git a/arch/x86/cpu/slimbootloader/serial.c b/arch/x86/cpu/slimbootloader/serial.c index 9813f7977b..772a94c31c 100644 --- a/arch/x86/cpu/slimbootloader/serial.c +++ b/arch/x86/cpu/slimbootloader/serial.c @@ -14,11 +14,11 @@ * The serial port info hob is generated by Slim Bootloader, so eligible for * Slim Bootloader based boards only. */ -static int slimbootloader_serial_ofdata_to_platdata(struct udevice *dev) +static int slimbootloader_serial_of_to_plat(struct udevice *dev) { const efi_guid_t guid = SBL_SERIAL_PORT_INFO_GUID; struct sbl_serial_port_info *data; - struct ns16550_platdata *plat = dev->platdata; + struct ns16550_plat *plat = dev_get_plat(dev); if (!gd->arch.hob_list) panic("hob list not found!"); @@ -57,9 +57,9 @@ U_BOOT_DRIVER(serial_slimbootloader) = { .name = "serial_slimbootloader", .id = UCLASS_SERIAL, .of_match = slimbootloader_serial_ids, - .ofdata_to_platdata = slimbootloader_serial_ofdata_to_platdata, - .platdata_auto_alloc_size = sizeof(struct ns16550_platdata), - .priv_auto_alloc_size = sizeof(struct NS16550), + .of_to_plat = slimbootloader_serial_of_to_plat, + .plat_auto = sizeof(struct ns16550_plat), + .priv_auto = sizeof(struct ns16550), .probe = ns16550_serial_probe, .ops = &ns16550_serial_ops, }; diff --git a/arch/x86/cpu/tangier/pinmux.c b/arch/x86/cpu/tangier/pinmux.c index 5b0e106011..acf97e3af5 100644 --- a/arch/x86/cpu/tangier/pinmux.c +++ b/arch/x86/cpu/tangier/pinmux.c @@ -191,5 +191,5 @@ U_BOOT_DRIVER(tangier_pinctrl) = { .id = UCLASS_SYSCON, .of_match = tangier_pinctrl_match, .probe = tangier_pinctrl_probe, - .priv_auto_alloc_size = sizeof(struct mrfld_pinctrl), + .priv_auto = sizeof(struct mrfld_pinctrl), }; diff --git a/arch/x86/cpu/turbo.c b/arch/x86/cpu/turbo.c index f8d85d5a33..4a73cb240d 100644 --- a/arch/x86/cpu/turbo.c +++ b/arch/x86/cpu/turbo.c @@ -35,12 +35,15 @@ static inline void set_global_turbo_state(int state) } #endif +/* gcc 7.3 does not wwant to drop strings, so use #ifdef */ +#ifndef CONFIG_TPL_BUILD static const char *const turbo_state_desc[] = { [TURBO_UNKNOWN] = "unknown", [TURBO_UNAVAILABLE] = "unavailable", [TURBO_DISABLED] = "available but hidden", [TURBO_ENABLED] = "available and visible" }; +#endif /* * Determine the current state of Turbo and cache it for later. @@ -76,7 +79,9 @@ int turbo_get_state(void) } set_global_turbo_state(turbo_state); +#ifndef CONFIG_TPL_BUILD debug("Turbo is %s\n", turbo_state_desc[turbo_state]); +#endif return turbo_state; } diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts index d66e128ae6..a846022095 100644 --- a/arch/x86/dts/chromebook_coral.dts +++ b/arch/x86/dts/chromebook_coral.dts @@ -102,12 +102,13 @@ }; cpus { - u-boot,dm-pre-reloc; + u-boot,dm-pre-proper; #address-cells = <1>; #size-cells = <0>; cpu_0: cpu@0 { - u-boot,dm-pre-reloc; + u-boot,dm-pre-proper; + u-boot,dm-spl; device_type = "cpu"; compatible = "intel,apl-cpu"; reg = <0>; @@ -174,6 +175,9 @@ */ fsp_s: fsp-s { }; + fsp_m: fsp-m { + u-boot,dm-spl; + }; nhlt { intel,dmic-channels = <4>; @@ -181,12 +185,14 @@ }; punit@0,1 { - u-boot,dm-pre-reloc; + u-boot,dm-pre-proper; + u-boot,dm-spl; reg = <0x00000800 0 0 0 0>; compatible = "intel,apl-punit"; }; gma@2,0 { + u-boot,dm-pre-proper; reg = <0x00001000 0 0 0 0>; compatible = "fsp-fb"; }; @@ -321,7 +327,8 @@ }; spi: fast-spi@d,2 { - u-boot,dm-pre-reloc; + u-boot,dm-pre-proper; + u-boot,dm-spl; reg = <0x02006a10 0 0 0 0>; #address-cells = <1>; #size-cells = <0>; @@ -332,7 +339,8 @@ fwstore_spi: spi-flash@0 { #size-cells = <1>; #address-cells = <1>; - u-boot,dm-pre-reloc; + u-boot,dm-pre-proper; + u-boot,dm-spl; reg = <0>; compatible = "winbond,w25q128fw", "jedec,spi-nor"; @@ -574,7 +582,7 @@ #size-cells = <0>; u-boot,dm-pre-reloc; cros_ec: cros-ec { - u-boot,dm-pre-reloc; + u-boot,dm-pre-proper; compatible = "google,cros-ec-lpc"; reg = <0x204 1 0x200 1 0x880 0x80>; @@ -650,7 +658,9 @@ PAD_CFG_NF(LPC_CLKRUNB, UP_20K, DEEP, NF1) /* LPC_CLKRUN_N */ PAD_CFG_NF(LPC_FRAMEB, NATIVE, DEEP, NF1) /* LPC_FRAME_N */ >; +}; +&fsp_m { fspm,package = <PACKAGE_BGA>; fspm,profile = <PROFILE_LPDDR4_2400_24_22_22>; fspm,memory-down = <MEMORY_DOWN_YES>; diff --git a/arch/x86/dts/rtc.dtsi b/arch/x86/dts/rtc.dtsi index d0bbd84e50..942cc937dc 100644 --- a/arch/x86/dts/rtc.dtsi +++ b/arch/x86/dts/rtc.dtsi @@ -1,7 +1,7 @@ / { rtc: rtc { compatible = "motorola,mc146818"; - u-boot,dm-pre-reloc; + u-boot,dm-pre-proper; reg = <0x70 2>; }; }; diff --git a/arch/x86/include/asm/arch-apollolake/gpio.h b/arch/x86/include/asm/arch-apollolake/gpio.h index ab5860c0fd..762160da88 100644 --- a/arch/x86/include/asm/arch-apollolake/gpio.h +++ b/arch/x86/include/asm/arch-apollolake/gpio.h @@ -485,4 +485,22 @@ /* This is needed by ACPI */ #define GPIO_NUM_PAD_CFG_REGS 2 /* DW0, DW1 */ +#ifndef __ASSEMBLY__ + +#include <dt-structs.h> + +/** + * struct apl_gpio_plat - platform data for each device + * + * @dtplat: of-platdata data from C struct + */ +struct apl_gpio_plat { +#if CONFIG_IS_ENABLED(OF_PLATDATA) + /* Put this first since driver model will copy the data here */ + struct dtd_intel_apl_pinctrl dtplat; +#endif +}; + +#endif /* __ASSEMBLY__ */ + #endif /* _ASM_ARCH_GPIO_H_ */ diff --git a/arch/x86/include/asm/arch-apollolake/hostbridge.h b/arch/x86/include/asm/arch-apollolake/hostbridge.h new file mode 100644 index 0000000000..f4dce0d522 --- /dev/null +++ b/arch/x86/include/asm/arch-apollolake/hostbridge.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2020 Google LLC + */ + +#ifndef _ASM_ARCH_HOSTBRIDGE_H_ +#define _ASM_ARCH_HOSTBRIDGE_H_ + +/** + * struct apl_hostbridge_plat - platform data for hostbridge + * + * @dtplat: Platform data for of-platdata + * @early_pads: Early pad data to set up, each (pad, cfg0, cfg1) + * @early_pads_count: Number of pads to process + * @pciex_region_size: BAR length in bytes + * @bdf: Bus/device/function of hostbridge + */ +struct apl_hostbridge_plat { +#if CONFIG_IS_ENABLED(OF_PLATDATA) + struct dtd_intel_apl_hostbridge dtplat; +#endif + u32 *early_pads; + int early_pads_count; + uint pciex_region_size; + pci_dev_t bdf; +}; + +#endif /* _ASM_ARCH_HOSTBRIDGE_H_ */ diff --git a/arch/x86/include/asm/arch-apollolake/pmc.h b/arch/x86/include/asm/arch-apollolake/pmc.h new file mode 100644 index 0000000000..23ac8fe7e2 --- /dev/null +++ b/arch/x86/include/asm/arch-apollolake/pmc.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2020 Google LLC + */ + +#ifndef ASM_ARCH_PMC_H +#define ASM_ARCH_PMC_H + +struct apl_pmc_plat { +#if CONFIG_IS_ENABLED(OF_PLATDATA) + struct dtd_intel_apl_pmc dtplat; +#endif + pci_dev_t bdf; +}; + +#endif /* ASM_ARCH_PMC_H */ diff --git a/arch/x86/include/asm/arch-apollolake/uart.h b/arch/x86/include/asm/arch-apollolake/uart.h index d4fffe6525..38335b0490 100644 --- a/arch/x86/include/asm/arch-apollolake/uart.h +++ b/arch/x86/include/asm/arch-apollolake/uart.h @@ -6,6 +6,23 @@ #ifndef _ASM_ARCH_UART_H #define _ASM_ARCH_UART_H +#include <ns16550.h> + +/** + * struct apl_ns16550_plat - platform data for the APL UART + * + * Note that when of-platdata is in use, apl_ns16550_of_to_plat() actually + * copies the ns16550_plat contents to the start of this struct, meaning that + * dtplat is no-longer valid. This is done so that the ns16550 driver can use + * dev_get_plat() without any offsets or adjustments. + */ +struct apl_ns16550_plat { +#if CONFIG_IS_ENABLED(OF_PLATDATA) + struct dtd_intel_apl_ns16550 dtplat; +#endif + struct ns16550_plat ns16550; +}; + /** * apl_uart_init() - Set up the APL UART device and clock * @@ -15,6 +32,6 @@ * The UART won't actually work unless the GPIO settings are correct and the * signals actually exit the SoC. See board_debug_uart_init() for that. */ -int apl_uart_init(pci_dev_t bdf, ulong base); +void apl_uart_init(pci_dev_t bdf, ulong base); #endif diff --git a/arch/x86/include/asm/arch-broadwell/gpio.h b/arch/x86/include/asm/arch-broadwell/gpio.h index a32e2db47e..393230e52b 100644 --- a/arch/x86/include/asm/arch-broadwell/gpio.h +++ b/arch/x86/include/asm/arch-broadwell/gpio.h @@ -11,7 +11,7 @@ #define GPIO_PER_BANK 32 #define GPIO_BANKS 3 -struct broadwell_bank_platdata { +struct broadwell_bank_plat { uint16_t base_addr; const char *bank_name; int bank; diff --git a/arch/x86/include/asm/gpio.h b/arch/x86/include/asm/gpio.h index 58e4d7b831..a45ae3463c 100644 --- a/arch/x86/include/asm/gpio.h +++ b/arch/x86/include/asm/gpio.h @@ -8,7 +8,7 @@ #include <asm-generic/gpio.h> -struct ich6_bank_platdata { +struct ich6_bank_plat { uint16_t base_addr; const char *bank_name; int offset; diff --git a/arch/x86/include/asm/intel_pinctrl.h b/arch/x86/include/asm/intel_pinctrl.h index 00868d1725..44eedc205c 100644 --- a/arch/x86/include/asm/intel_pinctrl.h +++ b/arch/x86/include/asm/intel_pinctrl.h @@ -162,16 +162,15 @@ extern const struct pinctrl_ops intel_pinctrl_ops; int intel_pinctrl_probe(struct udevice *dev); /** - * intel_pinctrl_ofdata_to_platdata() - Handle common platdata setup + * intel_pinctrl_of_to_plat() - Handle common plat setup * * @dev: Pinctrl device * @comm: Pad community for this device * @num_cfgs: Number of configuration words for each pad * @return 0 if OK, -EDOM if @comm is NULL, other -ve value on other error */ -int intel_pinctrl_ofdata_to_platdata(struct udevice *dev, - const struct pad_community *comm, - int num_cfgs); +int intel_pinctrl_of_to_plat(struct udevice *dev, + const struct pad_community *comm, int num_cfgs); /** * pinctrl_route_gpe() - set GPIO groups for the general-purpose-event blocks diff --git a/arch/x86/include/asm/itss.h b/arch/x86/include/asm/itss.h index f7d3240384..6d4793277e 100644 --- a/arch/x86/include/asm/itss.h +++ b/arch/x86/include/asm/itss.h @@ -11,6 +11,8 @@ #ifndef _ASM_ARCH_ITSS_H #define _ASM_ARCH_ITSS_H +#include <irq.h> + #define GPIO_IRQ_START 50 #define GPIO_IRQ_END ITSS_MAX_IRQ @@ -42,4 +44,23 @@ /* ITSS Power reduction control */ #define PCR_ITSS_ITSSPRC 0x3300 +struct itss_plat { +#if CONFIG_IS_ENABLED(OF_PLATDATA) + /* Put this first since driver model will copy the data here */ + struct dtd_intel_itss dtplat; +#endif +}; + +/* struct pmc_route - Routing for PMC to GPIO */ +struct pmc_route { + u32 pmc; + u32 gpio; +}; + +struct itss_priv { + struct pmc_route *route; + uint route_count; + u32 irq_snapshot[NUM_IPC_REGS]; +}; + #endif /* _ASM_ARCH_ITSS_H */ diff --git a/arch/x86/include/asm/mp.h b/arch/x86/include/asm/mp.h index 5f9b8c6564..1e4e35321d 100644 --- a/arch/x86/include/asm/mp.h +++ b/arch/x86/include/asm/mp.h @@ -114,7 +114,7 @@ typedef void (*mp_run_func)(void *arg); * Running on anything other than the boot CPU is only supported if * CONFIG_SMP_AP_WORK is enabled * - * @cpu_select: CPU to run on (its dev->req_seq value), or MP_SELECT_ALL for + * @cpu_select: CPU to run on (its dev_seq() value), or MP_SELECT_ALL for * all, or MP_SELECT_BSP for BSP * @func: Function to run * @arg: Argument to pass to the function diff --git a/arch/x86/include/asm/p2sb.h b/arch/x86/include/asm/p2sb.h new file mode 100644 index 0000000000..6f63eae8e2 --- /dev/null +++ b/arch/x86/include/asm/p2sb.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2020 Google LLC + */ + +#ifndef ASM_P2SB_H +#define ASM_P2SB_H + +/* Platform data for the P2SB */ +struct p2sb_plat { +#if CONFIG_IS_ENABLED(OF_PLATDATA) + struct dtd_intel_p2sb dtplat; +#endif + ulong mmio_base; + pci_dev_t bdf; +}; + +#endif /* ASM_P2SB_H */ diff --git a/arch/x86/include/asm/pmu.h b/arch/x86/include/asm/pmu.h index b76bdf64a3..818e80881e 100644 --- a/arch/x86/include/asm/pmu.h +++ b/arch/x86/include/asm/pmu.h @@ -2,9 +2,9 @@ /* * Copyright (c) 2017 Intel Corporation */ -#ifndef _X86_ASM_PMU_IPC_H_ -#define _X86_ASM_PMU_IPC_H_ +#ifndef _X86_ASM_PMU_H_ +#define _X86_ASM_PMU_H_ int pmu_turn_power(unsigned int lss, bool on); -#endif /* _X86_ASM_PMU_IPC_H_ */ +#endif /* _X86_ASM_PMU_H_ */ diff --git a/arch/x86/include/asm/sysreset.h b/arch/x86/include/asm/sysreset.h new file mode 100644 index 0000000000..5e586f51c0 --- /dev/null +++ b/arch/x86/include/asm/sysreset.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2020 Google LLC + */ +#ifndef _X86_ASM_SYSRESET_H_ +#define _X86_ASM_SYSRESET_H_ + +#include <dt-structs.h> + +struct x86_sysreset_plat { +#if CONFIG_IS_ENABLED(OF_PLATDATA) + struct dtd_x86_reset dtplat; +#endif + + struct udevice *pch; +}; + +#endif /* _X86_ASM_SYSRESET_H_ */ diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c index 4fd8dc8ad9..9a41ecb587 100644 --- a/arch/x86/lib/acpi_table.c +++ b/arch/x86/lib/acpi_table.c @@ -74,7 +74,7 @@ int acpi_create_madt_lapics(u32 current) for (uclass_find_first_device(UCLASS_CPU, &dev); dev; uclass_find_next_device(&dev)) { - struct cpu_platdata *plat = dev_get_parent_platdata(dev); + struct cpu_plat *plat = dev_get_parent_plat(dev); int length; length = acpi_create_madt_lapic( diff --git a/arch/x86/lib/fsp/fsp_graphics.c b/arch/x86/lib/fsp/fsp_graphics.c index 6534b6690b..a029237d08 100644 --- a/arch/x86/lib/fsp/fsp_graphics.c +++ b/arch/x86/lib/fsp/fsp_graphics.c @@ -80,7 +80,7 @@ static int save_vesa_mode(struct vesa_mode_info *vesa) static int fsp_video_probe(struct udevice *dev) { - struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); + struct video_uc_plat *plat = dev_get_uclass_plat(dev); struct video_priv *uc_priv = dev_get_uclass_priv(dev); struct vesa_mode_info *vesa = &mode_info.vesa; int ret; @@ -124,7 +124,7 @@ err: static int fsp_video_bind(struct udevice *dev) { - struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); + struct video_uc_plat *plat = dev_get_uclass_plat(dev); /* Set the maximum supported resolution */ plat->size = 2560 * 1600 * 4; diff --git a/arch/x86/lib/mpspec.c b/arch/x86/lib/mpspec.c index 1c49c41b31..562a27c557 100644 --- a/arch/x86/lib/mpspec.c +++ b/arch/x86/lib/mpspec.c @@ -81,7 +81,7 @@ void mp_write_processor(struct mp_config_table *mc) for (uclass_find_first_device(UCLASS_CPU, &dev); dev; uclass_find_next_device(&dev)) { - struct cpu_platdata *plat = dev_get_parent_platdata(dev); + struct cpu_plat *plat = dev_get_parent_plat(dev); u8 cpuflag = MPC_CPU_EN; if (!device_active(dev)) diff --git a/arch/x86/lib/pmu.c b/arch/x86/lib/pmu.c index 3cd7b1f536..083aec8d8d 100644 --- a/arch/x86/lib/pmu.c +++ b/arch/x86/lib/pmu.c @@ -113,5 +113,5 @@ U_BOOT_DRIVER(intel_mid_pmu) = { .id = UCLASS_SYSCON, .of_match = pmu_mid_match, .probe = pmu_mid_probe, - .priv_auto_alloc_size = sizeof(struct pmu_mid), + .priv_auto = sizeof(struct pmu_mid), }; diff --git a/arch/x86/lib/scu.c b/arch/x86/lib/scu.c index d29d701631..90ef239bcd 100644 --- a/arch/x86/lib/scu.c +++ b/arch/x86/lib/scu.c @@ -227,5 +227,5 @@ U_BOOT_DRIVER(scu_ipc) = { .id = UCLASS_SYSCON, .of_match = scu_ipc_match, .probe = scu_ipc_probe, - .priv_auto_alloc_size = sizeof(struct scu), + .priv_auto = sizeof(struct scu), }; diff --git a/arch/x86/lib/sfi.c b/arch/x86/lib/sfi.c index b48bd5d8f3..85e963b634 100644 --- a/arch/x86/lib/sfi.c +++ b/arch/x86/lib/sfi.c @@ -84,7 +84,7 @@ static int sfi_write_cpus(struct table_info *tab) for (uclass_find_first_device(UCLASS_CPU, &dev); dev; uclass_find_next_device(&dev)) { - struct cpu_platdata *plat = dev_get_parent_platdata(dev); + struct cpu_plat *plat = dev_get_parent_plat(dev); if (!device_active(dev)) continue; diff --git a/arch/x86/lib/tpl.c b/arch/x86/lib/tpl.c index 15b0212d19..04ff32277f 100644 --- a/arch/x86/lib/tpl.c +++ b/arch/x86/lib/tpl.c @@ -133,14 +133,16 @@ void spl_board_init(void) * for devices, so the TPL BARs continue to be used. Once U-Boot starts it does * the auto allocation (after relocation). */ +#if !CONFIG_IS_ENABLED(OF_PLATDATA) static const struct udevice_id tpl_fake_pci_ids[] = { { .compatible = "pci-x86" }, { } }; +#endif U_BOOT_DRIVER(pci_x86) = { .name = "pci_x86", .id = UCLASS_SIMPLE_BUS, - .of_match = tpl_fake_pci_ids, + .of_match = of_match_ptr(tpl_fake_pci_ids), }; #endif diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c index 24a503d011..708025b207 100644 --- a/arch/x86/lib/zimage.c +++ b/arch/x86/lib/zimage.c @@ -15,6 +15,7 @@ #define LOG_CATEGORY LOGC_BOOT #include <common.h> +#include <bootm.h> #include <command.h> #include <env.h> #include <irq_func.h> @@ -330,7 +331,12 @@ int setup_zimage(struct boot_params *setup_base, char *cmd_line, int auto_boot, } if (cmd_line) { + int max_size = 0xff; + int ret; + log_debug("Setup cmdline\n"); + if (bootproto >= 0x0206) + max_size = hdr->cmdline_size; if (bootproto >= 0x0202) { hdr->cmd_line_ptr = (uintptr_t)cmd_line; } else if (bootproto >= 0x0200) { @@ -346,6 +352,14 @@ int setup_zimage(struct boot_params *setup_base, char *cmd_line, int auto_boot, strcpy(cmd_line, (char *)cmdline_force); else build_command_line(cmd_line, auto_boot); + ret = bootm_process_cmdline(cmd_line, max_size, BOOTM_CL_ALL); + if (ret) { + printf("Cmdline setup failed (err=%d)\n", ret); + return ret; + } + printf("Kernel command line: \""); + puts(cmd_line); + printf("\"\n"); } if (IS_ENABLED(CONFIG_INTEL_MID) && bootproto >= 0x0207) |