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-rw-r--r--arch/arm/dts/imx6q-tbs2910.dts11
-rw-r--r--arch/arm/mach-rockchip/rk3188/rk3188.c21
-rw-r--r--arch/arm/mach-socfpga/misc_s10.c2
3 files changed, 31 insertions, 3 deletions
diff --git a/arch/arm/dts/imx6q-tbs2910.dts b/arch/arm/dts/imx6q-tbs2910.dts
index cc5df37b46..7d0a0676ff 100644
--- a/arch/arm/dts/imx6q-tbs2910.dts
+++ b/arch/arm/dts/imx6q-tbs2910.dts
@@ -107,7 +107,18 @@
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii-id";
phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
+ phy-handle = <&phy>;
status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy: ethernet-phy@4 {
+ reg = <4>;
+ qca,clk-out-frequency = <125000000>;
+ };
+ };
};
&hdmi {
diff --git a/arch/arm/mach-rockchip/rk3188/rk3188.c b/arch/arm/mach-rockchip/rk3188/rk3188.c
index ef57dfd761..1b2f4a4757 100644
--- a/arch/arm/mach-rockchip/rk3188/rk3188.c
+++ b/arch/arm/mach-rockchip/rk3188/rk3188.c
@@ -77,15 +77,32 @@ int arch_cpu_init(void)
BYPASSSEL_MASK | BYPASSDMEN_MASK,
1 << BYPASSSEL_SHIFT | 1 << BYPASSDMEN_SHIFT);
#endif
+ return 0;
+}
+#endif
+
+__weak int rk3188_board_late_init(void)
+{
+ return 0;
+}
+
+int rk_board_late_init(void)
+{
+ struct rk3188_grf *grf;
+
+ grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+ if (IS_ERR(grf)) {
+ pr_err("grf syscon returned %ld\n", PTR_ERR(grf));
+ return 0;
+ }
/* enable noc remap to mimic legacy loaders */
rk_clrsetreg(&grf->soc_con0,
NOC_REMAP_MASK << NOC_REMAP_SHIFT,
NOC_REMAP_MASK << NOC_REMAP_SHIFT);
- return 0;
+ return rk3188_board_late_init();
}
-#endif
#ifdef CONFIG_SPL_BUILD
static int setup_led(void)
diff --git a/arch/arm/mach-socfpga/misc_s10.c b/arch/arm/mach-socfpga/misc_s10.c
index ccff78a230..670bfa1a31 100644
--- a/arch/arm/mach-socfpga/misc_s10.c
+++ b/arch/arm/mach-socfpga/misc_s10.c
@@ -68,7 +68,7 @@ static u32 socfpga_phymode_setup(u32 gmac_index, const char *phymode)
return -EINVAL;
clrsetbits_le32(socfpga_get_sysmgr_addr() + SYSMGR_SOC64_EMAC0 +
- gmac_index,
+ (gmac_index * sizeof(u32)),
SYSMGR_EMACGRP_CTRL_PHYSEL_MASK, modereg);
return 0;