diff options
Diffstat (limited to 'board/engicam/isiotmx6ul/isiotmx6ul.c')
| -rw-r--r-- | board/engicam/isiotmx6ul/isiotmx6ul.c | 129 |
1 files changed, 0 insertions, 129 deletions
diff --git a/board/engicam/isiotmx6ul/isiotmx6ul.c b/board/engicam/isiotmx6ul/isiotmx6ul.c deleted file mode 100644 index 05d23c2df2..0000000000 --- a/board/engicam/isiotmx6ul/isiotmx6ul.c +++ /dev/null @@ -1,129 +0,0 @@ -/* - * Copyright (C) 2016 Amarula Solutions B.V. - * Copyright (C) 2016 Engicam S.r.l. - * Author: Jagan Teki <jagan@amarulasolutions.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <mmc.h> - -#include <asm/io.h> -#include <asm/gpio.h> -#include <linux/sizes.h> - -#include <asm/arch/clock.h> -#include <asm/arch/crm_regs.h> -#include <asm/arch/iomux.h> -#include <asm/arch/mx6-pins.h> -#include <asm/arch/sys_proto.h> -#include <asm/mach-imx/iomux-v3.h> - -#include "../common/board.h" - -DECLARE_GLOBAL_DATA_PTR; - -#ifdef CONFIG_NAND_MXS - -#define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP) -#define GPMI_PAD_CTRL1 (PAD_CTL_DSE_40ohm | PAD_CTL_SPEED_MED | \ - PAD_CTL_SRE_FAST) -#define GPMI_PAD_CTRL2 (GPMI_PAD_CTRL0 | GPMI_PAD_CTRL1) - -static iomux_v3_cfg_t const nand_pads[] = { - IOMUX_PADS(PAD_NAND_DATA00__RAWNAND_DATA00 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA01__RAWNAND_DATA01 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA02__RAWNAND_DATA02 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA03__RAWNAND_DATA03 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA04__RAWNAND_DATA04 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA05__RAWNAND_DATA05 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA06__RAWNAND_DATA06 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA07__RAWNAND_DATA07 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_CLE__RAWNAND_CLE | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_ALE__RAWNAND_ALE | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_CE0_B__RAWNAND_CE0_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_RE_B__RAWNAND_RE_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_WE_B__RAWNAND_WE_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_WP_B__RAWNAND_WP_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_READY_B__RAWNAND_READY_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), -}; - -void setup_gpmi_nand(void) -{ - struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; - - /* config gpmi nand iomux */ - SETUP_IOMUX_PADS(nand_pads); - - clrbits_le32(&mxc_ccm->CCGR4, - MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK | - MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_MASK); - - /* - * config gpmi and bch clock to 100 MHz - * bch/gpmi select PLL2 PFD2 400M - * 100M = 400M / 4 - */ - clrbits_le32(&mxc_ccm->cscmr1, - MXC_CCM_CSCMR1_BCH_CLK_SEL | - MXC_CCM_CSCMR1_GPMI_CLK_SEL); - clrsetbits_le32(&mxc_ccm->cscdr1, - MXC_CCM_CSCDR1_BCH_PODF_MASK | - MXC_CCM_CSCDR1_GPMI_PODF_MASK, - (3 << MXC_CCM_CSCDR1_BCH_PODF_OFFSET) | - (3 << MXC_CCM_CSCDR1_GPMI_PODF_OFFSET)); - - /* enable gpmi and bch clock gating */ - setbits_le32(&mxc_ccm->CCGR4, - MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK | - MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_MASK); - - /* enable apbh clock gating */ - setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK); -} -#endif /* CONFIG_NAND_MXS */ - -#ifdef CONFIG_ENV_IS_IN_MMC -int board_mmc_get_env_dev(int devno) -{ - /* dev 0 for SD/eSD, dev 1 for MMC/eMMC */ - return (devno == 0) ? 0 : 1; -} -#endif - -#ifdef CONFIG_SPL_BUILD -#include <spl.h> - -#ifdef CONFIG_ENV_IS_IN_MMC -void board_boot_order(u32 *spl_boot_list) -{ - u32 bmode = imx6_src_get_boot_mode(); - u8 boot_dev = BOOT_DEVICE_MMC1; - - switch ((bmode & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) { - case IMX6_BMODE_SD: - case IMX6_BMODE_ESD: - /* SD/eSD - BOOT_DEVICE_MMC1 */ - break; - case IMX6_BMODE_MMC: - case IMX6_BMODE_EMMC: - /* MMC/eMMC */ - boot_dev = BOOT_DEVICE_MMC2; - break; - default: - /* Default - BOOT_DEVICE_MMC1 */ - printf("Wrong board boot order\n"); - break; - } - - spl_boot_list[0] = boot_dev; -} -#endif -#endif /* CONFIG_SPL_BUILD */ |