diff options
Diffstat (limited to 'board/freescale/common')
| -rw-r--r-- | board/freescale/common/Makefile | 1 | ||||
| -rw-r--r-- | board/freescale/common/p_corenet/law.c | 5 | ||||
| -rw-r--r-- | board/freescale/common/p_corenet/tlb.c | 7 |
3 files changed, 13 insertions, 0 deletions
diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile index 79f9de262f..b27f054dfe 100644 --- a/board/freescale/common/Makefile +++ b/board/freescale/common/Makefile @@ -54,6 +54,7 @@ COBJS-$(CONFIG_P4080DS) += ics307_clk.o COBJS-$(CONFIG_P5020DS) += ics307_clk.o # deal with common files for P-series corenet based devices +SUBLIB-$(CONFIG_P2041RDB) += p_corenet/libp_corenet.o SUBLIB-$(CONFIG_P3041DS) += p_corenet/libp_corenet.o SUBLIB-$(CONFIG_P4080DS) += p_corenet/libp_corenet.o SUBLIB-$(CONFIG_P5020DS) += p_corenet/libp_corenet.o diff --git a/board/freescale/common/p_corenet/law.c b/board/freescale/common/p_corenet/law.c index 58f23c5a24..09ef5615d2 100644 --- a/board/freescale/common/p_corenet/law.c +++ b/board/freescale/common/p_corenet/law.c @@ -35,7 +35,12 @@ struct law_entry law_table[] = { #ifdef CONFIG_SYS_QMAN_MEM_PHYS SET_LAW(CONFIG_SYS_QMAN_MEM_PHYS, LAW_SIZE_2M, LAW_TRGT_IF_QMAN), #endif +#ifdef PIXIS_BASE_PHYS SET_LAW(PIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_LBC), +#endif +#ifdef CPLD_BASE_PHYS + SET_LAW(CPLD_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_LBC), +#endif #ifdef CONFIG_SYS_DCSRBAR_PHYS /* Limit DCSR to 32M to access NPC Trace Buffer */ SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR), diff --git a/board/freescale/common/p_corenet/tlb.c b/board/freescale/common/p_corenet/tlb.c index 5e48d6c635..6a0026a2cf 100644 --- a/board/freescale/common/p_corenet/tlb.c +++ b/board/freescale/common/p_corenet/tlb.c @@ -44,10 +44,17 @@ struct fsl_e_tlb_entry tlb_table[] = { CONFIG_SYS_INIT_RAM_ADDR_PHYS + 12 * 1024, MAS3_SW|MAS3_SR, 0, 0, 0, BOOKE_PAGESZ_4K, 0), +#ifdef CPLD_BASE + SET_TLB_ENTRY(0, CPLD_BASE, CPLD_BASE_PHYS, + MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 0, BOOKE_PAGESZ_4K, 0), +#endif +#ifdef PIXIS_BASE SET_TLB_ENTRY(0, PIXIS_BASE, PIXIS_BASE_PHYS, MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 0, BOOKE_PAGESZ_4K, 0), +#endif /* TLB 1 */ /* *I*** - Covers boot page */ |