diff options
Diffstat (limited to 'board')
42 files changed, 854 insertions, 244 deletions
diff --git a/board/CZ.NIC/turris_omnia/kwbimage.cfg b/board/CZ.NIC/turris_omnia/kwbimage.cfg deleted file mode 100644 index cc05792556..0000000000 --- a/board/CZ.NIC/turris_omnia/kwbimage.cfg +++ /dev/null @@ -1,12 +0,0 @@ -# -# Copyright (C) 2014 Stefan Roese <sr@denx.de> -# - -# Armada XP uses version 1 image format -VERSION 1 - -# Boot Media configurations -BOOT_FROM spi - -# Binary Header (bin_hdr) with DDR3 training code -BINARY spl/u-boot-spl.bin 0000005b 00000068 diff --git a/board/Marvell/db-88f6720/kwbimage.cfg b/board/Marvell/db-88f6720/kwbimage.cfg deleted file mode 100644 index 1f748db37c..0000000000 --- a/board/Marvell/db-88f6720/kwbimage.cfg +++ /dev/null @@ -1,12 +0,0 @@ -# -# Copyright (C) 2014 Stefan Roese <sr@denx.de> -# - -# Armada XP uses version 1 image format -VERSION 1 - -# Boot Media configurations -BOOT_FROM spi - -# Binary Header (bin_hdr) with DDR3 training code -BINARY spl/u-boot-spl-dtb.bin 0000005b 00000068 diff --git a/board/Marvell/db-88f6820-amc/kwbimage.cfg b/board/Marvell/db-88f6820-amc/kwbimage.cfg deleted file mode 100644 index 1f748db37c..0000000000 --- a/board/Marvell/db-88f6820-amc/kwbimage.cfg +++ /dev/null @@ -1,12 +0,0 @@ -# -# Copyright (C) 2014 Stefan Roese <sr@denx.de> -# - -# Armada XP uses version 1 image format -VERSION 1 - -# Boot Media configurations -BOOT_FROM spi - -# Binary Header (bin_hdr) with DDR3 training code -BINARY spl/u-boot-spl-dtb.bin 0000005b 00000068 diff --git a/board/Marvell/db-88f6820-gp/kwbimage.cfg b/board/Marvell/db-88f6820-gp/kwbimage.cfg deleted file mode 100644 index 1f748db37c..0000000000 --- a/board/Marvell/db-88f6820-gp/kwbimage.cfg +++ /dev/null @@ -1,12 +0,0 @@ -# -# Copyright (C) 2014 Stefan Roese <sr@denx.de> -# - -# Armada XP uses version 1 image format -VERSION 1 - -# Boot Media configurations -BOOT_FROM spi - -# Binary Header (bin_hdr) with DDR3 training code -BINARY spl/u-boot-spl-dtb.bin 0000005b 00000068 diff --git a/board/Marvell/db-mv784mp-gp/kwbimage.cfg b/board/Marvell/db-mv784mp-gp/kwbimage.cfg deleted file mode 100644 index 1f748db37c..0000000000 --- a/board/Marvell/db-mv784mp-gp/kwbimage.cfg +++ /dev/null @@ -1,12 +0,0 @@ -# -# Copyright (C) 2014 Stefan Roese <sr@denx.de> -# - -# Armada XP uses version 1 image format -VERSION 1 - -# Boot Media configurations -BOOT_FROM spi - -# Binary Header (bin_hdr) with DDR3 training code -BINARY spl/u-boot-spl-dtb.bin 0000005b 00000068 diff --git a/board/Marvell/openrd/MAINTAINERS b/board/Marvell/openrd/MAINTAINERS index 3789a04c89..b24fff0a78 100644 --- a/board/Marvell/openrd/MAINTAINERS +++ b/board/Marvell/openrd/MAINTAINERS @@ -1,12 +1,8 @@ -OPENRD BOARD -M: Albert ARIBAUD <albert-u-boot@aribaud.net> -S: Maintained +OPENRD / OPENRD_CLIENT BOARD +#M: Albert ARIBAUD <albert-u-boot@aribaud.net> +S: Orphaned (Since 2018-09) F: board/Marvell/openrd/ F: include/configs/openrd.h F: configs/openrd_base_defconfig - -OPENRD_CLIENT BOARD -M: Albert ARIBAUD <albert-u-boot@aribaud.net> -S: Maintained F: configs/openrd_client_defconfig F: configs/openrd_ultimate_defconfig diff --git a/board/Synology/ds414/kwbimage.cfg b/board/Synology/ds414/kwbimage.cfg deleted file mode 100644 index 1f748db37c..0000000000 --- a/board/Synology/ds414/kwbimage.cfg +++ /dev/null @@ -1,12 +0,0 @@ -# -# Copyright (C) 2014 Stefan Roese <sr@denx.de> -# - -# Armada XP uses version 1 image format -VERSION 1 - -# Boot Media configurations -BOOT_FROM spi - -# Binary Header (bin_hdr) with DDR3 training code -BINARY spl/u-boot-spl-dtb.bin 0000005b 00000068 diff --git a/board/alliedtelesis/SBx81LIFXCAT/Kconfig b/board/alliedtelesis/SBx81LIFXCAT/Kconfig new file mode 100644 index 0000000000..524c290089 --- /dev/null +++ b/board/alliedtelesis/SBx81LIFXCAT/Kconfig @@ -0,0 +1,12 @@ +if TARGET_SBx81LIFXCAT + +config SYS_BOARD + default "SBx81LIFXCAT" + +config SYS_VENDOR + default "alliedtelesis" + +config SYS_CONFIG_NAME + default "SBx81LIFXCAT" + +endif diff --git a/board/alliedtelesis/SBx81LIFXCAT/MAINTAINERS b/board/alliedtelesis/SBx81LIFXCAT/MAINTAINERS new file mode 100644 index 0000000000..6b722ded25 --- /dev/null +++ b/board/alliedtelesis/SBx81LIFXCAT/MAINTAINERS @@ -0,0 +1,7 @@ +SBx81LIFXCAT BOARD +M: Chris Packham <chris.packham@alliedtelesis.co.nz> +S: Maintained +F: board/alliedtelesis/SBx81LIFXCAT/ +F: include/configs/SBx81LIFXCAT +F: configs/SBx81LIFXCAT_defconfig +F: arch/arm/dts/kirkwood-atl-sbx81lifxcat.dts diff --git a/board/alliedtelesis/SBx81LIFXCAT/Makefile b/board/alliedtelesis/SBx81LIFXCAT/Makefile new file mode 100644 index 0000000000..f21c8ef9d6 --- /dev/null +++ b/board/alliedtelesis/SBx81LIFXCAT/Makefile @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2010, 2018 +# Allied Telesis <www.alliedtelesis.com> +# + +obj-y += sbx81lifxcat.o diff --git a/board/alliedtelesis/SBx81LIFXCAT/kwbimage.cfg b/board/alliedtelesis/SBx81LIFXCAT/kwbimage.cfg new file mode 100644 index 0000000000..53d4812f34 --- /dev/null +++ b/board/alliedtelesis/SBx81LIFXCAT/kwbimage.cfg @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2018 Allied Telesis +# +# Refer docs/README.kwimage for more details about how-to configure +# and create kirkwood boot image +# + +# Boot Media configurations +BOOT_FROM spi # Boot from SPI flash + +# SOC registers configuration using bootrom header extension +# Maximum KWBIMAGE_MAX_CONFIG configurations allowed +DATA 0xffd100e0 0x1b1b1b1b +DATA 0xffd20134 0xffffffff +DATA 0xffd20138 0x009fffff +DATA 0xffd20154 0x00000000 +DATA 0xffd2014c 0x00000000 +DATA 0xffd20148 0x00000001 + +# Dram initalization for 1 x x16 +# DDR II Micron part number MT47H64M16HR-3 +# MClk 333MHz, Size 128MB, ECC disable +# +DATA 0xffd01400 0x43000618 +DATA 0xffd01404 0x38543000 +DATA 0xffd01408 0x23125441 +DATA 0xffd0140c 0x00000832 +DATA 0xffd01410 0x0000000D +DATA 0xffd01414 0x00000000 +DATA 0xffd01418 0x00000000 +DATA 0xffd0141c 0x00000652 +DATA 0xffd01420 0x00000042 +DATA 0xffd01424 0x0000F0FF +DATA 0xffd01428 0x00074410 +DATA 0xffd0147C 0x00007441 +DATA 0xffd01500 0x00000000 # SDRAM CS[0] Base address at 0x00000000 +DATA 0xffd01504 0x07FFFFF1 # SDRAM CS[0] Size 128MiB +DATA 0xffd01508 0x10000000 +DATA 0xffd0150c 0x00FFFFF4 # SDRAM CS[1] Size, window disabled +DATA 0xffd01514 0x00FFFFF8 # SDRAM CS[2] Size, window disabled +DATA 0xffd0151c 0x00FFFFFC # SDRAM CS[3] Size, window disabled +DATA 0xffd01494 0x84210000 +DATA 0xffd01498 0x00000000 +DATA 0xffd0149c 0x0000F80F +DATA 0xffd01480 0x00000001 + +# End of Header extension +DATA 0x0 0x0 diff --git a/board/alliedtelesis/SBx81LIFXCAT/sbx81lifxcat.c b/board/alliedtelesis/SBx81LIFXCAT/sbx81lifxcat.c new file mode 100644 index 0000000000..c584fc0e98 --- /dev/null +++ b/board/alliedtelesis/SBx81LIFXCAT/sbx81lifxcat.c @@ -0,0 +1,134 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2010, 2018 + * Allied Telesis <www.alliedtelesis.com> + */ + +#include <common.h> +#include <miiphy.h> +#include <netdev.h> +#include <led.h> +#include <linux/io.h> +#include <asm/arch/cpu.h> +#include <asm/arch/soc.h> +#include <asm/arch/mpp.h> +#include <asm/arch/gpio.h> + +#define SBX81LIFXCAT_OE_LOW (~0) +#define SBX81LIFXCAT_OE_HIGH (~BIT(11)) +#define SBX81LIFXCAT_OE_VAL_LOW (0) +#define SBX81LIFXCAT_OE_VAL_HIGH (BIT(11)) + +DECLARE_GLOBAL_DATA_PTR; + +int board_early_init_f(void) +{ + /* + * default gpio configuration + * There are maximum 64 gpios controlled through 2 sets of registers + * the below configuration configures mainly initial LED status + */ + mvebu_config_gpio(SBX81LIFXCAT_OE_VAL_LOW, + SBX81LIFXCAT_OE_VAL_HIGH, + SBX81LIFXCAT_OE_LOW, SBX81LIFXCAT_OE_HIGH); + + /* Multi-Purpose Pins Functionality configuration */ + static const u32 kwmpp_config[] = { + MPP0_SPI_SCn, + MPP1_SPI_MOSI, + MPP2_SPI_SCK, + MPP3_SPI_MISO, + MPP4_NF_IO6, + MPP5_NF_IO7, + MPP6_SYSRST_OUTn, + MPP7_GPO, + MPP8_TW_SDA, + MPP9_TW_SCK, + MPP10_UART0_TXD, + MPP11_UART0_RXD, + MPP12_GPO, + MPP13_UART1_TXD, + MPP14_UART1_RXD, + MPP15_GPIO, + MPP16_GPIO, + MPP17_GPIO, + MPP18_NF_IO0, + MPP19_NF_IO1, + MPP20_GE1_0, + MPP21_GE1_1, + MPP22_GE1_2, + MPP23_GE1_3, + MPP24_GE1_4, + MPP25_GE1_5, + MPP26_GE1_6, + MPP27_GE1_7, + MPP28_GE1_8, + MPP29_GE1_9, + MPP30_GE1_10, + MPP31_GE1_11, + MPP32_GE1_12, + MPP33_GE1_13, + MPP34_GPIO, + MPP35_GPIO, + MPP36_GPIO, + MPP37_GPIO, + MPP38_GPIO, + MPP39_GPIO, + MPP40_GPIO, + MPP41_GPIO, + MPP42_GPIO, + MPP43_GPIO, + MPP44_GPIO, + MPP45_GPIO, + MPP46_GPIO, + MPP47_GPIO, + MPP48_GPIO, + MPP49_GPIO, + 0 + }; + + kirkwood_mpp_conf(kwmpp_config, NULL); + return 0; +} + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; + + return 0; +} + +#ifdef CONFIG_RESET_PHY_R +/* automatically defined by kirkwood config.h */ +void reset_phy(void) +{ +} +#endif + +#ifdef CONFIG_MV88E61XX_SWITCH +int mv88e61xx_hw_reset(struct phy_device *phydev) +{ + phydev->advertising = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full; + + return 0; +} +#endif + +#ifdef CONFIG_MISC_INIT_R +int misc_init_r(void) +{ + struct udevice *dev; + int ret; + + ret = led_get_by_label("status:ledp", &dev); + if (!ret) + led_set_state(dev, LEDST_ON); + + ret = led_get_by_label("status:ledn", &dev); + if (!ret) + led_set_state(dev, LEDST_OFF); + + return 0; +} +#endif diff --git a/board/freescale/ls1046ardb/MAINTAINERS b/board/freescale/ls1046ardb/MAINTAINERS index 79a2290974..aac649a942 100644 --- a/board/freescale/ls1046ardb/MAINTAINERS +++ b/board/freescale/ls1046ardb/MAINTAINERS @@ -5,6 +5,7 @@ F: board/freescale/ls1046ardb/ F: board/freescale/ls1046ardb/ls1046ardb.c F: include/configs/ls1046ardb.h F: configs/ls1046ardb_qspi_defconfig +F: configs/ls1046ardb_qspi_spl_defconfig F: configs/ls1046ardb_sdcard_defconfig F: configs/ls1046ardb_emmc_defconfig diff --git a/board/freescale/ls1046ardb/ls1046ardb_qspi_pbi.cfg b/board/freescale/ls1046ardb/ls1046ardb_qspi_pbi.cfg new file mode 100644 index 0000000000..735d46c9f9 --- /dev/null +++ b/board/freescale/ls1046ardb/ls1046ardb_qspi_pbi.cfg @@ -0,0 +1,26 @@ +#QSPI clk +0957015c 40100000 +#Configure Scratch register +09570600 00000000 +09570604 10000000 +#Disable CCI barrier tranaction +09570178 0000e010 +09180000 00000008 +#USB PHY frequency sel +09570418 0000009e +0957041c 0000009e +09570420 0000009e +#Serdes SATA +09eb1300 80104e20 +09eb08dc 00502880 +#PEX gen3 link +09570158 00000300 +89400890 01048000 +89500890 01048000 +89600890 01048000 +#Alt base register +09570158 00001000 +#flush PBI data +096100c0 000fffff +#Change endianness +09550000 000f400c diff --git a/board/freescale/ls1046ardb/ls1046ardb_rcw_qspi.cfg b/board/freescale/ls1046ardb/ls1046ardb_rcw_qspi.cfg new file mode 100644 index 0000000000..7b9be0ad3f --- /dev/null +++ b/board/freescale/ls1046ardb/ls1046ardb_rcw_qspi.cfg @@ -0,0 +1,7 @@ +#PBL preamble and RCW header +aa55aa55 01ee0100 +# RCW +0c150010 0e000000 00000000 00000000 +11335559 40005012 40025000 c1000000 +00000000 00000000 00000000 00238800 +20124000 00003101 00000096 00000001 diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index 683fe44588..46b18cf00b 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2017 NXP Semiconductors * Copyright 2015 Freescale Semiconductor + * Copyright 2017 NXP */ #include <common.h> #include <malloc.h> diff --git a/board/gdsys/a38x/.gitignore b/board/gdsys/a38x/.gitignore deleted file mode 100644 index 775b9346b8..0000000000 --- a/board/gdsys/a38x/.gitignore +++ /dev/null @@ -1 +0,0 @@ -kwbimage.cfg diff --git a/board/gdsys/a38x/Kconfig b/board/gdsys/a38x/Kconfig deleted file mode 100644 index 3fdef64b59..0000000000 --- a/board/gdsys/a38x/Kconfig +++ /dev/null @@ -1,36 +0,0 @@ -if TARGET_CONTROLCENTERDC - -config SYS_BOARD - default "a38x" - -config SYS_VENDOR - default "gdsys" - -config SYS_SOC - default "mvebu" - -config SYS_CONFIG_NAME - default "controlcenterdc" - -menu "Controlcenter DC board options" - -choice - prompt "Select boot method" - -config SPL_BOOT_DEVICE_SPI - bool "SPI" - -config SPL_BOOT_DEVICE_MMC - bool "MMC" - select SPL_LIBDISK_SUPPORT - -endchoice - -#config SPL_BOOT_DEVICE -# int -# default 1 if SPL_BOOT_DEVICE_SPI -# default 2 if SPL_BOOT_DEVICE_MMC - -endmenu - -endif diff --git a/board/gdsys/a38x/Makefile b/board/gdsys/a38x/Makefile index 43fec2edbb..32fffab467 100644 --- a/board/gdsys/a38x/Makefile +++ b/board/gdsys/a38x/Makefile @@ -7,36 +7,5 @@ obj-$(CONFIG_TARGET_CONTROLCENTERDC) += controlcenterdc.o hre.o spl.o keyprogram.o dt_helpers.o ifeq ($(CONFIG_SPL_BUILD),) - obj-$(CONFIG_TARGET_CONTROLCENTERDC) += hydra.o ihs_phys.o - -extra-$(CONFIG_TARGET_CONTROLCENTERDC) += kwbimage.cfg - -KWB_REPLACE += BOOT_FROM -ifneq ($(CONFIG_SPL_BOOT_DEVICE_SPI),) - KWB_CFG_BOOT_FROM=spi -endif -ifneq ($(CONFIG_SPL_BOOT_DEVICE_MMC),) - KWB_CFG_BOOT_FROM=sdio -endif - -ifneq ($(CONFIG_SECURED_MODE_IMAGE),) -KWB_REPLACE += CSK_INDEX -KWB_CFG_CSK_INDEX = $(CONFIG_SECURED_MODE_CSK_INDEX) - -KWB_REPLACE += SEC_BOOT_DEV -KWB_CFG_SEC_BOOT_DEV=$(patsubst "%",%, \ - $(if $(findstring BOOT_SPI_NOR_FLASH,$(CONFIG_SPL_BOOT_DEVICE)),0x34) \ - $(if $(findstring BOOT_SDIO_MMC_CARD,$(CONFIG_SPL_BOOT_DEVICE)),0x31) \ - ) - -KWB_REPLACE += SEC_FUSE_DUMP -KWB_CFG_SEC_FUSE_DUMP = a38x -endif - -$(src)/kwbimage.cfg: $(src)/kwbimage.cfg.in include/autoconf.mk \ - include/config/auto.conf - $(Q)sed -ne '$(foreach V,$(KWB_REPLACE),s/^#@$(V)/$(V) $(KWB_CFG_$(V))/;)p' \ - <$< >$(dir $<)$(@F) - endif diff --git a/board/gdsys/a38x/kwbimage.cfg.in b/board/gdsys/a38x/kwbimage.cfg.in deleted file mode 100644 index 72e67d75c3..0000000000 --- a/board/gdsys/a38x/kwbimage.cfg.in +++ /dev/null @@ -1,12 +0,0 @@ -# -# Copyright (C) 2014 Stefan Roese <sr@denx.de> -# - -# Armada 38x uses version 1 image format -VERSION 1 - -# Boot Media configurations -#@BOOT_FROM - -# Binary Header (bin_hdr) with DDR3 training code -BINARY spl/u-boot-spl.bin 0000005b 00000068 diff --git a/board/kobol/helios4/kwbimage.cfg b/board/kobol/helios4/kwbimage.cfg deleted file mode 100644 index 035063bc90..0000000000 --- a/board/kobol/helios4/kwbimage.cfg +++ /dev/null @@ -1,13 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2015 Stefan Roese <sr@denx.de> -# - -# Armada 38x use version 1 image format -VERSION 1 - -# Boot Media configurations -BOOT_FROM sdio - -# Binary Header (bin_hdr) with DDR3 training code -BINARY spl/u-boot-spl-dtb.bin 0000005b 00000068 diff --git a/board/maxbcm/kwbimage.cfg b/board/maxbcm/kwbimage.cfg deleted file mode 100644 index 1f748db37c..0000000000 --- a/board/maxbcm/kwbimage.cfg +++ /dev/null @@ -1,12 +0,0 @@ -# -# Copyright (C) 2014 Stefan Roese <sr@denx.de> -# - -# Armada XP uses version 1 image format -VERSION 1 - -# Boot Media configurations -BOOT_FROM spi - -# Binary Header (bin_hdr) with DDR3 training code -BINARY spl/u-boot-spl-dtb.bin 0000005b 00000068 diff --git a/board/qualcomm/dragonboard410c/u-boot.lds b/board/qualcomm/dragonboard410c/u-boot.lds index dc3f718b05..fc1bba8cf0 100644 --- a/board/qualcomm/dragonboard410c/u-boot.lds +++ b/board/qualcomm/dragonboard410c/u-boot.lds @@ -20,6 +20,19 @@ SECTIONS *(.__image_copy_start) board/qualcomm/dragonboard410c/head.o (.text*) CPUDIR/start.o (.text*) + } + + /* This needs to come before *(.text*) */ + .efi_runtime : { + __efi_runtime_start = .; + *(.text.efi_runtime*) + *(.rodata.efi_runtime*) + *(.data.efi_runtime*) + __efi_runtime_stop = .; + } + + .text_rest : + { *(.text*) } @@ -51,8 +64,8 @@ SECTIONS .efi_runtime_rel : { __efi_runtime_rel_start = .; - *(.relaefi_runtime_text) - *(.relaefi_runtime_data) + *(.rel*.efi_runtime) + *(.rel*.efi_runtime.*) __efi_runtime_rel_stop = .; } diff --git a/board/qualcomm/dragonboard820c/u-boot.lds b/board/qualcomm/dragonboard820c/u-boot.lds index bcf5738d38..dcf8256cec 100644 --- a/board/qualcomm/dragonboard820c/u-boot.lds +++ b/board/qualcomm/dragonboard820c/u-boot.lds @@ -20,6 +20,19 @@ SECTIONS *(.__image_copy_start) board/qualcomm/dragonboard820c/head.o (.text*) CPUDIR/start.o (.text*) + } + + /* This needs to come before *(.text*) */ + .efi_runtime : { + __efi_runtime_start = .; + *(.text.efi_runtime*) + *(.rodata.efi_runtime*) + *(.data.efi_runtime*) + __efi_runtime_stop = .; + } + + .text_rest : + { *(.text*) } @@ -42,17 +55,10 @@ SECTIONS . = ALIGN(8); - .efi_runtime : { - __efi_runtime_start = .; - *(efi_runtime_text) - *(efi_runtime_data) - __efi_runtime_stop = .; - } - .efi_runtime_rel : { __efi_runtime_rel_start = .; - *(.relaefi_runtime_text) - *(.relaefi_runtime_data) + *(.rel*.efi_runtime) + *(.rel*.efi_runtime.*) __efi_runtime_rel_stop = .; } diff --git a/board/solidrun/clearfog/kwbimage.cfg b/board/solidrun/clearfog/kwbimage.cfg deleted file mode 100644 index f41d25a8a1..0000000000 --- a/board/solidrun/clearfog/kwbimage.cfg +++ /dev/null @@ -1,12 +0,0 @@ -# -# Copyright (C) 2015 Stefan Roese <sr@denx.de> -# - -# Armada 38x use version 1 image format -VERSION 1 - -# Boot Media configurations -BOOT_FROM sdio - -# Binary Header (bin_hdr) with DDR3 training code -BINARY spl/u-boot-spl-dtb.bin 0000005b 00000068 diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index db51f48ab6..2f95976445 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -330,6 +330,11 @@ S: Maintained F: configs/A20-Olimex-SOM204-EVB_defconfig F: configs/A20-Olimex-SOM204-EVB-eMMC_defconfig +ORANGEPI ONE PLUS BOARD +M: Jagan Teki <jagan@amarulasolutions.com> +S: Maintained +F: configs/orangepi_one_plus_defconfig + ORANGEPI WIN/WIN PLUS BOARD M: Jagan Teki <jagan@amarulasolutions.com> S: Maintained @@ -370,6 +375,11 @@ M: Andre Przywara <andre.przywara@arm.com> S: Maintained F: configs/pine64_plus_defconfig +PINE H64 BOARD +M: Icenowy Zheng <icenowy@aosc.io> +S: Maintained +F: configs/pine_h64_defconfig + R16 EVB PARROT BOARD M: Quentin Schulz <quentin.schulz@free-electrons.com> S: Maintained diff --git a/board/sunxi/board.c b/board/sunxi/board.c index 5ed1b8bae1..857d5ff010 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -443,6 +443,13 @@ static void mmc_pinmux_setup(int sdc) sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); sunxi_gpio_set_drv(pin, 2); } +#elif defined(CONFIG_MACH_SUN50I_H6) + /* SDC2: PC4-PC14 */ + for (pin = SUNXI_GPC(4); pin <= SUNXI_GPC(14); pin++) { + sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2); + sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); + sunxi_gpio_set_drv(pin, 2); + } #elif defined(CONFIG_MACH_SUN9I) /* SDC2: PC6-PC16 */ for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(16); pin++) { diff --git a/board/sunxi/mksunxi_fit_atf.sh b/board/sunxi/mksunxi_fit_atf.sh index 36abe9efed..88ad719747 100755 --- a/board/sunxi/mksunxi_fit_atf.sh +++ b/board/sunxi/mksunxi_fit_atf.sh @@ -13,6 +13,12 @@ if [ ! -f $BL31 ]; then BL31=/dev/null fi +if grep -q "^CONFIG_MACH_SUN50I_H6=y" .config; then + BL31_ADDR=0x104000 +else + BL31_ADDR=0x44000 +fi + cat << __HEADER_EOF /dts-v1/; @@ -35,8 +41,8 @@ cat << __HEADER_EOF type = "firmware"; arch = "arm64"; compression = "none"; - load = <0x44000>; - entry = <0x44000>; + load = <$BL31_ADDR>; + entry = <$BL31_ADDR>; }; __HEADER_EOF diff --git a/board/synopsys/axs10x/config.mk b/board/synopsys/axs10x/config.mk new file mode 100644 index 0000000000..81ff498f81 --- /dev/null +++ b/board/synopsys/axs10x/config.mk @@ -0,0 +1,23 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2018 Synopsys, Inc. All rights reserved. + +bsp-generate: u-boot u-boot.bin +ifdef CONFIG_ISA_ARCV2 + $(Q)python3 $(srctree)/board/$(BOARDDIR)/headerize-axs.py \ + --header-type v2 \ + --arc-id 0x53 \ + --spi-flash-offset 0x200000 \ + --image $(srctree)/u-boot.bin \ + --elf $(srctree)/u-boot +else + $(Q)python3 $(srctree)/board/$(BOARDDIR)/headerize-axs.py \ + --header-type v1 \ + --arc-id 0x434 \ + --spi-flash-offset 0x0 \ + --image $(srctree)/u-boot.bin \ + --elf $(srctree)/u-boot +endif + $(Q)tools/mkimage -T script -C none -n 'uboot update script' \ + -d $(srctree)/u-boot-update.txt \ + $(srctree)/u-boot-update.img &> /dev/null diff --git a/board/synopsys/axs10x/headerize-axs.py b/board/synopsys/axs10x/headerize-axs.py new file mode 100644 index 0000000000..fa6aaf350c --- /dev/null +++ b/board/synopsys/axs10x/headerize-axs.py @@ -0,0 +1,176 @@ +#!/usr/bin/env python3 + +#we can use binascii instead of zlib +import os, getopt, sys, zlib +from elftools.elf.elffile import ELFFile + + +def usage(exit_code): + print("typical usage:") + print("AXS101:") + print(sys.argv[0] + \ + " --header-type v1 --arc-id 0x434 --spi-flash-offset 0x0 --image u-boot.bin --elf u-boot") + print("AXS103:") + print(sys.argv[0] + \ + " --header-type v2 --arc-id 0x53 --spi-flash-offset 0x200000 --image u-boot.bin --elf u-boot") + sys.exit(exit_code) + + +def elf_get_entry(filename): + with open(filename, 'rb') as f: + elffile = ELFFile(f) + return elffile.header['e_entry'] + + +def calc_check_sum(filename): + # Calculate u-boot image check_sum: it is sum of all u-boot binary bytes + with open(filename, "rb") as file: + ba = bytearray(file.read()) + return sum(ba) & 0xFF + + +def arg_verify(uboot_bin_filename, uboot_elf_filename, header_type): + if not os.path.isfile(uboot_bin_filename): + print("uboot bin file not exists: " + uboot_bin_filename) + sys.exit(2) + + if not os.path.isfile(uboot_elf_filename): + print("uboot elf file not exists: " + uboot_elf_filename) + sys.exit(2) + + if header_type not in ("v1", "v2"): + print("unknown header type: " + header_type) + print("choose between 'v1' (most likely AXS101) and 'v2' (most likely AXS103)") + sys.exit(2) + + +def main(): + try: + opts, args = getopt.getopt(sys.argv[1:], + "ht:a:s:i:l:e:", + ["help", "header-type=", "arc-id=", "spi-flash-offset=", "image=", "elf="]) + except getopt.GetoptError as err: + print(err) + usage(2) + + # default filenames + uboot_elf_filename = "u-boot" + uboot_bin_filename = "u-boot.bin" + headerised_filename = "u-boot.head" + uboot_scrypt_file = "u-boot-update.txt" + + # default values + spi_flash_offset = 0x200000 + header_type = "v2" + arc_id = 0x53 + + # initial header values: place where preloader will store u-boot binary, + # should be equal to CONFIG_SYS_TEXT_BASE + image_copy_adr = 0x81000000 + + # initial constant header values, do not change these values + magic1 = 0xdeadbeafaf # big endian byte order + magic2 = [ # big endian byte order + 0x20202a2020202020202020202a20202020207c5c2e20202020202e2f7c20202020207c2d, + 0x2e5c2020202f2e2d7c20202020205c2020602d2d2d6020202f20202020202f205f202020, + 0x205f20205c20202020207c205f60712070205f207c2020202020272e5f3d2f205c3d5f2e, + 0x272020202020202020605c202f60202020202020202020202020206f2020202020202020] + + for opt, arg in opts: + if opt in ('-h', "--help"): usage(0) + if opt in ('-t', "--header-type"): header_type = arg + if opt in ('-a', "--arc-id"): arc_id = int(arg, 16) + if opt in ('-s', "--spi-flash-offset"): spi_flash_offset = int(arg, 16) + if opt in ('-i', "--image"): uboot_bin_filename = arg + if opt in ('-e', "--elf"): uboot_elf_filename = arg + + arg_verify(uboot_bin_filename, uboot_elf_filename, header_type) + + uboot_img_size = os.path.getsize(uboot_bin_filename) + jump_address = elf_get_entry(uboot_elf_filename) + check_sum = calc_check_sum(uboot_bin_filename) + + # Calculate header adresses depend on header type + if header_type == "v2": + image_copy_adr -= 0x4 + uboot_img_size += 0x4 + # we append image so we need to append checksum + jmpchk_sum = sum(jump_address.to_bytes(4, byteorder='big')) + check_sum = (check_sum + jmpchk_sum) & 0xFF + imade_jump_append = True + else: + imade_jump_append = False + + # write header to file + with open(headerised_filename, "wb") as file: + file.write(arc_id.to_bytes(2, byteorder='little')) + file.write(uboot_img_size.to_bytes(4, byteorder='little')) + file.write(check_sum.to_bytes(1, byteorder='little')) + file.write(image_copy_adr.to_bytes(4, byteorder='little')) + file.write(magic1.to_bytes(5, byteorder='big')) + for i in range(16): file.write(0x00.to_bytes(1, byteorder='little')) + for byte in magic2: file.write(byte.to_bytes(36, byteorder='big')) + for i in range(224 - len(magic2) * 36): + file.write(0x00.to_bytes(1, byteorder='little')) + if imade_jump_append: + file.write(jump_address.to_bytes(4, byteorder='little')) + + # append u-boot image to header + with open(headerised_filename, "ab") as fo: + with open(uboot_bin_filename,'rb') as fi: + fo.write(fi.read()) + + # calc u-boot headerised image CRC32 (will be used by uboot update + # command for check) + headerised_image_crc = "" + with open(headerised_filename, "rb") as fi: + headerised_image_crc = hex(zlib.crc32(fi.read()) & 0xffffffff) + + load_addr = 0x81000000 + crc_store_adr = load_addr - 0x8 + crc_calc_adr = crc_store_adr - 0x4 + load_size = os.path.getsize(headerised_filename) + crc_calc_cmd = \ + "crc32 " + hex(load_addr) + " " + hex(load_size) + " " + hex(crc_calc_adr) + crc_check_cmd = \ + "mw.l " + hex(crc_store_adr) + " " + headerised_image_crc + " && " + \ + crc_calc_cmd + " && " + \ + "cmp.l " + hex(crc_store_adr) + " " + hex(crc_calc_adr) + " 1" + + # make errase size to be allighned by 64K + if load_size & 0xFFFF == 0: + errase_size = load_size + else: + errase_size = load_size - (load_size & 0xFFFF) + 0x10000 + + # Hack to handle n25*** flash protect ops weirdness: + # protect unlock return fail status is region is already unlock (entire or + # partially). Same for lock ops. + # As there is no possibility to check current flash status pretend + # unlock & lock always success. + sf_unlock_cmd = \ + "if sf protect unlock 0x0 0x4000000 ; then true ; else true ; fi" + sf_lock_cmd = \ + "if sf protect lock 0x0 0x4000000 ; then true ; else true ; fi" + + # u-bood CMD to load u-bood with header to SPI flash + sf_load_image_cmd = \ + "fatload mmc 0:1 " + hex(load_addr) + " " + headerised_filename + " && " + \ + "sf probe 0:0 && " + \ + sf_unlock_cmd + " && " + \ + "sf erase " + hex(spi_flash_offset) + " " + hex(errase_size) + " && " + \ + "sf write " + hex(load_addr) + " " + hex(spi_flash_offset) + " " + hex(load_size) + " && " + \ + sf_lock_cmd + + update_uboot_cmd = sf_load_image_cmd + " && echo \"u-boot update: OK\"" + + with open(uboot_scrypt_file, "wb") as fo: + fo.write(update_uboot_cmd.encode('ascii')) + + +if __name__ == "__main__": + try: + main() + except Exception as err: + print(err) + sys.exit(2) diff --git a/board/synopsys/hsdk/README b/board/synopsys/hsdk/README index e3793e4829..e29a6a1727 100644 --- a/board/synopsys/hsdk/README +++ b/board/synopsys/hsdk/README @@ -82,6 +82,12 @@ Useful notes on bulding and using of U-Boot on ARC HS Development Kit (AKA HSDK) be put on the first FAT partition of micro SD-card to be inserted in the HSDK board. + Note that Python3 script is used for generation of a header, thus + to get that done it's required to have Python3 with elftools installed. + On CentOS/RHEL/Fedora this could be installed with: + ------------------------->8---------------------- + sudo dnf install python3-pyelftools + ------------------------->8---------------------- EXECUTING U-BOOT @@ -104,8 +110,8 @@ Useful notes on bulding and using of U-Boot on ARC HS Development Kit (AKA HSDK) 1. Create `u-boot.head` and `u-boot-update.scr` as discribed above with `make bsp-generate` command. - 2. Copy `u-boot.head` and `u-boot-update.scr` to the first the first FAT - partition of micro SD-card. + 2. Copy `u-boot.head` and `u-boot-update.scr` to the first FAT partition + of micro SD-card. 3. Connect USB cable from the HSDK board to the developemnt host and fire-up serial terminal. diff --git a/board/synopsys/hsdk/config.mk b/board/synopsys/hsdk/config.mk index 16fb59c438..9e280f921a 100644 --- a/board/synopsys/hsdk/config.mk +++ b/board/synopsys/hsdk/config.mk @@ -6,6 +6,6 @@ bsp-generate: u-boot u-boot.bin $(Q)python3 $(srctree)/board/$(BOARDDIR)/headerize-hsdk.py \ --arc-id 0x52 --image $(srctree)/u-boot.bin \ --elf $(srctree)/u-boot - $(Q)mkimage -T script -C none -n 'uboot update script' \ + $(Q)tools/mkimage -T script -C none -n 'uboot update script' \ -d $(srctree)/u-boot-update.txt \ $(srctree)/u-boot-update.scr &> /dev/null diff --git a/board/technexion/pico-imx7d/MAINTAINERS b/board/technexion/pico-imx7d/MAINTAINERS index 3ab1aa6381..0755bd8366 100644 --- a/board/technexion/pico-imx7d/MAINTAINERS +++ b/board/technexion/pico-imx7d/MAINTAINERS @@ -4,3 +4,8 @@ S: Maintained F: board/technexion/pico-imx7d/ F: include/configs/pico-imx7d.h F: configs/pico-imx7d_defconfig + +Technexion PICO-PI-IMX7 +M: Otavio Salvador <otavio@ossystems.com.br> +S: Maintained +F: configs/pico-pi-imx7d_defconfig diff --git a/board/theadorable/kwbimage.cfg b/board/theadorable/kwbimage.cfg deleted file mode 100644 index 4f3b7b23f3..0000000000 --- a/board/theadorable/kwbimage.cfg +++ /dev/null @@ -1,12 +0,0 @@ -# -# Copyright (C) 2015-2016 Stefan Roese <sr@denx.de> -# - -# Armada XP uses version 1 image format -VERSION 1 - -# Boot Media configurations -BOOT_FROM spi - -# Binary Header (bin_hdr) with DDR3 training code -BINARY spl/u-boot-spl-dtb.bin 0000005b 00000068 diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c index 147ff0b2f0..a359d20021 100644 --- a/board/ti/am335x/board.c +++ b/board/ti/am335x/board.c @@ -725,6 +725,8 @@ int board_late_init(void) if (board_is_bbg1()) name = "BBG1"; + if (board_is_bben()) + name = "BBEN"; set_board_info_env(name); /* @@ -870,7 +872,7 @@ int board_eth_init(bd_t *bis) (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD)) #ifdef CONFIG_DRIVER_TI_CPSW - if (board_is_bone() || board_is_bone_lt() || + if (board_is_bone() || board_is_bone_lt() || board_is_bben() || board_is_idk()) { writel(MII_MODE_ENABLE, &cdev->miisel); cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if = @@ -906,7 +908,7 @@ int board_eth_init(bd_t *bis) #define AR8051_DEBUG_RGMII_CLK_DLY_REG 0x5 #define AR8051_RGMII_TX_CLK_DLY 0x100 - if (board_is_evm_sk() || board_is_gp_evm()) { + if (board_is_evm_sk() || board_is_gp_evm() || board_is_bben()) { const char *devname; devname = miiphy_get_current_dev(); diff --git a/board/ti/am335x/board.h b/board/ti/am335x/board.h index 652b10b5e4..48df914af9 100644 --- a/board/ti/am335x/board.h +++ b/board/ti/am335x/board.h @@ -43,9 +43,15 @@ static inline int board_is_bbg1(void) return board_is_bone_lt() && !strncmp(board_ti_get_rev(), "BBG1", 4); } +static inline int board_is_bben(void) +{ + return board_is_bone_lt() && !strncmp(board_ti_get_rev(), "SE", 2); +} + static inline int board_is_beaglebonex(void) { - return board_is_pb() || board_is_bone() || board_is_bone_lt() || board_is_bbg1(); + return board_is_pb() || board_is_bone() || board_is_bone_lt() || + board_is_bbg1() || board_is_bben(); } static inline int board_is_evm_sk(void) diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c index aa187605d0..41333f93f4 100644 --- a/board/ti/am335x/mux.c +++ b/board/ti/am335x/mux.c @@ -380,6 +380,13 @@ void enable_board_pin_mux(void) configure_module_pin_mux(rgmii1_pin_mux); configure_module_pin_mux(mmc0_pin_mux_sk_evm); } else if (board_is_bone_lt()) { + if (board_is_bben()) { + /* SanCloud Beaglebone LT Enhanced pinmux */ + configure_module_pin_mux(rgmii1_pin_mux); + } else { + /* Beaglebone LT pinmux */ + configure_module_pin_mux(mii1_pin_mux); + } /* Beaglebone LT pinmux */ configure_module_pin_mux(mii1_pin_mux); configure_module_pin_mux(mmc0_pin_mux); diff --git a/board/ti/am335x/u-boot.lds b/board/ti/am335x/u-boot.lds index a56cc8216b..03c1d5f73b 100644 --- a/board/ti/am335x/u-boot.lds +++ b/board/ti/am335x/u-boot.lds @@ -37,6 +37,25 @@ SECTIONS *(.vectors) CPUDIR/start.o (.text*) board/ti/am335x/built-in.o (.text*) + } + + /* This needs to come before *(.text*) */ + .__efi_runtime_start : { + *(.__efi_runtime_start) + } + + .efi_runtime : { + *(.text.efi_runtime*) + *(.rodata.efi_runtime*) + *(.data.efi_runtime*) + } + + .__efi_runtime_stop : { + *(.__efi_runtime_stop) + } + + .text_rest : + { *(.text*) } @@ -59,27 +78,14 @@ SECTIONS . = ALIGN(4); - .__efi_runtime_start : { - *(.__efi_runtime_start) - } - - .efi_runtime : { - *(efi_runtime_text) - *(efi_runtime_data) - } - - .__efi_runtime_stop : { - *(.__efi_runtime_stop) - } - .efi_runtime_rel_start : { *(.__efi_runtime_rel_start) } .efi_runtime_rel : { - *(.relefi_runtime_text) - *(.relefi_runtime_data) + *(.rel*.efi_runtime) + *(.rel*.efi_runtime.*) } .efi_runtime_rel_stop : diff --git a/board/xilinx/microblaze-generic/Kconfig b/board/xilinx/microblaze-generic/Kconfig index 6e93a3d948..f2fa0f72b1 100644 --- a/board/xilinx/microblaze-generic/Kconfig +++ b/board/xilinx/microblaze-generic/Kconfig @@ -36,6 +36,6 @@ config XILINX_MICROBLAZE0_USE_HW_MUL config XILINX_MICROBLAZE0_HW_VER string "Core version number" - default 7.10.d + default "7.10.d" endif diff --git a/board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c b/board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c new file mode 100644 index 0000000000..f1b9357780 --- /dev/null +++ b/board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c @@ -0,0 +1,297 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (c) Copyright 2010-2014 Xilinx, Inc. All rights reserved. + * + * Procedure to generate this file (using Vivado Webpack 2018.2): + * + Install board files from digilent/vivado-boards repository + * (commit 6a45981 from 2018-06-05) + * + Start Vivado and create a new RTL project with the Zybo-z7-20 board + * + Create a block design + * - Add "ZYNQ7 Processing System" IP + * - Run "Block Automation" (Check "Apply Board Preset") + * - Connect ports FCLK_CLK0 and M_AXI_GP0_ACLK + * - Save diagram changes + * - Go to sources view, select the block diagram, + * and select "Generate Output Products" + * + Copy the generated "ps7_init_gpl.c" file + * + Perform manual editions based on existing Zynq boards + * and the checkpatch.pl script + * + */ + +#include <asm/arch/ps7_init_gpl.h> + +static unsigned long ps7_pll_init_data_3_0[] = { + EMIT_WRITE(0xF8000008, 0x0000DF0DU), + EMIT_MASKWRITE(0xF8000110, 0x003FFFF0U, 0x000FA220U), + EMIT_MASKWRITE(0xF8000100, 0x0007F000U, 0x00028000U), + EMIT_MASKWRITE(0xF8000100, 0x00000010U, 0x00000010U), + EMIT_MASKWRITE(0xF8000100, 0x00000001U, 0x00000001U), + EMIT_MASKWRITE(0xF8000100, 0x00000001U, 0x00000000U), + EMIT_MASKPOLL(0xF800010C, 0x00000001U), + EMIT_MASKWRITE(0xF8000100, 0x00000010U, 0x00000000U), + EMIT_MASKWRITE(0xF8000120, 0x1F003F30U, 0x1F000200U), + EMIT_MASKWRITE(0xF8000114, 0x003FFFF0U, 0x0012C220U), + EMIT_MASKWRITE(0xF8000104, 0x0007F000U, 0x00020000U), + EMIT_MASKWRITE(0xF8000104, 0x00000010U, 0x00000010U), + EMIT_MASKWRITE(0xF8000104, 0x00000001U, 0x00000001U), + EMIT_MASKWRITE(0xF8000104, 0x00000001U, 0x00000000U), + EMIT_MASKPOLL(0xF800010C, 0x00000002U), + EMIT_MASKWRITE(0xF8000104, 0x00000010U, 0x00000000U), + EMIT_MASKWRITE(0xF8000124, 0xFFF00003U, 0x0C200003U), + EMIT_MASKWRITE(0xF8000118, 0x003FFFF0U, 0x001452C0U), + EMIT_MASKWRITE(0xF8000108, 0x0007F000U, 0x0001E000U), + EMIT_MASKWRITE(0xF8000108, 0x00000010U, 0x00000010U), + EMIT_MASKWRITE(0xF8000108, 0x00000001U, 0x00000001U), + EMIT_MASKWRITE(0xF8000108, 0x00000001U, 0x00000000U), + EMIT_MASKPOLL(0xF800010C, 0x00000004U), + EMIT_MASKWRITE(0xF8000108, 0x00000010U, 0x00000000U), + EMIT_WRITE(0xF8000004, 0x0000767BU), + EMIT_EXIT(), +}; + +static unsigned long ps7_clock_init_data_3_0[] = { + EMIT_WRITE(0xF8000008, 0x0000DF0DU), + EMIT_MASKWRITE(0xF8000128, 0x03F03F01U, 0x00700F01U), + EMIT_MASKWRITE(0xF8000138, 0x00000011U, 0x00000001U), + EMIT_MASKWRITE(0xF8000140, 0x03F03F71U, 0x00100801U), + EMIT_MASKWRITE(0xF800014C, 0x00003F31U, 0x00000501U), + EMIT_MASKWRITE(0xF8000150, 0x00003F33U, 0x00001401U), + EMIT_MASKWRITE(0xF8000154, 0x00003F33U, 0x00000A02U), + EMIT_MASKWRITE(0xF8000168, 0x00003F31U, 0x00000501U), + EMIT_MASKWRITE(0xF8000170, 0x03F03F30U, 0x00400500U), + EMIT_MASKWRITE(0xF80001C4, 0x00000001U, 0x00000001U), + EMIT_MASKWRITE(0xF800012C, 0x01FFCCCDU, 0x01EC044DU), + EMIT_WRITE(0xF8000004, 0x0000767BU), + EMIT_EXIT(), +}; + +static unsigned long ps7_ddr_init_data_3_0[] = { + EMIT_MASKWRITE(0xF8006000, 0x0001FFFFU, 0x00000080U), + EMIT_MASKWRITE(0xF8006004, 0x0007FFFFU, 0x00001081U), + EMIT_MASKWRITE(0xF8006008, 0x03FFFFFFU, 0x03C0780FU), + EMIT_MASKWRITE(0xF800600C, 0x03FFFFFFU, 0x02001001U), + EMIT_MASKWRITE(0xF8006010, 0x03FFFFFFU, 0x00014001U), + EMIT_MASKWRITE(0xF8006014, 0x001FFFFFU, 0x0004281AU), + EMIT_MASKWRITE(0xF8006018, 0xF7FFFFFFU, 0x44E458D2U), + EMIT_MASKWRITE(0xF800601C, 0xFFFFFFFFU, 0x720238E5U), + EMIT_MASKWRITE(0xF8006020, 0x7FDFFFFCU, 0x270872D0U), + EMIT_MASKWRITE(0xF8006024, 0x0FFFFFC3U, 0x00000000U), + EMIT_MASKWRITE(0xF8006028, 0x00003FFFU, 0x00002007U), + EMIT_MASKWRITE(0xF800602C, 0xFFFFFFFFU, 0x00000008U), + EMIT_MASKWRITE(0xF8006030, 0xFFFFFFFFU, 0x00040930U), + EMIT_MASKWRITE(0xF8006034, 0x13FF3FFFU, 0x000116D4U), + EMIT_MASKWRITE(0xF8006038, 0x00000003U, 0x00000000U), + EMIT_MASKWRITE(0xF800603C, 0x000FFFFFU, 0x00000777U), + EMIT_MASKWRITE(0xF8006040, 0xFFFFFFFFU, 0xFFF00000U), + EMIT_MASKWRITE(0xF8006044, 0x0FFFFFFFU, 0x0F666666U), + EMIT_MASKWRITE(0xF8006048, 0x0003F03FU, 0x0003C008U), + EMIT_MASKWRITE(0xF8006050, 0xFF0F8FFFU, 0x77010800U), + EMIT_MASKWRITE(0xF8006058, 0x00010000U, 0x00000000U), + EMIT_MASKWRITE(0xF800605C, 0x0000FFFFU, 0x00005003U), + EMIT_MASKWRITE(0xF8006060, 0x000017FFU, 0x0000003EU), + EMIT_MASKWRITE(0xF8006064, 0x00021FE0U, 0x00020000U), + EMIT_MASKWRITE(0xF8006068, 0x03FFFFFFU, 0x00284141U), + EMIT_MASKWRITE(0xF800606C, 0x0000FFFFU, 0x00001610U), + EMIT_MASKWRITE(0xF8006078, 0x03FFFFFFU, 0x00466111U), + EMIT_MASKWRITE(0xF800607C, 0x000FFFFFU, 0x00032222U), + EMIT_MASKWRITE(0xF80060A4, 0xFFFFFFFFU, 0x10200802U), + EMIT_MASKWRITE(0xF80060A8, 0x0FFFFFFFU, 0x0690CB73U), + EMIT_MASKWRITE(0xF80060AC, 0x000001FFU, 0x000001FEU), + EMIT_MASKWRITE(0xF80060B0, 0x1FFFFFFFU, 0x1CFFFFFFU), + EMIT_MASKWRITE(0xF80060B4, 0x00000200U, 0x00000200U), + EMIT_MASKWRITE(0xF80060B8, 0x01FFFFFFU, 0x00200066U), + EMIT_MASKWRITE(0xF80060C4, 0x00000003U, 0x00000000U), + EMIT_MASKWRITE(0xF80060C8, 0x000000FFU, 0x00000000U), + EMIT_MASKWRITE(0xF80060DC, 0x00000001U, 0x00000000U), + EMIT_MASKWRITE(0xF80060F0, 0x0000FFFFU, 0x00000000U), + EMIT_MASKWRITE(0xF80060F4, 0x0000000FU, 0x00000008U), + EMIT_MASKWRITE(0xF8006114, 0x000000FFU, 0x00000000U), + EMIT_MASKWRITE(0xF8006118, 0x7FFFFFCFU, 0x40000001U), + EMIT_MASKWRITE(0xF800611C, 0x7FFFFFCFU, 0x40000001U), + EMIT_MASKWRITE(0xF8006120, 0x7FFFFFCFU, 0x40000001U), + EMIT_MASKWRITE(0xF8006124, 0x7FFFFFCFU, 0x40000001U), + EMIT_MASKWRITE(0xF800612C, 0x000FFFFFU, 0x00027000U), + EMIT_MASKWRITE(0xF8006130, 0x000FFFFFU, 0x00027000U), + EMIT_MASKWRITE(0xF8006134, 0x000FFFFFU, 0x00026C00U), + EMIT_MASKWRITE(0xF8006138, 0x000FFFFFU, 0x00028800U), + EMIT_MASKWRITE(0xF8006140, 0x000FFFFFU, 0x00000035U), + EMIT_MASKWRITE(0xF8006144, 0x000FFFFFU, 0x00000035U), + EMIT_MASKWRITE(0xF8006148, 0x000FFFFFU, 0x00000035U), + EMIT_MASKWRITE(0xF800614C, 0x000FFFFFU, 0x00000035U), + EMIT_MASKWRITE(0xF8006154, 0x000FFFFFU, 0x0000007AU), + EMIT_MASKWRITE(0xF8006158, 0x000FFFFFU, 0x0000007AU), + EMIT_MASKWRITE(0xF800615C, 0x000FFFFFU, 0x0000007CU), + EMIT_MASKWRITE(0xF8006160, 0x000FFFFFU, 0x00000073U), + EMIT_MASKWRITE(0xF8006168, 0x001FFFFFU, 0x000000F1U), + EMIT_MASKWRITE(0xF800616C, 0x001FFFFFU, 0x000000F1U), + EMIT_MASKWRITE(0xF8006170, 0x001FFFFFU, 0x000000F0U), + EMIT_MASKWRITE(0xF8006174, 0x001FFFFFU, 0x000000F7U), + EMIT_MASKWRITE(0xF800617C, 0x000FFFFFU, 0x000000BAU), + EMIT_MASKWRITE(0xF8006180, 0x000FFFFFU, 0x000000BAU), + EMIT_MASKWRITE(0xF8006184, 0x000FFFFFU, 0x000000BCU), + EMIT_MASKWRITE(0xF8006188, 0x000FFFFFU, 0x000000B3U), + EMIT_MASKWRITE(0xF8006190, 0x6FFFFEFEU, 0x00040080U), + EMIT_MASKWRITE(0xF8006194, 0x000FFFFFU, 0x0001FC82U), + EMIT_MASKWRITE(0xF8006204, 0xFFFFFFFFU, 0x00000000U), + EMIT_MASKWRITE(0xF8006208, 0x000703FFU, 0x000003FFU), + EMIT_MASKWRITE(0xF800620C, 0x000703FFU, 0x000003FFU), + EMIT_MASKWRITE(0xF8006210, 0x000703FFU, 0x000003FFU), + EMIT_MASKWRITE(0xF8006214, 0x000703FFU, 0x000003FFU), + EMIT_MASKWRITE(0xF8006218, 0x000F03FFU, 0x000003FFU), + EMIT_MASKWRITE(0xF800621C, 0x000F03FFU, 0x000003FFU), + EMIT_MASKWRITE(0xF8006220, 0x000F03FFU, 0x000003FFU), + EMIT_MASKWRITE(0xF8006224, 0x000F03FFU, 0x000003FFU), + EMIT_MASKWRITE(0xF80062A8, 0x00000FF5U, 0x00000000U), + EMIT_MASKWRITE(0xF80062AC, 0xFFFFFFFFU, 0x00000000U), + EMIT_MASKWRITE(0xF80062B0, 0x003FFFFFU, 0x00005125U), + EMIT_MASKWRITE(0xF80062B4, 0x0003FFFFU, 0x000012A8U), + EMIT_MASKPOLL(0xF8000B74, 0x00002000U), + EMIT_MASKWRITE(0xF8006000, 0x0001FFFFU, 0x00000081U), + EMIT_MASKPOLL(0xF8006054, 0x00000007U), + EMIT_EXIT(), +}; + +static unsigned long ps7_mio_init_data_3_0[] = { + EMIT_WRITE(0xF8000008, 0x0000DF0DU), + EMIT_MASKWRITE(0xF8000B40, 0x00000FFFU, 0x00000600U), + EMIT_MASKWRITE(0xF8000B44, 0x00000FFFU, 0x00000600U), + EMIT_MASKWRITE(0xF8000B48, 0x00000FFFU, 0x00000672U), + EMIT_MASKWRITE(0xF8000B4C, 0x00000FFFU, 0x00000672U), + EMIT_MASKWRITE(0xF8000B50, 0x00000FFFU, 0x00000674U), + EMIT_MASKWRITE(0xF8000B54, 0x00000FFFU, 0x00000674U), + EMIT_MASKWRITE(0xF8000B58, 0x00000FFFU, 0x00000600U), + EMIT_MASKWRITE(0xF8000B5C, 0xFFFFFFFFU, 0x0018C068U), + EMIT_MASKWRITE(0xF8000B60, 0xFFFFFFFFU, 0x00F98068U), + EMIT_MASKWRITE(0xF8000B64, 0xFFFFFFFFU, 0x00F98068U), + EMIT_MASKWRITE(0xF8000B68, 0xFFFFFFFFU, 0x00F98068U), + EMIT_MASKWRITE(0xF8000B6C, 0x00007FFFU, 0x00000260U), + EMIT_MASKWRITE(0xF8000B70, 0x00000001U, 0x00000001U), + EMIT_MASKWRITE(0xF8000B70, 0x00000021U, 0x00000020U), + EMIT_MASKWRITE(0xF8000B70, 0x07FEFFFFU, 0x00000823U), + EMIT_MASKWRITE(0xF8000700, 0x00003FFFU, 0x00001600U), + EMIT_MASKWRITE(0xF8000704, 0x00003FFFU, 0x00001602U), + EMIT_MASKWRITE(0xF8000708, 0x00003FFFU, 0x00000602U), + EMIT_MASKWRITE(0xF800070C, 0x00003FFFU, 0x00000602U), + EMIT_MASKWRITE(0xF8000710, 0x00003FFFU, 0x00000602U), + EMIT_MASKWRITE(0xF8000714, 0x00003FFFU, 0x00000602U), + EMIT_MASKWRITE(0xF8000718, 0x00003FFFU, 0x00000602U), + EMIT_MASKWRITE(0xF800071C, 0x00003FFFU, 0x00000600U), + EMIT_MASKWRITE(0xF8000720, 0x00003FFFU, 0x00000602U), + EMIT_MASKWRITE(0xF8000724, 0x00003FFFU, 0x00001600U), + EMIT_MASKWRITE(0xF8000728, 0x00003FFFU, 0x00001600U), + EMIT_MASKWRITE(0xF800072C, 0x00003FFFU, 0x00001600U), + EMIT_MASKWRITE(0xF8000730, 0x00003FFFU, 0x00001600U), + EMIT_MASKWRITE(0xF8000734, 0x00003FFFU, 0x00001600U), + EMIT_MASKWRITE(0xF8000738, 0x00003FFFU, 0x00001600U), + EMIT_MASKWRITE(0xF800073C, 0x00003FFFU, 0x00001600U), + EMIT_MASKWRITE(0xF8000740, 0x00003FFFU, 0x00001302U), + EMIT_MASKWRITE(0xF8000744, 0x00003FFFU, 0x00001302U), + EMIT_MASKWRITE(0xF8000748, 0x00003FFFU, 0x00001302U), + EMIT_MASKWRITE(0xF800074C, 0x00003FFFU, 0x00001302U), + EMIT_MASKWRITE(0xF8000750, 0x00003FFFU, 0x00001302U), + EMIT_MASKWRITE(0xF8000754, 0x00003FFFU, 0x00001302U), + EMIT_MASKWRITE(0xF8000758, 0x00003FFFU, 0x00001303U), + EMIT_MASKWRITE(0xF800075C, 0x00003FFFU, 0x00001303U), + EMIT_MASKWRITE(0xF8000760, 0x00003FFFU, 0x00001303U), + EMIT_MASKWRITE(0xF8000764, 0x00003FFFU, 0x00001303U), + EMIT_MASKWRITE(0xF8000768, 0x00003FFFU, 0x00001303U), + EMIT_MASKWRITE(0xF800076C, 0x00003FFFU, 0x00001303U), + EMIT_MASKWRITE(0xF8000770, 0x00003FFFU, 0x00001304U), + EMIT_MASKWRITE(0xF8000774, 0x00003FFFU, 0x00001305U), + EMIT_MASKWRITE(0xF8000778, 0x00003FFFU, 0x00001304U), + EMIT_MASKWRITE(0xF800077C, 0x00003FFFU, 0x00001305U), + EMIT_MASKWRITE(0xF8000780, 0x00003FFFU, 0x00001304U), + EMIT_MASKWRITE(0xF8000784, 0x00003FFFU, 0x00001304U), + EMIT_MASKWRITE(0xF8000788, 0x00003FFFU, 0x00001304U), + EMIT_MASKWRITE(0xF800078C, 0x00003FFFU, 0x00001304U), + EMIT_MASKWRITE(0xF8000790, 0x00003FFFU, 0x00001305U), + EMIT_MASKWRITE(0xF8000794, 0x00003FFFU, 0x00001304U), + EMIT_MASKWRITE(0xF8000798, 0x00003FFFU, 0x00001304U), + EMIT_MASKWRITE(0xF800079C, 0x00003FFFU, 0x00001304U), + EMIT_MASKWRITE(0xF80007A0, 0x00003FFFU, 0x00001280U), + EMIT_MASKWRITE(0xF80007A4, 0x00003FFFU, 0x00001280U), + EMIT_MASKWRITE(0xF80007A8, 0x00003FFFU, 0x00001280U), + EMIT_MASKWRITE(0xF80007AC, 0x00003FFFU, 0x00001280U), + EMIT_MASKWRITE(0xF80007B0, 0x00003FFFU, 0x00001280U), + EMIT_MASKWRITE(0xF80007B4, 0x00003FFFU, 0x00001280U), + EMIT_MASKWRITE(0xF80007B8, 0x00003FFFU, 0x00001200U), + EMIT_MASKWRITE(0xF80007BC, 0x00003F01U, 0x00001201U), + EMIT_MASKWRITE(0xF80007C0, 0x00003FFFU, 0x000012E0U), + EMIT_MASKWRITE(0xF80007C4, 0x00003FFFU, 0x000012E1U), + EMIT_MASKWRITE(0xF80007C8, 0x00003FFFU, 0x00001200U), + EMIT_MASKWRITE(0xF80007CC, 0x00003FFFU, 0x00001200U), + EMIT_MASKWRITE(0xF80007D0, 0x00003FFFU, 0x00001280U), + EMIT_MASKWRITE(0xF80007D4, 0x00003FFFU, 0x00001280U), + EMIT_MASKWRITE(0xF8000830, 0x003F003FU, 0x002F0037U), + EMIT_WRITE(0xF8000004, 0x0000767BU), + EMIT_EXIT(), +}; + +static unsigned long ps7_peripherals_init_data_3_0[] = { + EMIT_WRITE(0xF8000008, 0x0000DF0DU), + EMIT_MASKWRITE(0xF8000B48, 0x00000180U, 0x00000180U), + EMIT_MASKWRITE(0xF8000B4C, 0x00000180U, 0x00000180U), + EMIT_MASKWRITE(0xF8000B50, 0x00000180U, 0x00000180U), + EMIT_MASKWRITE(0xF8000B54, 0x00000180U, 0x00000180U), + EMIT_WRITE(0xF8000004, 0x0000767BU), + EMIT_MASKWRITE(0xE0001034, 0x000000FFU, 0x00000006U), + EMIT_MASKWRITE(0xE0001018, 0x0000FFFFU, 0x0000007CU), + EMIT_MASKWRITE(0xE0001000, 0x000001FFU, 0x00000017U), + EMIT_MASKWRITE(0xE0001004, 0x000003FFU, 0x00000020U), + EMIT_MASKWRITE(0xE000D000, 0x00080000U, 0x00080000U), + EMIT_MASKWRITE(0xF8007000, 0x20000000U, 0x00000000U), + EMIT_MASKWRITE(0xE000A244, 0x003FFFFFU, 0x00004000U), + EMIT_MASKWRITE(0xE000A008, 0xFFFFFFFFU, 0xBFFF4000U), + EMIT_MASKWRITE(0xE000A248, 0x003FFFFFU, 0x00004000U), + EMIT_MASKWRITE(0xE000A008, 0xFFFFFFFFU, 0xBFFF0000U), + EMIT_MASKDELAY(0xF8F00200, 1), + EMIT_MASKWRITE(0xE000A008, 0xFFFFFFFFU, 0xBFFF4000U), + EMIT_EXIT(), +}; + +static unsigned long ps7_post_config_3_0[] = { + EMIT_WRITE(0xF8000008, 0x0000DF0DU), + EMIT_MASKWRITE(0xF8000900, 0x0000000FU, 0x0000000FU), + EMIT_MASKWRITE(0xF8000240, 0xFFFFFFFFU, 0x00000000U), + EMIT_WRITE(0xF8000004, 0x0000767BU), + EMIT_EXIT(), +}; + +int ps7_post_config(void) +{ + int ret = -1; + + ret = ps7_config(ps7_post_config_3_0); + if (ret != PS7_INIT_SUCCESS) + return ret; + + return PS7_INIT_SUCCESS; +} + +int ps7_init(void) +{ + int ret; + + ret = ps7_config(ps7_mio_init_data_3_0); + if (ret != PS7_INIT_SUCCESS) + return ret; + + ret = ps7_config(ps7_pll_init_data_3_0); + if (ret != PS7_INIT_SUCCESS) + return ret; + + ret = ps7_config(ps7_clock_init_data_3_0); + if (ret != PS7_INIT_SUCCESS) + return ret; + + ret = ps7_config(ps7_ddr_init_data_3_0); + if (ret != PS7_INIT_SUCCESS) + return ret; + + ret = ps7_config(ps7_peripherals_init_data_3_0); + if (ret != PS7_INIT_SUCCESS) + return ret; + + return PS7_INIT_SUCCESS; +} diff --git a/board/xilinx/zynqmp/MAINTAINERS b/board/xilinx/zynqmp/MAINTAINERS index bb39f875fe..e6fed25152 100644 --- a/board/xilinx/zynqmp/MAINTAINERS +++ b/board/xilinx/zynqmp/MAINTAINERS @@ -5,3 +5,4 @@ F: arch/arm/dts/zynqmp-* F: board/xilinx/zynqmp/ F: include/configs/xilinx_zynqmp* F: configs/xilinx_zynqmp* +F: configs/avnet_ultra96_rev1_defconfig diff --git a/board/xilinx/zynqmp/avnet-ultra96-rev1 b/board/xilinx/zynqmp/avnet-ultra96-rev1 new file mode 120000 index 0000000000..f2beed309a --- /dev/null +++ b/board/xilinx/zynqmp/avnet-ultra96-rev1 @@ -0,0 +1 @@ +zynqmp-zcu100-revC
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