diff options
Diffstat (limited to 'board')
415 files changed, 4195 insertions, 7635 deletions
diff --git a/board/AndesTech/adp-ag101p/adp-ag101p.c b/board/AndesTech/adp-ag101p/adp-ag101p.c index 84c77f76ff..805a266f63 100644 --- a/board/AndesTech/adp-ag101p/adp-ag101p.c +++ b/board/AndesTech/adp-ag101p/adp-ag101p.c @@ -49,12 +49,14 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_0; gd->bd->bi_dram[0].size = PHYS_SDRAM_0_SIZE; gd->bd->bi_dram[1].start = PHYS_SDRAM_1; gd->bd->bi_dram[1].size = PHYS_SDRAM_1_SIZE; + + return 0; } int board_eth_init(bd_t *bd) diff --git a/board/Arcturus/ucp1020/spl.c b/board/Arcturus/ucp1020/spl.c index 3a775be9ae..cd484fc44b 100644 --- a/board/Arcturus/ucp1020/spl.c +++ b/board/Arcturus/ucp1020/spl.c @@ -110,7 +110,7 @@ void board_init_r(gd_t *gd, ulong dest_addr) i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); #endif - gd->ram_size = initdram(0); + dram_init(); #ifdef CONFIG_SPL_NAND_BOOT puts("Tertiary program loader running in sram..."); #else diff --git a/board/Barix/ipam390/ipam390.c b/board/Barix/ipam390/ipam390.c index 9747f32904..fd1965d9f5 100644 --- a/board/Barix/ipam390/ipam390.c +++ b/board/Barix/ipam390/ipam390.c @@ -188,9 +188,7 @@ int board_early_init_f(void) int board_init(void) { -#ifndef CONFIG_USE_IRQ irq_init(); -#endif /* arch number of the board */ gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA850_EVM; diff --git a/board/BuS/eb_cpu5282/eb_cpu5282.c b/board/BuS/eb_cpu5282/eb_cpu5282.c index b1740ee9b9..a00a83a4a5 100644 --- a/board/BuS/eb_cpu5282/eb_cpu5282.c +++ b/board/BuS/eb_cpu5282/eb_cpu5282.c @@ -35,7 +35,7 @@ int checkboard (void) return 0; } -phys_size_t initdram (int board_type) +int dram_init(void) { int size, i; @@ -92,7 +92,9 @@ phys_size_t initdram (int board_type) *(unsigned int *) (CONFIG_SYS_SDRAM_BASE1 + 0x220) = 0xA5A5; size += CONFIG_SYS_SDRAM_SIZE1 * 1024 * 1024; #endif - return size; + gd->ram_size = size; + + return 0; } #if defined(CONFIG_SYS_DRAM_TEST) diff --git a/board/Marvell/mvebu_db-88f3720/MAINTAINERS b/board/Marvell/mvebu_armada-37xx/MAINTAINERS index 4e80917c72..52a3869b29 100644 --- a/board/Marvell/mvebu_db-88f3720/MAINTAINERS +++ b/board/Marvell/mvebu_armada-37xx/MAINTAINERS @@ -1,6 +1,6 @@ MVEBU_DB_88F3720 BOARD M: Stefan Roese <sr@denx.de> S: Maintained -F: board/Marvell/mvebu_db-88f3720/ -F: include/configs/mvebu_db-88f3720.h +F: board/Marvell/mvebu_armada-37xx/ +F: include/configs/mvebu_armada-37xx.h F: configs/mvebu_db-88f3720_defconfig diff --git a/board/Marvell/mvebu_db-88f3720/Makefile b/board/Marvell/mvebu_armada-37xx/Makefile index ed39738816..ed39738816 100644 --- a/board/Marvell/mvebu_db-88f3720/Makefile +++ b/board/Marvell/mvebu_armada-37xx/Makefile diff --git a/board/Marvell/mvebu_armada-37xx/board.c b/board/Marvell/mvebu_armada-37xx/board.c new file mode 100644 index 0000000000..8dc1f46d97 --- /dev/null +++ b/board/Marvell/mvebu_armada-37xx/board.c @@ -0,0 +1,258 @@ +/* + * Copyright (C) 2016 Stefan Roese <sr@denx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <i2c.h> +#include <phy.h> +#include <asm/io.h> +#include <asm/arch/cpu.h> +#include <asm/arch/soc.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* IO expander I2C device */ +#define I2C_IO_EXP_ADDR 0x22 +#define I2C_IO_CFG_REG_0 0x6 +#define I2C_IO_DATA_OUT_REG_0 0x2 +#define I2C_IO_REG_0_SATA_OFF 2 +#define I2C_IO_REG_0_USB_H_OFF 1 + +/* The pin control values are the same for DB and Espressobin */ +#define PINCTRL_NB_REG_VALUE 0x000173fa +#define PINCTRL_SB_REG_VALUE 0x00007a23 + +/* Ethernet switch registers */ +/* SMI addresses for multi-chip mode */ +#define MVEBU_PORT_CTRL_SMI_ADDR(p) (16 + (p)) +#define MVEBU_SW_G2_SMI_ADDR (28) + +/* Multi-chip mode */ +#define MVEBU_SW_SMI_DATA_REG (1) +#define MVEBU_SW_SMI_CMD_REG (0) + #define SW_SMI_CMD_REG_ADDR_OFF 0 + #define SW_SMI_CMD_DEV_ADDR_OFF 5 + #define SW_SMI_CMD_SMI_OP_OFF 10 + #define SW_SMI_CMD_SMI_MODE_OFF 12 + #define SW_SMI_CMD_SMI_BUSY_OFF 15 + +/* Single-chip mode */ +/* Switch Port Registers */ +#define MVEBU_SW_LINK_CTRL_REG (1) +#define MVEBU_SW_PORT_CTRL_REG (4) + +/* Global 2 Registers */ +#define MVEBU_G2_SMI_PHY_CMD_REG (24) +#define MVEBU_G2_SMI_PHY_DATA_REG (25) + +int board_early_init_f(void) +{ + const void *blob = gd->fdt_blob; + const char *bank_name; + const char *compat = "marvell,armada-3700-pinctl"; + int off, len; + void __iomem *addr; + + /* FIXME + * Temporary WA for setting correct pin control values + * until the real pin control driver is awailable. + */ + off = fdt_node_offset_by_compatible(blob, -1, compat); + while (off != -FDT_ERR_NOTFOUND) { + bank_name = fdt_getprop(blob, off, "bank-name", &len); + addr = (void __iomem *)fdtdec_get_addr_size_auto_noparent( + blob, off, "reg", 0, NULL, true); + if (!strncmp(bank_name, "armada-3700-nb", len)) + writel(PINCTRL_NB_REG_VALUE, addr); + else if (!strncmp(bank_name, "armada-3700-sb", len)) + writel(PINCTRL_SB_REG_VALUE, addr); + + off = fdt_node_offset_by_compatible(blob, off, compat); + } + + return 0; +} + +int board_init(void) +{ + /* adress of boot parameters */ + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + + return 0; +} + +/* Board specific AHCI / SATA enable code */ +int board_ahci_enable(void) +{ + struct udevice *dev; + int ret; + u8 buf[8]; + + /* Only DB requres this configuration */ + if (!of_machine_is_compatible("marvell,armada-3720-db")) + return 0; + + /* Configure IO exander PCA9555: 7bit address 0x22 */ + ret = i2c_get_chip_for_busnum(0, I2C_IO_EXP_ADDR, 1, &dev); + if (ret) { + printf("Cannot find PCA9555: %d\n", ret); + return 0; + } + + ret = dm_i2c_read(dev, I2C_IO_CFG_REG_0, buf, 1); + if (ret) { + printf("Failed to read IO expander value via I2C\n"); + return -EIO; + } + + /* + * Enable SATA power via IO expander connected via I2C by setting + * the corresponding bit to output mode to enable power for SATA + */ + buf[0] &= ~(1 << I2C_IO_REG_0_SATA_OFF); + ret = dm_i2c_write(dev, I2C_IO_CFG_REG_0, buf, 1); + if (ret) { + printf("Failed to set IO expander via I2C\n"); + return -EIO; + } + + return 0; +} + +/* Board specific xHCI enable code */ +int board_xhci_enable(void) +{ + struct udevice *dev; + int ret; + u8 buf[8]; + + /* Only DB requres this configuration */ + if (!of_machine_is_compatible("marvell,armada-3720-db")) + return 0; + + /* Configure IO exander PCA9555: 7bit address 0x22 */ + ret = i2c_get_chip_for_busnum(0, I2C_IO_EXP_ADDR, 1, &dev); + if (ret) { + printf("Cannot find PCA9555: %d\n", ret); + return 0; + } + + printf("Enable USB VBUS\n"); + + /* + * Read configuration (direction) and set VBUS pin as output + * (reset pin = output) + */ + ret = dm_i2c_read(dev, I2C_IO_CFG_REG_0, buf, 1); + if (ret) { + printf("Failed to read IO expander value via I2C\n"); + return -EIO; + } + buf[0] &= ~(1 << I2C_IO_REG_0_USB_H_OFF); + ret = dm_i2c_write(dev, I2C_IO_CFG_REG_0, buf, 1); + if (ret) { + printf("Failed to set IO expander via I2C\n"); + return -EIO; + } + + /* Read VBUS output value and disable it */ + ret = dm_i2c_read(dev, I2C_IO_DATA_OUT_REG_0, buf, 1); + if (ret) { + printf("Failed to read IO expander value via I2C\n"); + return -EIO; + } + buf[0] &= ~(1 << I2C_IO_REG_0_USB_H_OFF); + ret = dm_i2c_write(dev, I2C_IO_DATA_OUT_REG_0, buf, 1); + if (ret) { + printf("Failed to set IO expander via I2C\n"); + return -EIO; + } + + /* + * Required delay for configuration to settle - must wait for + * power on port is disabled in case VBUS signal was high, + * required 3 seconds delay to let VBUS signal fully settle down + */ + mdelay(3000); + + /* Enable VBUS power: Set output value of VBUS pin as enabled */ + buf[0] |= (1 << I2C_IO_REG_0_USB_H_OFF); + ret = dm_i2c_write(dev, I2C_IO_DATA_OUT_REG_0, buf, 1); + if (ret) { + printf("Failed to set IO expander via I2C\n"); + return -EIO; + } + + mdelay(500); /* required delay to let output value settle */ + + return 0; +} + +/* Helper function for accessing switch devices in multi-chip connection mode */ +static int mii_multi_chip_mode_write(struct mii_dev *bus, int dev_smi_addr, + int smi_addr, int reg, u16 value) +{ + u16 smi_cmd = 0; + + if (bus->write(bus, dev_smi_addr, 0, + MVEBU_SW_SMI_DATA_REG, value) != 0) { + printf("Error writing to the PHY addr=%02x reg=%02x\n", + smi_addr, reg); + return -EFAULT; + } + + smi_cmd = (1 << SW_SMI_CMD_SMI_BUSY_OFF) | + (1 << SW_SMI_CMD_SMI_MODE_OFF) | + (1 << SW_SMI_CMD_SMI_OP_OFF) | + (smi_addr << SW_SMI_CMD_DEV_ADDR_OFF) | + (reg << SW_SMI_CMD_REG_ADDR_OFF); + if (bus->write(bus, dev_smi_addr, 0, + MVEBU_SW_SMI_CMD_REG, smi_cmd) != 0) { + printf("Error writing to the PHY addr=%02x reg=%02x\n", + smi_addr, reg); + return -EFAULT; + } + + return 0; +} + +/* Bring-up board-specific network stuff */ +int board_network_enable(struct mii_dev *bus) +{ + if (!of_machine_is_compatible("marvell,armada-3720-espressobin")) + return 0; + + /* + * FIXME: remove this code once Topaz driver gets available + * A3720 Community Board Only + * Configure Topaz switch (88E6341) + * Set port 0,1,2,3 to forwarding Mode (through Switch Port registers) + */ + mii_multi_chip_mode_write(bus, 1, MVEBU_PORT_CTRL_SMI_ADDR(0), + MVEBU_SW_PORT_CTRL_REG, 0x7f); + mii_multi_chip_mode_write(bus, 1, MVEBU_PORT_CTRL_SMI_ADDR(1), + MVEBU_SW_PORT_CTRL_REG, 0x7f); + mii_multi_chip_mode_write(bus, 1, MVEBU_PORT_CTRL_SMI_ADDR(2), + MVEBU_SW_PORT_CTRL_REG, 0x7f); + mii_multi_chip_mode_write(bus, 1, MVEBU_PORT_CTRL_SMI_ADDR(3), + MVEBU_SW_PORT_CTRL_REG, 0x7f); + + /* RGMII Delay on Port 0 (CPU port), force link to 1000Mbps */ + mii_multi_chip_mode_write(bus, 1, MVEBU_PORT_CTRL_SMI_ADDR(0), + MVEBU_SW_LINK_CTRL_REG, 0xe002); + + /* Power up PHY 1, 2, 3 (through Global 2 registers) */ + mii_multi_chip_mode_write(bus, 1, MVEBU_SW_G2_SMI_ADDR, + MVEBU_G2_SMI_PHY_DATA_REG, 0x1140); + mii_multi_chip_mode_write(bus, 1, MVEBU_SW_G2_SMI_ADDR, + MVEBU_G2_SMI_PHY_CMD_REG, 0x9620); + mii_multi_chip_mode_write(bus, 1, MVEBU_SW_G2_SMI_ADDR, + MVEBU_G2_SMI_PHY_CMD_REG, 0x9640); + mii_multi_chip_mode_write(bus, 1, MVEBU_SW_G2_SMI_ADDR, + MVEBU_G2_SMI_PHY_CMD_REG, 0x9660); + + return 0; +} diff --git a/board/Marvell/mvebu_db-88f3720/board.c b/board/Marvell/mvebu_db-88f3720/board.c deleted file mode 100644 index edf88c73e6..0000000000 --- a/board/Marvell/mvebu_db-88f3720/board.c +++ /dev/null @@ -1,134 +0,0 @@ -/* - * Copyright (C) 2016 Stefan Roese <sr@denx.de> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <i2c.h> -#include <asm/io.h> -#include <asm/arch/cpu.h> -#include <asm/arch/soc.h> - -DECLARE_GLOBAL_DATA_PTR; - -/* IO expander I2C device */ -#define I2C_IO_EXP_ADDR 0x22 -#define I2C_IO_CFG_REG_0 0x6 -#define I2C_IO_DATA_OUT_REG_0 0x2 -#define I2C_IO_REG_0_SATA_OFF 2 -#define I2C_IO_REG_0_USB_H_OFF 1 - -int board_early_init_f(void) -{ - /* Nothing to do (yet), perhaps later some pin-muxing etc */ - - return 0; -} - -int board_init(void) -{ - /* adress of boot parameters */ - gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; - - return 0; -} - -/* Board specific AHCI / SATA enable code */ -int board_ahci_enable(void) -{ - struct udevice *dev; - int ret; - u8 buf[8]; - - /* Configure IO exander PCA9555: 7bit address 0x22 */ - ret = i2c_get_chip_for_busnum(0, I2C_IO_EXP_ADDR, 1, &dev); - if (ret) { - printf("Cannot find PCA9555: %d\n", ret); - return 0; - } - - ret = dm_i2c_read(dev, I2C_IO_CFG_REG_0, buf, 1); - if (ret) { - printf("Failed to read IO expander value via I2C\n"); - return -EIO; - } - - /* - * Enable SATA power via IO expander connected via I2C by setting - * the corresponding bit to output mode to enable power for SATA - */ - buf[0] &= ~(1 << I2C_IO_REG_0_SATA_OFF); - ret = dm_i2c_write(dev, I2C_IO_CFG_REG_0, buf, 1); - if (ret) { - printf("Failed to set IO expander via I2C\n"); - return -EIO; - } - - return 0; -} - -/* Board specific xHCI enable code */ -int board_xhci_enable(void) -{ - struct udevice *dev; - int ret; - u8 buf[8]; - - /* Configure IO exander PCA9555: 7bit address 0x22 */ - ret = i2c_get_chip_for_busnum(0, I2C_IO_EXP_ADDR, 1, &dev); - if (ret) { - printf("Cannot find PCA9555: %d\n", ret); - return 0; - } - - printf("Enable USB VBUS\n"); - - /* - * Read configuration (direction) and set VBUS pin as output - * (reset pin = output) - */ - ret = dm_i2c_read(dev, I2C_IO_CFG_REG_0, buf, 1); - if (ret) { - printf("Failed to read IO expander value via I2C\n"); - return -EIO; - } - buf[0] &= ~(1 << I2C_IO_REG_0_USB_H_OFF); - ret = dm_i2c_write(dev, I2C_IO_CFG_REG_0, buf, 1); - if (ret) { - printf("Failed to set IO expander via I2C\n"); - return -EIO; - } - - /* Read VBUS output value and disable it */ - ret = dm_i2c_read(dev, I2C_IO_DATA_OUT_REG_0, buf, 1); - if (ret) { - printf("Failed to read IO expander value via I2C\n"); - return -EIO; - } - buf[0] &= ~(1 << I2C_IO_REG_0_USB_H_OFF); - ret = dm_i2c_write(dev, I2C_IO_DATA_OUT_REG_0, buf, 1); - if (ret) { - printf("Failed to set IO expander via I2C\n"); - return -EIO; - } - - /* - * Required delay for configuration to settle - must wait for - * power on port is disabled in case VBUS signal was high, - * required 3 seconds delay to let VBUS signal fully settle down - */ - mdelay(3000); - - /* Enable VBUS power: Set output value of VBUS pin as enabled */ - buf[0] |= (1 << I2C_IO_REG_0_USB_H_OFF); - ret = dm_i2c_write(dev, I2C_IO_DATA_OUT_REG_0, buf, 1); - if (ret) { - printf("Failed to set IO expander via I2C\n"); - return -EIO; - } - - mdelay(500); /* required delay to let output value settle */ - - return 0; -} diff --git a/board/a3m071/a3m071.c b/board/a3m071/a3m071.c index 55d0bc80c0..7e16aaf4b2 100644 --- a/board/a3m071/a3m071.c +++ b/board/a3m071/a3m071.c @@ -72,11 +72,11 @@ static void sdram_start(int hi_addr) #endif /* - * ATTENTION: Although partially referenced initdram does NOT make real use + * ATTENTION: Although partially referenced dram_init does NOT make real use * use of CONFIG_SYS_SDRAM_BASE. The code does not work if * CONFIG_SYS_SDRAM_BASE is something else than 0x00000000. */ -phys_size_t initdram(int board_type) +int dram_init(void) { ulong dramsize = 0; ulong dramsize2 = 0; @@ -153,7 +153,9 @@ phys_size_t initdram(int board_type) if ((SVR_MJREV(svr) >= 2) && (PVR_MAJ(pvr) == 1) && (PVR_MIN(pvr) == 4)) out_be32((void *)MPC5XXX_SDRAM_SDELAY, 0x04); - return dramsize + dramsize2; + gd->ram_size = dramsize + dramsize2; + + return 0; } static void get_revisions(int *failsavelevel, int *digiboardversion, diff --git a/board/a4m072/a4m072.c b/board/a4m072/a4m072.c index 20d8b80f7e..6f0d4489a2 100644 --- a/board/a4m072/a4m072.c +++ b/board/a4m072/a4m072.c @@ -23,6 +23,8 @@ #include "mt46v32m16.h" +DECLARE_GLOBAL_DATA_PTR; + #ifndef CONFIG_SYS_RAMBOOT static void sdram_start (int hi_addr) { @@ -66,12 +68,12 @@ static void sdram_start (int hi_addr) #endif /* - * ATTENTION: Although partially referenced initdram does NOT make real use + * ATTENTION: Although partially referenced dram_init does NOT make real use * use of CONFIG_SYS_SDRAM_BASE. The code does not work if CONFIG_SYS_SDRAM_BASE * is something else than 0x00000000. */ -phys_size_t initdram (int board_type) +int dram_init(void) { ulong dramsize = 0; uint svr, pvr; @@ -150,7 +152,9 @@ phys_size_t initdram (int board_type) __asm__ volatile ("sync"); } - return dramsize; + gd->ram_size = dramsize; + + return 0; } int checkboard (void) diff --git a/board/amcc/acadia/memory.c b/board/amcc/acadia/memory.c index 9673118857..36500da6f4 100644 --- a/board/amcc/acadia/memory.c +++ b/board/amcc/acadia/memory.c @@ -15,6 +15,8 @@ #include <asm/io.h> #include <asm/ppc4xx-gpio.h> +DECLARE_GLOBAL_DATA_PTR; + extern void board_pll_init_f(void); static void cram_bcr_write(u32 wr_val) @@ -41,7 +43,7 @@ static void cram_bcr_write(u32 wr_val) return; } -phys_size_t initdram(int board_type) +int dram_init(void) { int i; u32 val; @@ -77,5 +79,7 @@ phys_size_t initdram(int board_type) for (i=0; i<200000; i++) ; - return (CONFIG_SYS_MBYTES_RAM << 20); + gd->ram_size = CONFIG_SYS_MBYTES_RAM << 20; + + return 0; } diff --git a/board/amcc/bamboo/bamboo.c b/board/amcc/bamboo/bamboo.c index 2838f9a1ed..6a50b393f4 100644 --- a/board/amcc/bamboo/bamboo.c +++ b/board/amcc/bamboo/bamboo.c @@ -12,6 +12,8 @@ #include <asm/ppc440.h> #include "bamboo.h" +DECLARE_GLOBAL_DATA_PTR; + void ext_bus_cntlr_init(void); void configure_ppc440ep_pins(void); int is_nand_selected(void); @@ -436,9 +438,11 @@ int checkboard(void) } -phys_size_t initdram (int board_type) +int dram_init(void) { - return spd_sdram(); + gd->ram_size = spd_sdram(); + + return 0; } /*----------------------------------------------------------------------------+ diff --git a/board/amcc/bubinga/bubinga.c b/board/amcc/bubinga/bubinga.c index 9043de62d3..c73424d8c6 100644 --- a/board/amcc/bubinga/bubinga.c +++ b/board/amcc/bubinga/bubinga.c @@ -9,6 +9,8 @@ #include <asm/processor.h> #include <asm/io.h> +DECLARE_GLOBAL_DATA_PTR; + long int spd_sdram(void); int board_early_init_f(void) @@ -52,10 +54,12 @@ int checkboard(void) } /* ------------------------------------------------------------------------- - initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of + dram_init() reads EEPROM via I2c. EEPROM contains all of the necessary info for SDRAM controller configuration ------------------------------------------------------------------------- */ -phys_size_t initdram(int board_type) +int dram_init(void) { - return spd_sdram(); + gd->ram_size = spd_sdram(); + + return 0; } diff --git a/board/amcc/sequoia/sdram.c b/board/amcc/sequoia/sdram.c index 67640d7edf..ea987179e7 100644 --- a/board/amcc/sequoia/sdram.c +++ b/board/amcc/sequoia/sdram.c @@ -20,6 +20,8 @@ #include <asm/io.h> #include <asm/ppc440.h> +DECLARE_GLOBAL_DATA_PTR; + /*-----------------------------------------------------------------------------+ * Prototypes *-----------------------------------------------------------------------------*/ @@ -28,10 +30,10 @@ extern void denali_core_search_data_eye(void); /************************************************************************* * - * initdram -- 440EPx's DDR controller is a DENALI Core + * dram_init -- 440EPx's DDR controller is a DENALI Core * ************************************************************************/ -phys_size_t initdram (int board_type) +int dram_init(void) { #if !defined(CONFIG_SYS_RAMBOOT) ulong speed = get_bus_freq(0); @@ -88,5 +90,7 @@ phys_size_t initdram (int board_type) */ set_mcsr(get_mcsr()); - return (CONFIG_SYS_MBYTES_SDRAM << 20); + gd->ram_size = CONFIG_SYS_MBYTES_SDRAM << 20; + + return 0; } diff --git a/board/amcc/walnut/walnut.c b/board/amcc/walnut/walnut.c index c9482094f6..b21daa0af8 100644 --- a/board/amcc/walnut/walnut.c +++ b/board/amcc/walnut/walnut.c @@ -9,6 +9,8 @@ #include <asm/processor.h> #include <spd_sdram.h> +DECLARE_GLOBAL_DATA_PTR; + int board_early_init_f(void) { /*-------------------------------------------------------------------------+ @@ -71,10 +73,12 @@ int checkboard(void) } /* - * initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of + * dram_init() reads EEPROM via I2c. EEPROM contains all of * the necessary info for SDRAM controller configuration */ -phys_size_t initdram(int board_type) +int dram_init(void) { - return spd_sdram(); + gd->ram_size = spd_sdram(); + + return 0; } diff --git a/board/amcc/yosemite/yosemite.c b/board/amcc/yosemite/yosemite.c index 56b5191d66..f46aacfff8 100644 --- a/board/amcc/yosemite/yosemite.c +++ b/board/amcc/yosemite/yosemite.c @@ -205,7 +205,7 @@ int checkboard(void) } /************************************************************************* - * initdram -- doesn't use serial presence detect. + * dram_init -- doesn't use serial presence detect. * * Assumes: 256 MB, ECC, non-registered * PLB @ 133 MHz @@ -286,7 +286,7 @@ void sdram_tr1_set(int ram_address, int* tr1_value) *tr1_value = (first_good + last_bad) / 2; } -phys_size_t initdram(int board) +int dram_init(void) { register uint reg; int tr1_bank1, tr1_bank2; @@ -334,7 +334,10 @@ phys_size_t initdram(int board) sdram_tr1_set(0x08000000, &tr1_bank2); mtsdram(SDRAM0_TR1, (((tr1_bank1+tr1_bank2)/2) | 0x80800800)); - return CONFIG_SYS_SDRAM_BANKS * (CONFIG_SYS_KBYTES_SDRAM * 1024); /* return bytes */ + gd->ram_size = CONFIG_SYS_SDRAM_BANKS * + (CONFIG_SYS_KBYTES_SDRAM * 1024); /* set bytes */ + + return 0; } /************************************************************************* diff --git a/board/aries/m53evk/m53evk.c b/board/aries/m53evk/m53evk.c index cbfc2a216a..14c60fc539 100644 --- a/board/aries/m53evk/m53evk.c +++ b/board/aries/m53evk/m53evk.c @@ -59,13 +59,15 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = mx53_dram_size[0]; gd->bd->bi_dram[1].start = PHYS_SDRAM_2; gd->bd->bi_dram[1].size = mx53_dram_size[1]; + + return 0; } static void setup_iomux_uart(void) diff --git a/board/armadeus/apf27/apf27.c b/board/armadeus/apf27/apf27.c index 16adf6e5de..1abfe88949 100644 --- a/board/armadeus/apf27/apf27.c +++ b/board/armadeus/apf27/apf27.c @@ -193,7 +193,7 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = get_ram_size((void *)PHYS_SDRAM_1, @@ -204,6 +204,8 @@ void dram_init_banksize(void) PHYS_SDRAM_2_SIZE); else gd->bd->bi_dram[1].size = 0; + + return 0; } ulong board_get_usable_ram_top(ulong total_size) diff --git a/board/armltd/vexpress/vexpress_common.c b/board/armltd/vexpress/vexpress_common.c index d3b3b31924..458f1d8148 100644 --- a/board/armltd/vexpress/vexpress_common.c +++ b/board/armltd/vexpress/vexpress_common.c @@ -109,7 +109,7 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = @@ -117,6 +117,8 @@ void dram_init_banksize(void) gd->bd->bi_dram[1].start = PHYS_SDRAM_2; gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE); + + return 0; } /* diff --git a/board/armltd/vexpress64/vexpress64.c b/board/armltd/vexpress64/vexpress64.c index e34af6c4d9..0a224178df 100644 --- a/board/armltd/vexpress64/vexpress64.c +++ b/board/armltd/vexpress64/vexpress64.c @@ -70,7 +70,7 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; @@ -78,6 +78,8 @@ void dram_init_banksize(void) gd->bd->bi_dram[1].start = PHYS_SDRAM_2; gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; #endif + + return 0; } /* diff --git a/board/astro/mcf5373l/mcf5373l.c b/board/astro/mcf5373l/mcf5373l.c index 7ec7cb378f..d011ae5723 100644 --- a/board/astro/mcf5373l/mcf5373l.c +++ b/board/astro/mcf5373l/mcf5373l.c @@ -27,7 +27,7 @@ int checkboard(void) return 0; } -phys_size_t initdram(int board_type) +int dram_init(void) { #if !defined(CONFIG_MONITOR_IS_IN_RAM) sdram_t *sdp = (sdram_t *)(MMAP_SDRAM); @@ -79,8 +79,10 @@ phys_size_t initdram(int board_type) * (Do not rely on the SDCS register(s) being set to 0x00000000 * during reset as stated in the data sheet.) */ - return get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, + gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000 - CONFIG_SYS_SDRAM_BASE); + + return 0; } #define UART_BASE MMAP_UART0 diff --git a/board/bct-brettl2/Kconfig b/board/bct-brettl2/Kconfig deleted file mode 100644 index 9c5407e7b2..0000000000 --- a/board/bct-brettl2/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_BCT_BRETTL2 - -config SYS_BOARD - default "bct-brettl2" - -config SYS_CONFIG_NAME - default "bct-brettl2" - -endif diff --git a/board/bct-brettl2/MAINTAINERS b/board/bct-brettl2/MAINTAINERS deleted file mode 100644 index 32245d4bcd..0000000000 --- a/board/bct-brettl2/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -BCT-BRETTL2 BOARD -M: Peter Meerwald <devel@bct-electronic.com> -S: Maintained -F: board/bct-brettl2/ -F: include/configs/bct-brettl2.h -F: configs/bct-brettl2_defconfig diff --git a/board/bct-brettl2/Makefile b/board/bct-brettl2/Makefile deleted file mode 100644 index 28fccc0dcb..0000000000 --- a/board/bct-brettl2/Makefile +++ /dev/null @@ -1,13 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := bct-brettl2.o gpio_cfi_flash.o cled.o -obj-$(CONFIG_BFIN_MAC) += smsc9303.o diff --git a/board/bct-brettl2/bct-brettl2.c b/board/bct-brettl2/bct-brettl2.c deleted file mode 100644 index adb8605bb9..0000000000 --- a/board/bct-brettl2/bct-brettl2.c +++ /dev/null @@ -1,109 +0,0 @@ -/* - * U-Boot - main board file for BCT brettl2 - * - * Copyright (c) 2010 BCT Electronic GmbH - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <config.h> -#include <command.h> -#include <asm/blackfin.h> -#include <asm/portmux.h> -#include <asm/gpio.h> -#include <net.h> -#include <netdev.h> -#include <miiphy.h> - -#include "../cm-bf537e/gpio_cfi_flash.h" -#include "smsc9303.h" - -DECLARE_GLOBAL_DATA_PTR; - -int checkboard(void) -{ - printf("Board: bct-brettl2 board\n"); - printf(" Support: http://www.bct-electronic.com/\n"); - return 0; -} - -#ifdef CONFIG_BFIN_MAC -int board_eth_init(bd_t *bis) -{ - int retry = 3; - int ret; - - ret = bfin_EMAC_initialize(bis); - - uchar enetaddr[6]; - if (eth_getenv_enetaddr("ethaddr", enetaddr)) { - printf("setting MAC %pM\n", enetaddr); - } - puts(" "); - - puts("initialize SMSC LAN9303i ethernet switch\n"); - - while (retry-- > 0) { - if (init_smsc9303i_mii()) - return ret; - } - - return ret; -} -#endif - -static void init_tlv320aic31(void) -{ - puts("Audio: setup TIMER0 to enable 16.384 MHz clock for tlv320aic31\n"); - peripheral_request(P_TMR0, "tlv320aic31 clock"); - bfin_write_TIMER0_CONFIG(0x020d); - bfin_write_TIMER0_PERIOD(0x0008); - bfin_write_TIMER0_WIDTH(0x0008/2); - bfin_write_TIMER_ENABLE(bfin_read_TIMER_ENABLE() | 1); - SSYNC(); - udelay(10000); - - puts(" resetting tlv320aic31\n"); - - gpio_request(GPIO_PF2, "tlv320aic31"); - gpio_direction_output(GPIO_PF2, 0); - udelay(10000); - gpio_direction_output(GPIO_PF2, 1); - udelay(10000); - gpio_free(GPIO_PF2); -} - -static void init_mute_pin(void) -{ - printf(" unmute class D amplifier\n"); - - gpio_request(GPIO_PF5, "mute"); - gpio_direction_output(GPIO_PF5, 1); - gpio_free(GPIO_PF5); -} - -/* sometimes LEDs (speech, status) are still on after reboot, turn 'em off */ -static void turn_leds_off(void) -{ - printf(" turn LEDs off\n"); - - gpio_request(GPIO_PF6, "led"); - gpio_direction_output(GPIO_PF6, 0); - gpio_free(GPIO_PF6); - - gpio_request(GPIO_PF15, "led"); - gpio_direction_output(GPIO_PF15, 0); - gpio_free(GPIO_PF15); -} - -/* miscellaneous platform dependent initialisations */ -int misc_init_r(void) -{ - gpio_cfi_flash_init(); - init_tlv320aic31(); - init_mute_pin(); - turn_leds_off(); - - return 0; -} diff --git a/board/bct-brettl2/cled.c b/board/bct-brettl2/cled.c deleted file mode 100644 index dcb91bdffa..0000000000 --- a/board/bct-brettl2/cled.c +++ /dev/null @@ -1,32 +0,0 @@ -/* - * cled.c - control color led - * - * Copyright (c) 2010 BCT Electronic GmbH - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <command.h> -#include <asm/blackfin.h> -#include <asm/io.h> - -int do_cled(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) -{ - ulong addr = 0x20000000 + 0x200000; /* AMS2 */ - uchar data; - - if (argc < 2) - return cmd_usage(cmdtp); - - data = simple_strtoul(argv[1], NULL, 10); - outb(data, addr); - - printf("cled, write %02x\n", data); - - return 0; -} - -U_BOOT_CMD(cled, 2, 0, do_cled, - "set/clear color LED", - ""); diff --git a/board/bct-brettl2/gpio_cfi_flash.c b/board/bct-brettl2/gpio_cfi_flash.c deleted file mode 100644 index b385c7fc0e..0000000000 --- a/board/bct-brettl2/gpio_cfi_flash.c +++ /dev/null @@ -1,4 +0,0 @@ -#define GPIO_PIN_1 GPIO_PG5 -#define GPIO_PIN_2 GPIO_PG6 -#define GPIO_PIN_3 GPIO_PG7 -#include "../cm-bf537e/gpio_cfi_flash.c" diff --git a/board/bct-brettl2/smsc9303.c b/board/bct-brettl2/smsc9303.c deleted file mode 100644 index 15eea7a484..0000000000 --- a/board/bct-brettl2/smsc9303.c +++ /dev/null @@ -1,176 +0,0 @@ -/* - * smsc9303.c - routines to initialize SMSC 9303 switch - * - * Copyright (c) 2010 BCT Electronic GmbH - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <config.h> -#include <miiphy.h> - -#include <asm/blackfin.h> -#include <asm/gpio.h> - -static int smc9303i_write_mii(unsigned char addr, unsigned char reg, unsigned short data) -{ - const char *devname = miiphy_get_current_dev(); - - if (!devname) - return 0; - - if (miiphy_write(devname, addr, reg, data) != 0) - return 0; - - return 1; -} - -static int smc9303i_write_reg(unsigned short reg, unsigned int data) -{ - const char *devname = miiphy_get_current_dev(); - unsigned char mii_addr = 0x10 | (reg >> 6); - unsigned char mii_reg = (reg & 0x3c) >> 1; - - if (!devname) - return 0; - - if (miiphy_write(devname, mii_addr, mii_reg|0, data & 0xffff) != 0) - return 0; - - if (miiphy_write(devname, mii_addr, mii_reg|1, data >> 16) != 0) - return 0; - - return 1; -} - -static int smc9303i_read_reg(unsigned short reg, unsigned int *data) -{ - const char *devname = miiphy_get_current_dev(); - unsigned char mii_addr = 0x10 | (reg >> 6); - unsigned char mii_reg = (reg & 0x3c) >> 1; - unsigned short tmp1, tmp2; - - if (!devname) - return 0; - - if (miiphy_read(devname, mii_addr, mii_reg|0, &tmp1) != 0) - return 0; - - if (miiphy_read(devname, mii_addr, mii_reg|1, &tmp2) != 0) - return 0; - - *data = (tmp2 << 16) | tmp1; - - return 1; -} - -#if 0 -static int smc9303i_read_mii(unsigned char addr, unsigned char reg, unsigned short *data) -{ - const char *devname = miiphy_get_current_dev(); - - if (!devname) - return 0; - - if (miiphy_read(devname, addr, reg, data) != 0) - return 0; - - return 1; -} -#endif - -typedef struct { - unsigned short reg; - unsigned int value; -} smsc9303i_config_entry1_t; - -static const smsc9303i_config_entry1_t smsc9303i_config_table1[] = -{ - {0x1a0, 0x00000006}, /* Port 1 Manual Flow Control Register */ - {0x1a4, 0x00000006}, /* Port 2 Manual Flow Control Register */ - {0x1a8, 0x00000006}, /* Port 0 Manual Flow Control Register */ -}; - -typedef struct -{ - unsigned char addr; - unsigned char reg; - unsigned short value; -} smsc9303i_config_entry2_t; - -static const smsc9303i_config_entry2_t smsc9303i_config_table2[] = -{ - {0x01, 0x00, 0x0100}, /* Port0 PHY Basic Control Register */ - {0x02, 0x00, 0x1100}, /* Port1 PHY Basic Control Register */ - {0x03, 0x00, 0x1100}, /* Port2 PHY Basic Control Register */ - - {0x01, 0x04, 0x0001}, /* Port0 PHY Auto-Negotiation Advertisement Register */ - {0x02, 0x04, 0x2de1}, /* Port1 PHY Auto-Negotiation Advertisement Register */ - {0x03, 0x04, 0x2de1}, /* Port2 PHY Auto-Negotiation Advertisement Register */ - - {0x01, 0x11, 0x0000}, /* Port0 PHY Mode Control/Status Register */ - {0x02, 0x11, 0x0000}, /* Port1 PHY Mode Control/Status Register */ - {0x03, 0x11, 0x0000}, /* Port2 PHY Mode Control/Status Register */ - - {0x01, 0x12, 0x0021}, /* Port0 PHY Special Modes Register */ - {0x02, 0x12, 0x00e2}, /* Port1 PHY Special Modes Register */ - {0x03, 0x12, 0x00e3}, /* Port2 PHY Special Modes Register */ - {0x01, 0x1b, 0x0000}, /* Port0 PHY Special Control/Status Indication Register */ - {0x02, 0x1b, 0x0000}, /* Port1 PHY Special Control/Status Indication Register */ - {0x03, 0x1b, 0x0000}, /* Port2 PHY Special Control/Status Indication Register */ - {0x01, 0x1e, 0x0000}, /* Port0 PHY Interrupt Source Flags Register */ - {0x02, 0x1e, 0x0000}, /* Port1 PHY Interrupt Source Flags Register */ - {0x03, 0x1e, 0x0000}, /* Port2 PHY Interrupt Source Flags Register */ -}; - -int init_smsc9303i_mii(void) -{ - unsigned int data; - unsigned int i; - - printf(" reset SMSC LAN9303i\n"); - - gpio_request(GPIO_PG10, "smsc9303"); - gpio_direction_output(GPIO_PG10, 0); - udelay(10000); - gpio_direction_output(GPIO_PG10, 1); - udelay(10000); - - gpio_free(GPIO_PG10); - -#if defined(CONFIG_MII_INIT) - mii_init(); -#endif - - printf(" write SMSC LAN9303i configuration\n"); - - if (!smc9303i_read_reg(0x50, &data)) - return 0; - - if ((data >> 16) != 0x9303) { - /* chip id not found */ - printf(" error identifying SMSC LAN9303i\n"); - return 0; - } - - for (i = 0; i < ARRAY_SIZE(smsc9303i_config_table1); i++) { - const smsc9303i_config_entry1_t *entry = &smsc9303i_config_table1[i]; - - if (!smc9303i_write_reg(entry->reg, entry->value)) { - printf(" error writing SMSC LAN9303i configuration\n"); - return 0; - } - } - - for (i = 0; i < ARRAY_SIZE(smsc9303i_config_table2); i++) { - const smsc9303i_config_entry2_t *entry = &smsc9303i_config_table2[i]; - - if (!smc9303i_write_mii(entry->addr, entry->reg, entry->value)) { - printf(" error writing SMSC LAN9303i configuration\n"); - return 0; - } - } - - return 1; -} diff --git a/board/bct-brettl2/smsc9303.h b/board/bct-brettl2/smsc9303.h deleted file mode 100644 index a4ba40ef73..0000000000 --- a/board/bct-brettl2/smsc9303.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * smsc9303.h - routines to initialize SMSC 9303 switch - * - * Copyright (c) 2010 BCT Electronic GmbH - * - * Licensed under the GPL-2 or later. - */ - -int init_smsc9303i_mii(void); diff --git a/board/beckhoff/mx53cx9020/mx53cx9020.c b/board/beckhoff/mx53cx9020/mx53cx9020.c index 9b3ac22e70..c5d55dc68f 100644 --- a/board/beckhoff/mx53cx9020/mx53cx9020.c +++ b/board/beckhoff/mx53cx9020/mx53cx9020.c @@ -86,13 +86,15 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = mx53_dram_size[0]; gd->bd->bi_dram[1].start = PHYS_SDRAM_2; gd->bd->bi_dram[1].size = mx53_dram_size[1]; + + return 0; } u32 get_board_rev(void) diff --git a/board/bf506f-ezkit/Kconfig b/board/bf506f-ezkit/Kconfig deleted file mode 100644 index e6fc12ccb2..0000000000 --- a/board/bf506f-ezkit/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_BF506F_EZKIT - -config SYS_BOARD - default "bf506f-ezkit" - -config SYS_CONFIG_NAME - default "bf506f-ezkit" - -endif diff --git a/board/bf506f-ezkit/MAINTAINERS b/board/bf506f-ezkit/MAINTAINERS deleted file mode 100644 index aaf1b7eaaf..0000000000 --- a/board/bf506f-ezkit/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -BF506F-EZKIT BOARD -M: Sonic Zhang <sonic.adi@gmail.com> -S: Maintained -F: board/bf506f-ezkit/ -F: include/configs/bf506f-ezkit.h -F: configs/bf506f-ezkit_defconfig diff --git a/board/bf506f-ezkit/Makefile b/board/bf506f-ezkit/Makefile deleted file mode 100644 index 7efe1bc20e..0000000000 --- a/board/bf506f-ezkit/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := bf506f-ezkit.o diff --git a/board/bf506f-ezkit/bf506f-ezkit.c b/board/bf506f-ezkit/bf506f-ezkit.c deleted file mode 100644 index 77e40ae15d..0000000000 --- a/board/bf506f-ezkit/bf506f-ezkit.c +++ /dev/null @@ -1,27 +0,0 @@ -/* - * U-Boot - main board file - * - * Copyright (c) 2008-2010 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <asm/blackfin.h> - -int checkboard(void) -{ - printf("Board: ADI BF506F EZ-Kit board\n"); - printf(" Support: http://blackfin.uclinux.org/\n"); - return 0; -} - -int board_early_init_f(void) -{ - bfin_write_EBIU_MODE(1); - SSYNC(); - bfin_write_FLASH_CONTROL_CLEAR(1); - udelay(1); - bfin_write_FLASH_CONTROL_SET(1); - return 0; -} diff --git a/board/bf518f-ezbrd/Kconfig b/board/bf518f-ezbrd/Kconfig deleted file mode 100644 index a0e80a8bde..0000000000 --- a/board/bf518f-ezbrd/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_BF518F_EZBRD - -config SYS_BOARD - default "bf518f-ezbrd" - -config SYS_CONFIG_NAME - default "bf518f-ezbrd" - -endif diff --git a/board/bf518f-ezbrd/MAINTAINERS b/board/bf518f-ezbrd/MAINTAINERS deleted file mode 100644 index 6727ae4e8a..0000000000 --- a/board/bf518f-ezbrd/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -BF518F-EZBRD BOARD -M: Sonic Zhang <sonic.adi@gmail.com> -S: Maintained -F: board/bf518f-ezbrd/ -F: include/configs/bf518f-ezbrd.h -F: configs/bf518f-ezbrd_defconfig diff --git a/board/bf518f-ezbrd/Makefile b/board/bf518f-ezbrd/Makefile deleted file mode 100644 index e9e23ed41f..0000000000 --- a/board/bf518f-ezbrd/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := bf518f-ezbrd.o diff --git a/board/bf518f-ezbrd/bf518f-ezbrd.c b/board/bf518f-ezbrd/bf518f-ezbrd.c deleted file mode 100644 index 30d5285575..0000000000 --- a/board/bf518f-ezbrd/bf518f-ezbrd.c +++ /dev/null @@ -1,162 +0,0 @@ -/* - * U-Boot - main board file - * - * Copyright (c) 2008-2009 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <config.h> -#include <command.h> -#include <net.h> -#include <netdev.h> -#include <spi.h> -#include <asm/blackfin.h> -#include <asm/portmux.h> -#include <asm/mach-common/bits/otp.h> -#include <asm/sdh.h> - -DECLARE_GLOBAL_DATA_PTR; - -int checkboard(void) -{ - printf("Board: ADI BF518F EZ-Board board\n"); - printf(" Support: http://blackfin.uclinux.org/\n"); - return 0; -} - -#if defined(CONFIG_BFIN_MAC) -static void board_init_enetaddr(uchar *mac_addr) -{ -#ifdef CONFIG_MTD_NOR_FLASH - /* we cram the MAC in the last flash sector */ - uchar *board_mac_addr = (uchar *)0x203F0096; - if (is_valid_ethaddr(board_mac_addr)) { - memcpy(mac_addr, board_mac_addr, 6); - eth_setenv_enetaddr("ethaddr", mac_addr); - } -#endif -} - -/* Only the first run of boards had a KSZ switch */ -#if defined(CONFIG_BFIN_SPI) && __SILICON_REVISION__ == 0 -# define KSZ_POSSIBLE 1 -#else -# define KSZ_POSSIBLE 0 -#endif - -#define KSZ_MAX_HZ 5000000 - -#define KSZ_WRITE 0x02 -#define KSZ_READ 0x03 - -#define KSZ_REG_CHID 0x00 /* Register 0: Chip ID0 */ -#define KSZ_REG_STPID 0x01 /* Register 1: Chip ID1 / Start Switch */ -#define KSZ_REG_GC9 0x0b /* Register 11: Global Control 9 */ -#define KSZ_REG_P3C0 0x30 /* Register 48: Port 3 Control 0 */ - -static int ksz8893m_transfer(struct spi_slave *slave, uchar dir, uchar reg, - uchar data, uchar result[3]) -{ - unsigned char dout[3] = { dir, reg, data, }; - return spi_xfer(slave, sizeof(dout) * 8, dout, result, SPI_XFER_BEGIN | SPI_XFER_END); -} - -static int ksz8893m_reg_set(struct spi_slave *slave, uchar reg, uchar data) -{ - unsigned char din[3]; - return ksz8893m_transfer(slave, KSZ_WRITE, reg, data, din); -} - -static int ksz8893m_reg_read(struct spi_slave *slave, uchar reg) -{ - int ret; - unsigned char din[3]; - ret = ksz8893m_transfer(slave, KSZ_READ, reg, 0, din); - return ret ? ret : din[2]; -} - -static int ksz8893m_reg_clear(struct spi_slave *slave, uchar reg, uchar mask) -{ - return ksz8893m_reg_set(slave, reg, ksz8893m_reg_read(slave, reg) & mask); -} - -static int ksz8893m_reset(struct spi_slave *slave) -{ - int ret = 0; - - /* Disable STPID mode */ - ret |= ksz8893m_reg_clear(slave, KSZ_REG_GC9, 0x01); - - /* Disable VLAN tag insert on Port3 */ - ret |= ksz8893m_reg_clear(slave, KSZ_REG_P3C0, 0x04); - - /* Start switch */ - ret |= ksz8893m_reg_set(slave, KSZ_REG_STPID, 0x01); - - return ret; -} - -static bool board_ksz_init(void) -{ - static bool switch_is_alive = false; - - if (!switch_is_alive) { - struct spi_slave *slave = spi_setup_slave(0, 1, KSZ_MAX_HZ, SPI_MODE_3); - if (slave) { - if (!spi_claim_bus(slave)) { - bool phy_is_ksz = (ksz8893m_reg_read(slave, KSZ_REG_CHID) == 0x88); - int ret = phy_is_ksz ? ksz8893m_reset(slave) : 0; - switch_is_alive = (ret == 0); - spi_release_bus(slave); - } - spi_free_slave(slave); - } - } - - return switch_is_alive; -} - -int board_eth_init(bd_t *bis) -{ - if (KSZ_POSSIBLE) { - if (!board_ksz_init()) - return 0; - } - return bfin_EMAC_initialize(bis); -} -#endif - -int misc_init_r(void) -{ -#ifdef CONFIG_BFIN_MAC - uchar enetaddr[6]; - if (!eth_getenv_enetaddr("ethaddr", enetaddr)) - board_init_enetaddr(enetaddr); -#endif - -#ifdef CONFIG_MTD_NOR_FLASH - /* we use the last sector for the MAC address / POST LDR */ - extern flash_info_t flash_info[]; - flash_protect(FLAG_PROTECT_SET, 0x203F0000, 0x203FFFFF, &flash_info[0]); -#endif - - return 0; -} - -int board_early_init_f(void) -{ - /* connect async banks by default */ - const unsigned short pins[] = { - P_AMS2, P_AMS3, 0, - }; - return peripheral_request_list(pins, "async"); -} - -#ifdef CONFIG_BFIN_SDH -int board_mmc_init(bd_t *bis) -{ - return bfin_mmc_init(bis); -} -#endif diff --git a/board/bf525-ucr2/Kconfig b/board/bf525-ucr2/Kconfig deleted file mode 100644 index cd52daaacd..0000000000 --- a/board/bf525-ucr2/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_BF525_UCR2 - -config SYS_BOARD - default "bf525-ucr2" - -config SYS_CONFIG_NAME - default "bf525-ucr2" - -endif diff --git a/board/bf525-ucr2/MAINTAINERS b/board/bf525-ucr2/MAINTAINERS deleted file mode 100644 index f2e9575a7a..0000000000 --- a/board/bf525-ucr2/MAINTAINERS +++ /dev/null @@ -1,7 +0,0 @@ -BF525-UCR2 BOARD -M: Haitao Zhang <hzhang@ucrobotics.com> -M: Chong Huang <chuang@ucrobotics.com> -S: Maintained -F: board/bf525-ucr2/ -F: include/configs/bf525-ucr2.h -F: configs/bf525-ucr2_defconfig diff --git a/board/bf525-ucr2/Makefile b/board/bf525-ucr2/Makefile deleted file mode 100644 index 1be1d3117b..0000000000 --- a/board/bf525-ucr2/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := bf525-ucr2.o diff --git a/board/bf525-ucr2/bf525-ucr2.c b/board/bf525-ucr2/bf525-ucr2.c deleted file mode 100644 index 36a725c83b..0000000000 --- a/board/bf525-ucr2/bf525-ucr2.c +++ /dev/null @@ -1,16 +0,0 @@ -/* U-Boot - bf525-ucr2.c board specific routines - * - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> - -int checkboard(void) -{ - printf("Board: bf525-ucr2\n"); - printf("Support: http://www.ucrobotics.com/\n"); - return 0; -} diff --git a/board/bf526-ezbrd/Kconfig b/board/bf526-ezbrd/Kconfig deleted file mode 100644 index e138ea5545..0000000000 --- a/board/bf526-ezbrd/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_BF526_EZBRD - -config SYS_BOARD - default "bf526-ezbrd" - -config SYS_CONFIG_NAME - default "bf526-ezbrd" - -endif diff --git a/board/bf526-ezbrd/MAINTAINERS b/board/bf526-ezbrd/MAINTAINERS deleted file mode 100644 index f7c2d18913..0000000000 --- a/board/bf526-ezbrd/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -BF526-EZBRD BOARD -M: Sonic Zhang <sonic.adi@gmail.com> -S: Maintained -F: board/bf526-ezbrd/ -F: include/configs/bf526-ezbrd.h -F: configs/bf526-ezbrd_defconfig diff --git a/board/bf526-ezbrd/Makefile b/board/bf526-ezbrd/Makefile deleted file mode 100644 index c4882c9346..0000000000 --- a/board/bf526-ezbrd/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := bf526-ezbrd.o diff --git a/board/bf526-ezbrd/bf526-ezbrd.c b/board/bf526-ezbrd/bf526-ezbrd.c deleted file mode 100644 index ae7552081f..0000000000 --- a/board/bf526-ezbrd/bf526-ezbrd.c +++ /dev/null @@ -1,60 +0,0 @@ -/* - * U-Boot - main board file - * - * Copyright (c) 2005-2009 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <config.h> -#include <command.h> -#include <net.h> -#include <netdev.h> -#include <asm/blackfin.h> -#include <asm/mach-common/bits/otp.h> - -DECLARE_GLOBAL_DATA_PTR; - -int checkboard(void) -{ - printf("Board: ADI BF526 EZ-Board board\n"); - printf(" Support: http://blackfin.uclinux.org/\n"); - return 0; -} - -#ifdef CONFIG_BFIN_MAC -static void board_init_enetaddr(uchar *mac_addr) -{ -#ifdef CONFIG_MTD_NOR_FLASH - /* we cram the MAC in the last flash sector */ - uchar *board_mac_addr = (uchar *)0x203F0096; - if (is_valid_ethaddr(board_mac_addr)) { - memcpy(mac_addr, board_mac_addr, 6); - eth_setenv_enetaddr("ethaddr", mac_addr); - } -#endif -} - -int board_eth_init(bd_t *bis) -{ - return bfin_EMAC_initialize(bis); -} -#endif - -int misc_init_r(void) -{ -#ifdef CONFIG_BFIN_MAC - uchar enetaddr[6]; - if (!eth_getenv_enetaddr("ethaddr", enetaddr)) - board_init_enetaddr(enetaddr); -#endif - -#ifdef CONFIG_MTD_NOR_FLASH - /* we use the last sector for the MAC address / POST LDR */ - extern flash_info_t flash_info[]; - flash_protect(FLAG_PROTECT_SET, 0x203F0000, 0x203FFFFF, &flash_info[0]); -#endif - - return 0; -} diff --git a/board/bf527-ad7160-eval/Kconfig b/board/bf527-ad7160-eval/Kconfig deleted file mode 100644 index fe56241212..0000000000 --- a/board/bf527-ad7160-eval/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_BF527_AD7160_EVAL - -config SYS_BOARD - default "bf527-ad7160-eval" - -config SYS_CONFIG_NAME - default "bf527-ad7160-eval" - -endif diff --git a/board/bf527-ad7160-eval/MAINTAINERS b/board/bf527-ad7160-eval/MAINTAINERS deleted file mode 100644 index e93de1a234..0000000000 --- a/board/bf527-ad7160-eval/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -BF527-AD7160-EVAL BOARD -M: Sonic Zhang <sonic.adi@gmail.com> -S: Maintained -F: board/bf527-ad7160-eval/ -F: include/configs/bf527-ad7160-eval.h -F: configs/bf527-ad7160-eval_defconfig diff --git a/board/bf527-ad7160-eval/Makefile b/board/bf527-ad7160-eval/Makefile deleted file mode 100644 index c225f7201a..0000000000 --- a/board/bf527-ad7160-eval/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := bf527-ad7160-eval.o diff --git a/board/bf527-ad7160-eval/bf527-ad7160-eval.c b/board/bf527-ad7160-eval/bf527-ad7160-eval.c deleted file mode 100644 index 9180630ee7..0000000000 --- a/board/bf527-ad7160-eval/bf527-ad7160-eval.c +++ /dev/null @@ -1,25 +0,0 @@ -/* - * U-Boot - main board file - * - * Copyright (c) 2010 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <asm/blackfin.h> -#include <asm/mach-common/bits/pll.h> - -int checkboard(void) -{ - printf("Board: ADI BF527 AD7160-EVAL board\n"); - printf(" Support: http://blackfin.uclinux.org/\n"); - return 0; -} - -int misc_init_r(void) -{ - /* CLKIN Buffer Output Enable */ - bfin_write_VR_CTL(bfin_read_VR_CTL() | CLKBUFOE); - return 0; -} diff --git a/board/bf527-ezkit/Kconfig b/board/bf527-ezkit/Kconfig deleted file mode 100644 index df49d7a60d..0000000000 --- a/board/bf527-ezkit/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_BF527_EZKIT - -config SYS_BOARD - default "bf527-ezkit" - -config SYS_CONFIG_NAME - default "bf527-ezkit" - -endif diff --git a/board/bf527-ezkit/MAINTAINERS b/board/bf527-ezkit/MAINTAINERS deleted file mode 100644 index 7a953960d4..0000000000 --- a/board/bf527-ezkit/MAINTAINERS +++ /dev/null @@ -1,7 +0,0 @@ -BF527-EZKIT BOARD -M: Sonic Zhang <sonic.adi@gmail.com> -S: Maintained -F: board/bf527-ezkit/ -F: include/configs/bf527-ezkit.h -F: configs/bf527-ezkit_defconfig -F: configs/bf527-ezkit-v2_defconfig diff --git a/board/bf527-ezkit/Makefile b/board/bf527-ezkit/Makefile deleted file mode 100644 index 53ec9e7aa6..0000000000 --- a/board/bf527-ezkit/Makefile +++ /dev/null @@ -1,13 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := bf527-ezkit.o -obj-$(CONFIG_VIDEO) += video.o diff --git a/board/bf527-ezkit/bf527-ezkit.c b/board/bf527-ezkit/bf527-ezkit.c deleted file mode 100644 index c4f58fa3b5..0000000000 --- a/board/bf527-ezkit/bf527-ezkit.c +++ /dev/null @@ -1,72 +0,0 @@ -/* - * U-Boot - main board file - * - * Copyright (c) 2005-2009 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <config.h> -#include <command.h> -#include <net.h> -#include <netdev.h> -#include <asm/blackfin.h> -#include <asm/gpio.h> -#include <asm/mach-common/bits/otp.h> - -DECLARE_GLOBAL_DATA_PTR; - -int checkboard(void) -{ - printf("Board: ADI BF527 EZ-Kit board\n"); - printf(" Support: http://blackfin.uclinux.org/\n"); - return 0; -} - -#ifdef CONFIG_BFIN_MAC -static void board_init_enetaddr(uchar *mac_addr) -{ - /* the MAC is stored in OTP memory page 0xDF */ - uint32_t ret; - uint64_t otp_mac; - - ret = bfrom_OtpRead(0xDF, OTP_LOWER_HALF, &otp_mac); - if (!(ret & OTP_MASTER_ERROR)) { - uchar *otp_mac_p = (uchar *)&otp_mac; - - for (ret = 0; ret < 6; ++ret) - mac_addr[ret] = otp_mac_p[5 - ret]; - - if (is_valid_ethaddr(mac_addr)) - eth_setenv_enetaddr("ethaddr", mac_addr); - } -} - -int board_eth_init(bd_t *bis) -{ - return bfin_EMAC_initialize(bis); -} -#endif - -int misc_init_r(void) -{ -#ifdef CONFIG_BFIN_MAC - uchar enetaddr[6]; - if (!eth_getenv_enetaddr("ethaddr", enetaddr)) - board_init_enetaddr(enetaddr); -#endif - - return 0; -} - -#ifdef CONFIG_USB_BLACKFIN -void board_musb_init(void) -{ - /* - * BF527 EZ-KITs require PG13 to be high for HOST mode - */ - gpio_request(GPIO_PG13, "musb-vbus"); - gpio_direction_output(GPIO_PG13, 1); -} -#endif diff --git a/board/bf527-ezkit/video.c b/board/bf527-ezkit/video.c deleted file mode 100644 index a57f9fecaf..0000000000 --- a/board/bf527-ezkit/video.c +++ /dev/null @@ -1,445 +0,0 @@ -/* - * video.c - run splash screen on lcd - * - * Copyright (c) 2007-2008 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#include <stdarg.h> -#include <common.h> -#include <config.h> -#include <malloc.h> -#include <asm/blackfin.h> -#include <asm/portmux.h> -#include <asm/mach-common/bits/dma.h> -#include <spi.h> -#include <linux/types.h> -#include <stdio_dev.h> - -#include <lzma/LzmaTypes.h> -#include <lzma/LzmaDec.h> -#include <lzma/LzmaTools.h> - -#include <asm/mach-common/bits/ppi.h> -#include <asm/mach-common/bits/timer.h> - -#define LCD_X_RES 320 /* Horizontal Resolution */ -#define LCD_Y_RES 240 /* Vertical Resolution */ -#define DMA_BUS_SIZE 16 - -#include EASYLOGO_HEADER - -#ifdef CONFIG_BF527_EZKIT_REV_2_1 /* lq035q1 */ - -/* Interface 16/18-bit TFT over an 8-bit wide PPI using a - * small Programmable Logic Device (CPLD) - * http://blackfin.uclinux.org/gf/project/stamp/frs/?action=FrsReleaseBrowse&frs_package_id=165 - */ - -#ifdef CONFIG_LQ035Q1_USE_RGB565_8_BIT_PPI -#define LCD_BPP 16 /* Bit Per Pixel */ -#define CLOCKS_PPIX 2 /* Clocks per pixel */ -#define CPLD_DELAY 3 /* RGB565 pipeline delay */ -#endif - -#ifdef CONFIG_LQ035Q1_USE_RGB888_8_BIT_PPI -#define LCD_BPP 24 /* Bit Per Pixel */ -#define CLOCKS_PPIX 3 /* Clocks per pixel */ -#define CPLD_DELAY 5 /* RGB888 pipeline delay */ -#endif - -/* - * HS and VS timing parameters (all in number of PPI clk ticks) - */ - -#define H_ACTPIX (LCD_X_RES * CLOCKS_PPIX) /* active horizontal pixel */ -#define H_PERIOD (336 * CLOCKS_PPIX) /* HS period */ -#define H_PULSE (2 * CLOCKS_PPIX) /* HS pulse width */ -#define H_START (7 * CLOCKS_PPIX + CPLD_DELAY) /* first valid pixel */ - -#define U_LINE 4 /* Blanking Lines */ - -#define V_LINES (LCD_Y_RES + U_LINE) /* total vertical lines */ -#define V_PULSE (2 * CLOCKS_PPIX) /* VS pulse width (1-5 H_PERIODs) */ -#define V_PERIOD (H_PERIOD * V_LINES) /* VS period */ - -#define ACTIVE_VIDEO_MEM_OFFSET ((U_LINE / 2) * LCD_X_RES * (LCD_BPP / 8)) - -/* - * LCD Modes - */ -#define LQ035_RL (0 << 8) /* Right -> Left Scan */ -#define LQ035_LR (1 << 8) /* Left -> Right Scan */ -#define LQ035_TB (1 << 9) /* Top -> Botton Scan */ -#define LQ035_BT (0 << 9) /* Botton -> Top Scan */ -#define LQ035_BGR (1 << 11) /* Use BGR format */ -#define LQ035_RGB (0 << 11) /* Use RGB format */ -#define LQ035_NORM (1 << 13) /* Reversal */ -#define LQ035_REV (0 << 13) /* Reversal */ - -#define LQ035_INDEX 0x74 -#define LQ035_DATA 0x76 - -#define LQ035_DRIVER_OUTPUT_CTL 0x1 -#define LQ035_SHUT_CTL 0x11 - -#define LQ035_DRIVER_OUTPUT_MASK (LQ035_LR | LQ035_TB | LQ035_BGR | LQ035_REV) -#define LQ035_DRIVER_OUTPUT_DEFAULT (0x2AEF & ~LQ035_DRIVER_OUTPUT_MASK) - -#define LQ035_SHUT (1 << 0) /* Shutdown */ -#define LQ035_ON (0 << 0) /* Shutdown */ - -#ifndef CONFIG_LQ035Q1_LCD_MODE -#define CONFIG_LQ035Q1_LCD_MODE (LQ035_NORM | LQ035_RL | LQ035_TB | LQ035_BGR) -#endif - -#else /* t350mcqb */ - -#define LCD_BPP 24 /* Bit Per Pixel */ -#define CLOCKS_PPIX 3 /* Clocks per pixel */ - -/* HS and VS timing parameters (all in number of PPI clk ticks) */ -#define H_ACTPIX (LCD_X_RES * CLOCKS_PPIX) /* active horizontal pixel */ -#define H_PERIOD (408 * CLOCKS_PPIX) /* HS period */ -#define H_PULSE 90 /* HS pulse width */ -#define H_START 204 /* first valid pixel */ - -#define U_LINE 1 /* Blanking Lines */ - -#define V_LINES (LCD_Y_RES + U_LINE) /* total vertical lines */ -#define V_PULSE (3 * H_PERIOD) /* VS pulse width (1-5 H_PERIODs) */ -#define V_PERIOD (H_PERIOD * V_LINES) /* VS period */ - -#define ACTIVE_VIDEO_MEM_OFFSET (U_LINE * H_ACTPIX) -#endif - -#define LCD_PIXEL_SIZE (LCD_BPP / 8) -#define DMA_SIZE16 2 - -#define PPI_TX_MODE 0x2 -#define PPI_XFER_TYPE_11 0xC -#define PPI_PORT_CFG_01 0x10 -#define PPI_PACK_EN 0x80 -#define PPI_POLS_1 0x8000 - -#ifdef CONFIG_BF527_EZKIT_REV_2_1 -static struct spi_slave *slave; -static int lq035q1_control(unsigned char reg, unsigned short value) -{ - int ret; - u8 regs[3] = {LQ035_INDEX, 0, 0}; - u8 data[3] = {LQ035_DATA, 0, 0}; - u8 dummy[3]; - - regs[2] = reg; - data[1] = value >> 8; - data[2] = value & 0xFF; - - if (!slave) { - /* FIXME: Verify the max SCK rate */ - slave = spi_setup_slave(CONFIG_LQ035Q1_SPI_BUS, - CONFIG_LQ035Q1_SPI_CS, 20000000, - SPI_MODE_3); - if (!slave) - return -1; - } - - if (spi_claim_bus(slave)) - return -1; - - ret = spi_xfer(slave, 24, regs, dummy, SPI_XFER_BEGIN | SPI_XFER_END); - ret |= spi_xfer(slave, 24, data, dummy, SPI_XFER_BEGIN | SPI_XFER_END); - - spi_release_bus(slave); - - return ret; -} -#endif - -/* enable and disable PPI functions */ -void EnablePPI(void) -{ - bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() | PORT_EN); -} - -void DisablePPI(void) -{ - bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() & ~PORT_EN); -} - -void Init_Ports(void) -{ - const unsigned short pins[] = { - P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3, P_PPI0_D4, - P_PPI0_D5, P_PPI0_D6, P_PPI0_D7, P_PPI0_FS2, 0, - }; - peripheral_request_list(pins, "lcd"); -} - -void Init_PPI(void) -{ - - bfin_write_PPI_DELAY(H_START); - bfin_write_PPI_COUNT(H_ACTPIX - 1); - bfin_write_PPI_FRAME(V_LINES); - - /* PPI control, to be replaced with definitions */ - bfin_write_PPI_CONTROL( - PPI_TX_MODE | /* output mode , PORT_DIR */ - PPI_XFER_TYPE_11 | /* sync mode XFR_TYPE */ - PPI_PORT_CFG_01 | /* two frame sync PORT_CFG */ - PPI_PACK_EN | /* packing enabled PACK_EN */ - PPI_POLS_1 /* faling edge syncs POLS */ - ); -} - -void Init_DMA(void *dst) -{ - bfin_write_DMA0_START_ADDR(dst); - - /* X count */ - bfin_write_DMA0_X_COUNT(H_ACTPIX / 2); - bfin_write_DMA0_X_MODIFY(DMA_BUS_SIZE / 8); - - /* Y count */ - bfin_write_DMA0_Y_COUNT(V_LINES); - bfin_write_DMA0_Y_MODIFY(DMA_BUS_SIZE / 8); - - /* DMA Config */ - bfin_write_DMA0_CONFIG( - WDSIZE_16 | /* 16 bit DMA */ - DMA2D | /* 2D DMA */ - FLOW_AUTO /* autobuffer mode */ - ); -} - -void EnableDMA(void) -{ - bfin_write_DMA0_CONFIG(bfin_read_DMA0_CONFIG() | DMAEN); -} - -void DisableDMA(void) -{ - bfin_write_DMA0_CONFIG(bfin_read_DMA0_CONFIG() & ~DMAEN); -} - -/* Init TIMER0 as Frame Sync 1 generator */ -void InitTIMER0(void) -{ - bfin_write_TIMER_DISABLE(TIMDIS0); /* disable Timer */ - SSYNC(); - bfin_write_TIMER_STATUS(TIMIL0 | TOVF_ERR0 | TRUN0); /* clear status */ - SSYNC(); - - bfin_write_TIMER0_PERIOD(H_PERIOD); - SSYNC(); - bfin_write_TIMER0_WIDTH(H_PULSE); - SSYNC(); - - bfin_write_TIMER0_CONFIG( - PWM_OUT | - PERIOD_CNT | - TIN_SEL | - CLK_SEL | - EMU_RUN - ); - SSYNC(); -} - -void EnableTIMER0(void) -{ - bfin_write_TIMER_ENABLE(TIMEN0); - SSYNC(); -} - -void DisableTIMER0(void) -{ - bfin_write_TIMER_DISABLE(TIMDIS0); - SSYNC(); -} - - -void InitTIMER1(void) -{ - bfin_write_TIMER_DISABLE(TIMDIS1); /* disable Timer */ - SSYNC(); - bfin_write_TIMER_STATUS(TIMIL1 | TOVF_ERR1 | TRUN1); /* clear status */ - SSYNC(); - - bfin_write_TIMER1_PERIOD(V_PERIOD); - SSYNC(); - bfin_write_TIMER1_WIDTH(V_PULSE); - SSYNC(); - - bfin_write_TIMER1_CONFIG( - PWM_OUT | - PERIOD_CNT | - TIN_SEL | - CLK_SEL | - EMU_RUN - ); - SSYNC(); -} - -void EnableTIMER1(void) -{ - bfin_write_TIMER_ENABLE(TIMEN1); - SSYNC(); -} - -void DisableTIMER1(void) -{ - bfin_write_TIMER_DISABLE(TIMDIS1); - SSYNC(); -} - -void EnableTIMER12(void) -{ - bfin_write_TIMER_ENABLE(TIMEN1 | TIMEN0); - SSYNC(); -} - -int video_init(void *dst) -{ - -#ifdef CONFIG_BF527_EZKIT_REV_2_1 - lq035q1_control(LQ035_SHUT_CTL, LQ035_ON); - lq035q1_control(LQ035_DRIVER_OUTPUT_CTL, (CONFIG_LQ035Q1_LCD_MODE & - LQ035_DRIVER_OUTPUT_MASK) | LQ035_DRIVER_OUTPUT_DEFAULT); -#endif - Init_Ports(); - Init_DMA(dst); - EnableDMA(); - InitTIMER0(); - InitTIMER1(); - Init_PPI(); - EnablePPI(); - -#ifdef CONFIG_BF527_EZKIT_REV_2_1 - EnableTIMER12(); -#else - /* Frame sync 2 (VS) needs to start at least one PPI clk earlier */ - EnableTIMER1(); - /* Add Some Delay ... */ - SSYNC(); - SSYNC(); - SSYNC(); - SSYNC(); - - /* now start frame sync 1 */ - EnableTIMER0(); -#endif - - return 0; -} - -static void dma_bitblit(void *dst, fastimage_t *logo, int x, int y) -{ - if (dcache_status()) - blackfin_dcache_flush_range(logo->data, logo->data + logo->size); - - bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); - - /* Setup destination start address */ - bfin_write_MDMA_D0_START_ADDR(dst + ((x & -2) * LCD_PIXEL_SIZE) - + (y * LCD_X_RES * LCD_PIXEL_SIZE)); - /* Setup destination xcount */ - bfin_write_MDMA_D0_X_COUNT(logo->width * LCD_PIXEL_SIZE / DMA_SIZE16); - /* Setup destination xmodify */ - bfin_write_MDMA_D0_X_MODIFY(DMA_SIZE16); - - /* Setup destination ycount */ - bfin_write_MDMA_D0_Y_COUNT(logo->height); - /* Setup destination ymodify */ - bfin_write_MDMA_D0_Y_MODIFY((LCD_X_RES - logo->width) * LCD_PIXEL_SIZE + DMA_SIZE16); - - - /* Setup Source start address */ - bfin_write_MDMA_S0_START_ADDR(logo->data); - /* Setup Source xcount */ - bfin_write_MDMA_S0_X_COUNT(logo->width * LCD_PIXEL_SIZE / DMA_SIZE16); - /* Setup Source xmodify */ - bfin_write_MDMA_S0_X_MODIFY(DMA_SIZE16); - - /* Setup Source ycount */ - bfin_write_MDMA_S0_Y_COUNT(logo->height); - /* Setup Source ymodify */ - bfin_write_MDMA_S0_Y_MODIFY(DMA_SIZE16); - - - /* Enable source DMA */ - bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_16 | DMA2D); - SSYNC(); - bfin_write_MDMA_D0_CONFIG(WNR | DMAEN | WDSIZE_16 | DMA2D); - - while (bfin_read_MDMA_D0_IRQ_STATUS() & DMA_RUN); - - bfin_write_MDMA_S0_IRQ_STATUS(bfin_read_MDMA_S0_IRQ_STATUS() | DMA_DONE | DMA_ERR); - bfin_write_MDMA_D0_IRQ_STATUS(bfin_read_MDMA_D0_IRQ_STATUS() | DMA_DONE | DMA_ERR); - -} - -void video_stop(void) -{ - DisablePPI(); - DisableDMA(); - DisableTIMER0(); - DisableTIMER1(); -#ifdef CONFIG_BF527_EZKIT_REV_2_1 - lq035q1_control(LQ035_SHUT_CTL, LQ035_SHUT); -#endif -} - -int drv_video_init(void) -{ - int error, devices = 1; - struct stdio_dev videodev; - - u8 *dst; - u32 fbmem_size = LCD_X_RES * LCD_Y_RES * LCD_PIXEL_SIZE + ACTIVE_VIDEO_MEM_OFFSET; - - dst = malloc(fbmem_size); - - if (dst == NULL) { - printf("Failed to alloc FB memory\n"); - return -1; - } - -#ifdef EASYLOGO_ENABLE_GZIP - unsigned char *data = EASYLOGO_DECOMP_BUFFER; - unsigned long src_len = EASYLOGO_ENABLE_GZIP; - error = gunzip(data, bfin_logo.size, bfin_logo.data, &src_len); - bfin_logo.data = data; -#elif defined(EASYLOGO_ENABLE_LZMA) - unsigned char *data = EASYLOGO_DECOMP_BUFFER; - SizeT lzma_len = bfin_logo.size; - error = lzmaBuffToBuffDecompress(data, &lzma_len, - bfin_logo.data, EASYLOGO_ENABLE_LZMA); - bfin_logo.data = data; -#else - error = 0; -#endif - - if (error) { - puts("Failed to decompress logo\n"); - free(dst); - return -1; - } - - memset(dst + ACTIVE_VIDEO_MEM_OFFSET, bfin_logo.data[0], fbmem_size - ACTIVE_VIDEO_MEM_OFFSET); - - dma_bitblit(dst + ACTIVE_VIDEO_MEM_OFFSET, &bfin_logo, - (LCD_X_RES - bfin_logo.width) / 2, - (LCD_Y_RES - bfin_logo.height) / 2); - - video_init(dst); /* Video initialization */ - - memset(&videodev, 0, sizeof(videodev)); - - strcpy(videodev.name, "video"); - - error = stdio_register(&videodev); - - return (error == 0) ? devices : error; -} diff --git a/board/bf527-sdp/Kconfig b/board/bf527-sdp/Kconfig deleted file mode 100644 index 928bd776b9..0000000000 --- a/board/bf527-sdp/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_BF527_SDP - -config SYS_BOARD - default "bf527-sdp" - -config SYS_CONFIG_NAME - default "bf527-sdp" - -endif diff --git a/board/bf527-sdp/MAINTAINERS b/board/bf527-sdp/MAINTAINERS deleted file mode 100644 index 32ccfc5e90..0000000000 --- a/board/bf527-sdp/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -BF527-SDP BOARD -M: Sonic Zhang <sonic.adi@gmail.com> -S: Maintained -F: board/bf527-sdp/ -F: include/configs/bf527-sdp.h -F: configs/bf527-sdp_defconfig diff --git a/board/bf527-sdp/Makefile b/board/bf527-sdp/Makefile deleted file mode 100644 index 77acb423a5..0000000000 --- a/board/bf527-sdp/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := bf527-sdp.o diff --git a/board/bf527-sdp/bf527-sdp.c b/board/bf527-sdp/bf527-sdp.c deleted file mode 100644 index 0c6094b1e4..0000000000 --- a/board/bf527-sdp/bf527-sdp.c +++ /dev/null @@ -1,32 +0,0 @@ -/* - * U-Boot - main board file - * - * Copyright (c) 2010 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <asm/blackfin.h> -#include <asm/gpio.h> -#include <asm/mach-common/bits/pll.h> - -int checkboard(void) -{ - printf("Board: ADI BF527 SDP board\n"); - printf(" Support: http://blackfin.uclinux.org/\n"); - - /* Enable access to parallel flash */ - gpio_request(GPIO_PG0, "parallel-flash"); - gpio_direction_output(GPIO_PG0, 0); - - return 0; -} - -int misc_init_r(void) -{ - /* CLKIN Buffer Output Enable */ - bfin_write_VR_CTL(bfin_read_VR_CTL() | CLKBUFOE); - - return 0; -} diff --git a/board/bf527-sdp/config.mk b/board/bf527-sdp/config.mk deleted file mode 100644 index 1d46cfcd48..0000000000 --- a/board/bf527-sdp/config.mk +++ /dev/null @@ -1,11 +0,0 @@ -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -# Set some default LDR flags based on boot mode. -LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 6 diff --git a/board/bf533-ezkit/Kconfig b/board/bf533-ezkit/Kconfig deleted file mode 100644 index 555ab298f2..0000000000 --- a/board/bf533-ezkit/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_BF533_EZKIT - -config SYS_BOARD - default "bf533-ezkit" - -config SYS_CONFIG_NAME - default "bf533-ezkit" - -endif diff --git a/board/bf533-ezkit/MAINTAINERS b/board/bf533-ezkit/MAINTAINERS deleted file mode 100644 index bfa7c3cb29..0000000000 --- a/board/bf533-ezkit/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -BF533-EZKIT BOARD -M: Sonic Zhang <sonic.adi@gmail.com> -S: Maintained -F: board/bf533-ezkit/ -F: include/configs/bf533-ezkit.h -F: configs/bf533-ezkit_defconfig diff --git a/board/bf533-ezkit/Makefile b/board/bf533-ezkit/Makefile deleted file mode 100644 index bf7a2c4477..0000000000 --- a/board/bf533-ezkit/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) 2005-2007 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := bf533-ezkit.o flash.o diff --git a/board/bf533-ezkit/bf533-ezkit.c b/board/bf533-ezkit/bf533-ezkit.c deleted file mode 100644 index 6879319a70..0000000000 --- a/board/bf533-ezkit/bf533-ezkit.c +++ /dev/null @@ -1,44 +0,0 @@ -/* - * U-Boot - main board file - * - * Copyright (c) 2005-2008 Analog Devices Inc. - * - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <netdev.h> -#include "psd4256.h" -#include "flash-defines.h" - -DECLARE_GLOBAL_DATA_PTR; - -int checkboard(void) -{ - printf("Board: ADI BF533 EZ-Kit Lite board\n"); - printf(" Support: http://blackfin.uclinux.org/\n"); - return 0; -} - -/* miscellaneous platform dependent initialisations */ -int misc_init_r(void) -{ - /* Set direction bits for Video en/decoder reset as output */ - *(volatile unsigned char *)(CONFIG_SYS_FLASH1_BASE + PSD_PORTA_DIR) = - PSDA_VDEC_RST | PSDA_VENC_RST; - /* Deactivate Video en/decoder reset lines */ - *(volatile unsigned char *)(CONFIG_SYS_FLASH1_BASE + PSD_PORTA_DOUT) = - PSDA_VDEC_RST | PSDA_VENC_RST; - - return 0; -} - -#ifdef CONFIG_SMC91111 -int board_eth_init(bd_t *bis) -{ - return smc91111_initialize(0, CONFIG_SMC91111_BASE); -} -#endif diff --git a/board/bf533-ezkit/config.mk b/board/bf533-ezkit/config.mk deleted file mode 100644 index 7f9138b09b..0000000000 --- a/board/bf533-ezkit/config.mk +++ /dev/null @@ -1,11 +0,0 @@ -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -# Set some default LDR flags based on boot mode. -LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8 diff --git a/board/bf533-ezkit/flash-defines.h b/board/bf533-ezkit/flash-defines.h deleted file mode 100644 index 7822a9dfd7..0000000000 --- a/board/bf533-ezkit/flash-defines.h +++ /dev/null @@ -1,106 +0,0 @@ -/* - * U-Boot - flash-defines.h - * - * Copyright (c) 2005-2007 Analog Devices Inc. - * - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __FLASHDEFINES_H__ -#define __FLASHDEFINES_H__ - -#include <common.h> - -#define V_ULONG(a) (*(volatile unsigned long *)( a )) -#define V_BYTE(a) (*(volatile unsigned char *)( a )) -#define BUFFER_SIZE 0x80000 -#define NO_COMMAND 0 -#define GET_CODES 1 -#define RESET 2 -#define WRITE 3 -#define FILL 4 -#define ERASE_ALL 5 -#define ERASE_SECT 6 -#define READ 7 -#define GET_SECTNUM 8 -#define FLASH_START_L 0x0000 -#define FLASH_START_H 0x2000 -#define FLASH_TOT_SECT 40 -#define FLASH_SIZE 0x220000 -#define FLASH_MAN_ST 2 -#define CONFIG_SYS_FLASH0_BASE 0x20000000 -#define CONFIG_SYS_FLASH1_BASE 0x20200000 -#define RESET_VAL 0xF0 - -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; - -int get_codes(void); -int poll_toggle_bit(long lOffset); -void reset_flash(void); -int erase_flash(void); -int erase_block_flash(int, unsigned long); -void unlock_flash(long lOffset); -int write_data(long lStart, long lCount, uchar *pnData); -int FillData(long lStart, long lCount, long lStride, int *pnData); -int read_data(long lStart, long lCount, long lStride, int *pnData); -int read_flash(long nOffset, int *pnValue); -int write_flash(long nOffset, int nValue); -void get_sector_number(long lOffset, int *pnSector); -int GetSectorProtectionStatus(flash_info_t * info, int nSector); -int GetOffset(int nBlock); - -#define WRITESEQ1 0x0AAA -#define WRITESEQ2 0x0554 -#define WRITESEQ3 0x0AAA -#define WRITESEQ4 0x0AAA -#define WRITESEQ5 0x0554 -#define WRITESEQ6 0x0AAA -#define WRITEDATA1 0xaa -#define WRITEDATA2 0x55 -#define WRITEDATA3 0x80 -#define WRITEDATA4 0xaa -#define WRITEDATA5 0x55 -#define WRITEDATA6 0x10 -#define PriFlashABegin 0 -#define SecFlashABegin 32 -#define SecFlashBBegin 36 -#define PriFlashAOff 0x0 -#define PriFlashBOff 0x100000 -#define SecFlashAOff 0x200000 -#define SecFlashBOff 0x280000 -#define INVALIDLOCNSTART 0x20270000 -#define INVALIDLOCNEND 0x20280000 -#define BlockEraseVal 0x30 -#define UNLOCKDATA1 0xaa -#define UNLOCKDATA2 0x55 -#define UNLOCKDATA3 0xa0 -#define GETCODEDATA1 0xaa -#define GETCODEDATA2 0x55 -#define GETCODEDATA3 0x90 -#define SecFlashASec1Off 0x200000 -#define SecFlashASec2Off 0x204000 -#define SecFlashASec3Off 0x206000 -#define SecFlashASec4Off 0x208000 -#define SecFlashAEndOff 0x210000 -#define SecFlashBSec1Off 0x280000 -#define SecFlashBSec2Off 0x284000 -#define SecFlashBSec3Off 0x286000 -#define SecFlashBSec4Off 0x288000 -#define SecFlashBEndOff 0x290000 - -#define SECT32 32 -#define SECT33 33 -#define SECT34 34 -#define SECT35 35 -#define SECT36 36 -#define SECT37 37 -#define SECT38 38 -#define SECT39 39 - -#define FLASH_SUCCESS 0 -#define FLASH_FAIL -1 - -#endif diff --git a/board/bf533-ezkit/flash.c b/board/bf533-ezkit/flash.c deleted file mode 100644 index a7b3519d95..0000000000 --- a/board/bf533-ezkit/flash.c +++ /dev/null @@ -1,473 +0,0 @@ -/* - * U-Boot - flash.c Flash driver for PSD4256GV - * - * Copyright (c) 2005-2007 Analog Devices Inc. - * This file is based on BF533EzFlash.c originally written by Analog Devices, Inc. - * - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <asm/io.h> -#include "flash-defines.h" - -int AFP_NumSectors = 40; -long AFP_SectorSize1 = 0x10000; -int AFP_SectorSize2 = 0x4000; - -void flash_reset(void) -{ - reset_flash(); -} - -unsigned long flash_get_size(ulong baseaddr, flash_info_t * info, int bank_flag) -{ - int id = 0, i = 0; - static int FlagDev = 1; - - id = get_codes(); - if (FlagDev) { -#ifdef DEBUG - printf("Device ID of the Flash is %x\n", id); -#endif - FlagDev = 0; - } - info->flash_id = id; - - switch (bank_flag) { - case 0: - for (i = PriFlashABegin; i < SecFlashABegin; i++) - info->start[i] = (baseaddr + (i * AFP_SectorSize1)); - info->size = 0x200000; - info->sector_count = 32; - break; - case 1: - info->start[0] = baseaddr + SecFlashASec1Off; - info->start[1] = baseaddr + SecFlashASec2Off; - info->start[2] = baseaddr + SecFlashASec3Off; - info->start[3] = baseaddr + SecFlashASec4Off; - info->size = 0x10000; - info->sector_count = 4; - break; - case 2: - info->start[0] = baseaddr + SecFlashBSec1Off; - info->start[1] = baseaddr + SecFlashBSec2Off; - info->start[2] = baseaddr + SecFlashBSec3Off; - info->start[3] = baseaddr + SecFlashBSec4Off; - info->size = 0x10000; - info->sector_count = 4; - break; - } - return (info->size); -} - -unsigned long flash_init(void) -{ - unsigned long size_b0, size_b1, size_b2; - int i; - - size_b0 = size_b1 = size_b2 = 0; -#ifdef DEBUG - printf("Flash Memory Start 0x%x\n", CONFIG_SYS_FLASH_BASE); - printf("Memory Map for the Flash\n"); - printf("0x20000000 - 0x200FFFFF Flash A Primary (1MB)\n"); - printf("0x20100000 - 0x201FFFFF Flash B Primary (1MB)\n"); - printf("0x20200000 - 0x2020FFFF Flash A Secondary (64KB)\n"); - printf("0x20280000 - 0x2028FFFF Flash B Secondary (64KB)\n"); - printf("Please type command flinfo for information on Sectors \n"); -#endif - for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) { - flash_info[i].flash_id = FLASH_UNKNOWN; - } - - size_b0 = flash_get_size(CONFIG_SYS_FLASH0_BASE, &flash_info[0], 0); - size_b1 = flash_get_size(CONFIG_SYS_FLASH0_BASE, &flash_info[1], 1); - size_b2 = flash_get_size(CONFIG_SYS_FLASH0_BASE, &flash_info[2], 2); - - if (flash_info[0].flash_id == FLASH_UNKNOWN || size_b0 == 0) { - printf("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", - size_b0, size_b0 >> 20); - } - - (void)flash_protect(FLAG_PROTECT_SET, CONFIG_SYS_FLASH0_BASE, - (flash_info[0].start[2] - 1), &flash_info[0]); - - return (size_b0 + size_b1 + size_b2); -} - -void flash_print_info(flash_info_t * info) -{ - int i; - - if (info->flash_id == FLASH_UNKNOWN) { - printf("missing or unknown FLASH type\n"); - return; - } - - switch (info->flash_id) { - case FLASH_PSD4256GV: - printf("ST Microelectronics "); - break; - default: - printf("Unknown Vendor: (0x%08lX) ", info->flash_id); - break; - } - for (i = 0; i < info->sector_count; ++i) { - if ((i % 5) == 0) - printf("\n "); - printf(" %08lX%s", - info->start[i], info->protect[i] ? " (RO)" : " "); - } - printf("\n"); - return; -} - -int flash_erase(flash_info_t * info, int s_first, int s_last) -{ - int cnt = 0, i; - int prot, sect; - - prot = 0; - for (sect = s_first; sect <= s_last; ++sect) { - if (info->protect[sect]) - prot++; - } - - if (prot) - printf("- Warning: %d protected sectors will not be erased!\n", - prot); - else - printf("\n"); - - cnt = s_last - s_first + 1; - - if (cnt == FLASH_TOT_SECT) { - printf("Erasing flash, Please Wait \n"); - if (erase_flash() < 0) { - printf("Erasing flash failed \n"); - return FLASH_FAIL; - } - } else { - printf("Erasing Flash locations, Please Wait\n"); - for (i = s_first; i <= s_last; i++) { - if (info->protect[i] == 0) { /* not protected */ - if (erase_block_flash(i, info->start[i]) < 0) { - printf("Error Sector erasing \n"); - return FLASH_FAIL; - } - } - } - } - return FLASH_SUCCESS; -} - -int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt) -{ - int ret; - int d; - if (addr % 2) { - read_flash(addr - 1 - CONFIG_SYS_FLASH_BASE, &d); - d = (int)((d & 0x00FF) | (*src++ << 8)); - ret = write_data(addr - 1, 2, (uchar *) & d); - if (ret == FLASH_FAIL) - return ERR_NOT_ERASED; - ret = write_data(addr + 1, cnt - 1, src); - } else - ret = write_data(addr, cnt, src); - if (ret == FLASH_FAIL) - return ERR_NOT_ERASED; - return FLASH_SUCCESS; -} - -int write_data(long lStart, long lCount, uchar * pnData) -{ - long i = 0; - unsigned long ulOffset = lStart - CONFIG_SYS_FLASH_BASE; - int d; - int nSector = 0; - int flag = 0; - - if (lCount % 2) { - flag = 1; - lCount = lCount - 1; - } - - for (i = 0; i < lCount - 1; i += 2, ulOffset += 2) { - get_sector_number(ulOffset, &nSector); - read_flash(ulOffset, &d); - if (d != 0xffff) { - printf - ("Flash not erased at offset 0x%lx Please erase to reprogram\n", - ulOffset); - return FLASH_FAIL; - } - unlock_flash(ulOffset); - d = (int)(pnData[i] | pnData[i + 1] << 8); - write_flash(ulOffset, d); - if (poll_toggle_bit(ulOffset) < 0) { - printf("Error programming the flash \n"); - return FLASH_FAIL; - } - if ((i > 0) && (!(i % AFP_SectorSize2))) - printf("."); - } - if (flag) { - get_sector_number(ulOffset, &nSector); - read_flash(ulOffset, &d); - if (d != 0xffff) { - printf - ("Flash not erased at offset 0x%lx Please erase to reprogram\n", - ulOffset); - return FLASH_FAIL; - } - unlock_flash(ulOffset); - d = (int)(pnData[i] | (d & 0xFF00)); - write_flash(ulOffset, d); - if (poll_toggle_bit(ulOffset) < 0) { - printf("Error programming the flash \n"); - return FLASH_FAIL; - } - } - return FLASH_SUCCESS; -} - -int read_data(long ulStart, long lCount, long lStride, int *pnData) -{ - long i = 0; - int j = 0; - long ulOffset = ulStart; - int iShift = 0; - int iNumWords = 2; - int nLeftover = lCount % 4; - int nHi, nLow; - int nSector = 0; - - for (i = 0; (i < lCount / 4) && (i < BUFFER_SIZE); i++) { - for (iShift = 0, j = 0; j < iNumWords; j += 2) { - if ((ulOffset >= INVALIDLOCNSTART) - && (ulOffset < INVALIDLOCNEND)) - return FLASH_FAIL; - - get_sector_number(ulOffset, &nSector); - read_flash(ulOffset, &nLow); - ulOffset += (lStride * 2); - read_flash(ulOffset, &nHi); - ulOffset += (lStride * 2); - pnData[i] = (nHi << 16) | nLow; - } - } - if (nLeftover > 0) { - if ((ulOffset >= INVALIDLOCNSTART) - && (ulOffset < INVALIDLOCNEND)) - return FLASH_FAIL; - - get_sector_number(ulOffset, &nSector); - read_flash(ulOffset, &pnData[i]); - } - return FLASH_SUCCESS; -} - -int write_flash(long nOffset, int nValue) -{ - long addr; - - addr = (CONFIG_SYS_FLASH_BASE + nOffset); - SSYNC(); - *(unsigned volatile short *)addr = nValue; - SSYNC(); - if (poll_toggle_bit(nOffset) < 0) - return FLASH_FAIL; - return FLASH_SUCCESS; -} - -int read_flash(long nOffset, int *pnValue) -{ - int nValue = 0x0; - long addr = (CONFIG_SYS_FLASH_BASE + nOffset); - - if (nOffset != 0x2) - reset_flash(); - SSYNC(); - nValue = *(volatile unsigned short *)addr; - SSYNC(); - *pnValue = nValue; - return true; -} - -int poll_toggle_bit(long lOffset) -{ - unsigned int u1, u2; - unsigned long timeout = 0xFFFFFFFF; - volatile unsigned long *FB = - (volatile unsigned long *)(0x20000000 + lOffset); - while (1) { - if (timeout < 0) - break; - u1 = *(volatile unsigned short *)FB; - u2 = *(volatile unsigned short *)FB; - if ((u1 & 0x0040) == (u2 & 0x0040)) - return FLASH_SUCCESS; - if ((u2 & 0x0020) == 0x0000) - continue; - u1 = *(volatile unsigned short *)FB; - if ((u2 & 0x0040) == (u1 & 0x0040)) - return FLASH_SUCCESS; - else { - reset_flash(); - return FLASH_FAIL; - } - timeout--; - } - printf("Time out occurred \n"); - if (timeout < 0) - return FLASH_FAIL; -} - -void reset_flash(void) -{ - write_flash(WRITESEQ1, RESET_VAL); - /* Wait for 10 micro seconds */ - udelay(10); -} - -int erase_flash(void) -{ - write_flash(WRITESEQ1, WRITEDATA1); - write_flash(WRITESEQ2, WRITEDATA2); - write_flash(WRITESEQ3, WRITEDATA3); - write_flash(WRITESEQ4, WRITEDATA4); - write_flash(WRITESEQ5, WRITEDATA5); - write_flash(WRITESEQ6, WRITEDATA6); - - if (poll_toggle_bit(0x0000) < 0) - return FLASH_FAIL; - - write_flash(SecFlashAOff + WRITESEQ1, WRITEDATA1); - write_flash(SecFlashAOff + WRITESEQ2, WRITEDATA2); - write_flash(SecFlashAOff + WRITESEQ3, WRITEDATA3); - write_flash(SecFlashAOff + WRITESEQ4, WRITEDATA4); - write_flash(SecFlashAOff + WRITESEQ5, WRITEDATA5); - write_flash(SecFlashAOff + WRITESEQ6, WRITEDATA6); - - if (poll_toggle_bit(SecFlashASec1Off) < 0) - return FLASH_FAIL; - - write_flash(PriFlashBOff + WRITESEQ1, WRITEDATA1); - write_flash(PriFlashBOff + WRITESEQ2, WRITEDATA2); - write_flash(PriFlashBOff + WRITESEQ3, WRITEDATA3); - write_flash(PriFlashBOff + WRITESEQ4, WRITEDATA4); - write_flash(PriFlashBOff + WRITESEQ5, WRITEDATA5); - write_flash(PriFlashBOff + WRITESEQ6, WRITEDATA6); - - if (poll_toggle_bit(PriFlashBOff) < 0) - return FLASH_FAIL; - - write_flash(SecFlashBOff + WRITESEQ1, WRITEDATA1); - write_flash(SecFlashBOff + WRITESEQ2, WRITEDATA2); - write_flash(SecFlashBOff + WRITESEQ3, WRITEDATA3); - write_flash(SecFlashBOff + WRITESEQ4, WRITEDATA4); - write_flash(SecFlashBOff + WRITESEQ5, WRITEDATA5); - write_flash(SecFlashBOff + WRITESEQ6, WRITEDATA6); - - if (poll_toggle_bit(SecFlashBOff) < 0) - return FLASH_FAIL; - - return FLASH_SUCCESS; -} - -int erase_block_flash(int nBlock, unsigned long address) -{ - long ulSectorOff = 0x0; - - if ((nBlock < 0) || (nBlock > AFP_NumSectors)) - return false; - - ulSectorOff = (address - CONFIG_SYS_FLASH_BASE); - - write_flash((WRITESEQ1 | ulSectorOff), WRITEDATA1); - write_flash((WRITESEQ2 | ulSectorOff), WRITEDATA2); - write_flash((WRITESEQ3 | ulSectorOff), WRITEDATA3); - write_flash((WRITESEQ4 | ulSectorOff), WRITEDATA4); - write_flash((WRITESEQ5 | ulSectorOff), WRITEDATA5); - - write_flash(ulSectorOff, BlockEraseVal); - - if (poll_toggle_bit(ulSectorOff) < 0) - return FLASH_FAIL; - - return FLASH_SUCCESS; -} - -void unlock_flash(long ulOffset) -{ - unsigned long ulOffsetAddr = ulOffset; - ulOffsetAddr &= 0xFFFF0000; - - write_flash((WRITESEQ1 | ulOffsetAddr), UNLOCKDATA1); - write_flash((WRITESEQ2 | ulOffsetAddr), UNLOCKDATA2); - write_flash((WRITESEQ3 | ulOffsetAddr), UNLOCKDATA3); -} - -int get_codes() -{ - int dev_id = 0; - - write_flash(WRITESEQ1, GETCODEDATA1); - write_flash(WRITESEQ2, GETCODEDATA2); - write_flash(WRITESEQ3, GETCODEDATA3); - - read_flash(0x0002, &dev_id); - dev_id &= 0x00FF; - - reset_flash(); - - return dev_id; -} - -void get_sector_number(long ulOffset, int *pnSector) -{ - int nSector = 0; - - if (ulOffset >= SecFlashAOff) { - if ((ulOffset < SecFlashASec1Off) - && (ulOffset < SecFlashASec2Off)) { - nSector = SECT32; - } else if ((ulOffset >= SecFlashASec2Off) - && (ulOffset < SecFlashASec3Off)) { - nSector = SECT33; - } else if ((ulOffset >= SecFlashASec3Off) - && (ulOffset < SecFlashASec4Off)) { - nSector = SECT34; - } else if ((ulOffset >= SecFlashASec4Off) - && (ulOffset < SecFlashAEndOff)) { - nSector = SECT35; - } - } else if (ulOffset >= SecFlashBOff) { - if ((ulOffset < SecFlashBSec1Off) - && (ulOffset < SecFlashBSec2Off)) { - nSector = SECT36; - } - if ((ulOffset < SecFlashBSec2Off) - && (ulOffset < SecFlashBSec3Off)) { - nSector = SECT37; - } - if ((ulOffset < SecFlashBSec3Off) - && (ulOffset < SecFlashBSec4Off)) { - nSector = SECT38; - } - if ((ulOffset < SecFlashBSec4Off) - && (ulOffset < SecFlashBEndOff)) { - nSector = SECT39; - } - } else if ((ulOffset >= PriFlashAOff) && (ulOffset < SecFlashAOff)) { - nSector = ulOffset & 0xffff0000; - nSector = ulOffset >> 16; - nSector = nSector & 0x000ff; - } - - if ((nSector >= 0) && (nSector < AFP_NumSectors)) { - *pnSector = nSector; - } -} diff --git a/board/bf533-ezkit/psd4256.h b/board/bf533-ezkit/psd4256.h deleted file mode 100644 index 925669644e..0000000000 --- a/board/bf533-ezkit/psd4256.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * U-Boot - psd4256.h - * - * Copyright (c) 2005-2007 Analog Devices Inc. - * - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/* - * Flash A/B Port A configuration registers. - * Addresses are offset values to CONFIG_SYS_FLASH1_BASE - * for Flash A and CONFIG_SYS_FLASH2_BASE for Flash B. - */ - -#define PSD_PORTA_DIN 0x070000 -#define PSD_PORTA_DOUT 0x070004 -#define PSD_PORTA_DIR 0x070006 - -/* - * Flash A/B Port B configuration registers - * Addresses are offset values to CONFIG_SYS_FLASH1_BASE - * for Flash A and CONFIG_SYS_FLASH2_BASE for Flash B. - */ - -#define PSD_PORTB_DIN 0x070001 -#define PSD_PORTB_DOUT 0x070005 -#define PSD_PORTB_DIR 0x070007 - -/* - * Flash A Port A Bit definitions - */ - -#define PSDA_PPICLK1 0x20 /* PPI Clock select bit 1 */ -#define PSDA_PPICLK0 0x10 /* PPI Clock select bit 0 */ -#define PSDA_VDEC_RST 0x08 /* Video decoder reset, 0 = RESET */ -#define PSDA_VENC_RST 0x04 /* Video encoder reset, 0 = RESET */ -#define PSDA_CODEC_RST 0x01 /* Codec reset, 0 = RESET */ - -/* - * Flash A Port B Bit definitions - */ - -#define PSDA_LED9 0x20 /* LED 9, 1 = LED ON */ -#define PSDA_LED8 0x10 /* LED 8, 1 = LED ON */ -#define PSDA_LED7 0x08 /* LED 7, 1 = LED ON */ -#define PSDA_LED6 0x04 /* LED 6, 1 = LED ON */ -#define PSDA_LED5 0x02 /* LED 5, 1 = LED ON */ -#define PSDA_LED4 0x01 /* LED 4, 1 = LED ON */ diff --git a/board/bf533-stamp/Kconfig b/board/bf533-stamp/Kconfig deleted file mode 100644 index 0cffde3b47..0000000000 --- a/board/bf533-stamp/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_BF533_STAMP - -config SYS_BOARD - default "bf533-stamp" - -config SYS_CONFIG_NAME - default "bf533-stamp" - -endif diff --git a/board/bf533-stamp/MAINTAINERS b/board/bf533-stamp/MAINTAINERS deleted file mode 100644 index c7aeefaee0..0000000000 --- a/board/bf533-stamp/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -BF533-STAMP BOARD -M: Sonic Zhang <sonic.adi@gmail.com> -S: Maintained -F: board/bf533-stamp/ -F: include/configs/bf533-stamp.h -F: configs/bf533-stamp_defconfig diff --git a/board/bf533-stamp/Makefile b/board/bf533-stamp/Makefile deleted file mode 100644 index 041c98e19c..0000000000 --- a/board/bf533-stamp/Makefile +++ /dev/null @@ -1,14 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := bf533-stamp.o -obj-$(CONFIG_STAMP_CF) += ide-cf.o -obj-$(CONFIG_VIDEO) += video.o diff --git a/board/bf533-stamp/bf533-stamp.c b/board/bf533-stamp/bf533-stamp.c deleted file mode 100644 index 185a651bec..0000000000 --- a/board/bf533-stamp/bf533-stamp.c +++ /dev/null @@ -1,127 +0,0 @@ -/* - * U-Boot - main board file - * - * Copyright (c) 2005-2008 Analog Devices Inc. - * - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <netdev.h> -#include <asm/gpio.h> - -DECLARE_GLOBAL_DATA_PTR; - -int checkboard(void) -{ - printf("Board: ADI BF533 Stamp board\n"); - printf(" Support: http://blackfin.uclinux.org/\n"); - return 0; -} - -/* PF0 and PF1 are used to switch between the ethernet and flash: - * PF0 PF1 - * flash: 0 0 - * ether: 1 0 - */ -void swap_to(int device_id) -{ - gpio_request(GPIO_PF0, "eth_flash_swap"); - gpio_request(GPIO_PF1, "eth_flash_swap"); - gpio_direction_output(GPIO_PF0, device_id == ETHERNET); - gpio_direction_output(GPIO_PF1, 0); - SSYNC(); -} - -#if defined(CONFIG_MISC_INIT_R) -/* miscellaneous platform dependent initialisations */ -int misc_init_r(void) -{ -#ifdef CONFIG_STAMP_CF - cf_ide_init(); -#endif - - return 0; -} -#endif - -#ifdef CONFIG_SHOW_BOOT_PROGRESS - -#define CONFIG_LED_STATUS_OFF 0 -#define CONFIG_LED_STATUS_ON 1 - -static int gpio_setup; - -static void stamp_led_set(int LED1, int LED2, int LED3) -{ - if (!gpio_setup) { - gpio_request(GPIO_PF2, "boot_progress"); - gpio_request(GPIO_PF3, "boot_progress"); - gpio_request(GPIO_PF4, "boot_progress"); - gpio_direction_output(GPIO_PF2, LED1); - gpio_direction_output(GPIO_PF3, LED2); - gpio_direction_output(GPIO_PF4, LED3); - gpio_setup = 1; - } else { - gpio_set_value(GPIO_PF2, LED1); - gpio_set_value(GPIO_PF3, LED2); - gpio_set_value(GPIO_PF4, LED3); - } -} - -void show_boot_progress(int status) -{ - switch (status) { - case BOOTSTAGE_ID_CHECK_MAGIC: - stamp_led_set(CONFIG_LED_STATUS_OFF, CONFIG_LED_STATUS_OFF, - CONFIG_LED_STATUS_ON); - break; - case BOOTSTAGE_ID_CHECK_HEADER: - stamp_led_set(CONFIG_LED_STATUS_OFF, CONFIG_LED_STATUS_ON, - CONFIG_LED_STATUS_OFF); - break; - case BOOTSTAGE_ID_CHECK_CHECKSUM: - stamp_led_set(CONFIG_LED_STATUS_OFF, CONFIG_LED_STATUS_ON, - CONFIG_LED_STATUS_ON); - break; - case BOOTSTAGE_ID_CHECK_ARCH: - stamp_led_set(CONFIG_LED_STATUS_ON, CONFIG_LED_STATUS_OFF, - CONFIG_LED_STATUS_OFF); - break; - case BOOTSTAGE_ID_CHECK_IMAGETYPE: - case BOOTSTAGE_ID_DECOMP_IMAGE: - stamp_led_set(CONFIG_LED_STATUS_ON, CONFIG_LED_STATUS_OFF, - CONFIG_LED_STATUS_ON); - break; - case BOOTSTAGE_ID_KERNEL_LOADED: - case BOOTSTAGE_ID_CHECK_BOOT_OS: - stamp_led_set(CONFIG_LED_STATUS_ON, CONFIG_LED_STATUS_ON, - CONFIG_LED_STATUS_OFF); - break; - case BOOTSTAGE_ID_BOOT_OS_RETURNED: - case BOOTSTAGE_ID_RD_MAGIC: - case BOOTSTAGE_ID_RD_HDR_CHECKSUM: - case BOOTSTAGE_ID_RD_CHECKSUM: - case BOOTSTAGE_ID_RAMDISK: - case BOOTSTAGE_ID_NO_RAMDISK: - case BOOTSTAGE_ID_RUN_OS: - stamp_led_set(CONFIG_LED_STATUS_OFF, CONFIG_LED_STATUS_OFF, - CONFIG_LED_STATUS_OFF); - break; - default: - stamp_led_set(CONFIG_LED_STATUS_ON, CONFIG_LED_STATUS_ON, - CONFIG_LED_STATUS_ON); - break; - } -} -#endif - -#ifdef CONFIG_SMC91111 -int board_eth_init(bd_t *bis) -{ - return smc91111_initialize(0, CONFIG_SMC91111_BASE); -} -#endif diff --git a/board/bf533-stamp/config.mk b/board/bf533-stamp/config.mk deleted file mode 100644 index 7f9138b09b..0000000000 --- a/board/bf533-stamp/config.mk +++ /dev/null @@ -1,11 +0,0 @@ -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -# Set some default LDR flags based on boot mode. -LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8 diff --git a/board/bf533-stamp/ide-cf.c b/board/bf533-stamp/ide-cf.c deleted file mode 100644 index 3e4080e28f..0000000000 --- a/board/bf533-stamp/ide-cf.c +++ /dev/null @@ -1,98 +0,0 @@ -/* - * CF IDE addon card code - * - * Enter bugs at http://blackfin.uclinux.org/ - * - * Copyright (c) 2005-2009 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <config.h> -#include <asm/blackfin.h> - -void cf_outb(unsigned char val, volatile unsigned char *addr) -{ - /* "ETHERNET" means the expansion memory banks */ - swap_to(ETHERNET); - - *addr = val; - SSYNC(); - - swap_to(FLASH); -} - -unsigned char cf_inb(volatile unsigned char *addr) -{ - unsigned char c; - - swap_to(ETHERNET); - - c = *addr; - SSYNC(); - - swap_to(FLASH); - - return c; -} - -void cf_insw(unsigned short *sect_buf, unsigned short *addr, int words) -{ - int i; - - swap_to(ETHERNET); - - for (i = 0; i < words; i++) { - *(sect_buf + i) = *addr; - SSYNC(); - } - - swap_to(FLASH); -} - -void cf_outsw(unsigned short *addr, unsigned short *sect_buf, int words) -{ - int i; - - swap_to(ETHERNET); - - for (i = 0; i < words; i++) { - *addr = *(sect_buf + i); - SSYNC(); - } - - swap_to(FLASH); -} - -/* Definitions used in Compact Flash Boot support */ -#define FIO_EDGE_CF_BITS 0x0000 -#define FIO_POLAR_CF_BITS 0x0000 -#define FIO_EDGE_BITS 0x1E0 -#define FIO_POLAR_BITS 0x160 - -/* Compact flash status bits in status register */ -#define CF_STAT_BITS 0x00000060 - -void cf_ide_init(void) -{ - int i, cf_stat; - - /* Check whether CF card is inserted */ - bfin_write_FIO_EDGE(FIO_EDGE_CF_BITS); - bfin_write_FIO_POLAR(FIO_POLAR_CF_BITS); - for (i = 0; i < 0x300; i++) - asm volatile("nop;"); - - cf_stat = bfin_read_FIO_FLAG_S() & CF_STAT_BITS; - - bfin_write_FIO_EDGE(FIO_EDGE_BITS); - bfin_write_FIO_POLAR(FIO_POLAR_BITS); - - if (!cf_stat) { - for (i = 0; i < 0x3000; i++) - asm volatile("nop;"); - - ide_init(); - } -} diff --git a/board/bf533-stamp/video.c b/board/bf533-stamp/video.c deleted file mode 100644 index e9b9a9abdf..0000000000 --- a/board/bf533-stamp/video.c +++ /dev/null @@ -1,169 +0,0 @@ -/* - * BF533-STAMP splash driver - * - * Copyright (c) 2006-2008 Analog Devices Inc. - * (C) Copyright 2000 - * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it - * (C) Copyright 2002 - * Wolfgang Denk, wd@denx.de - * - * Licensed under the GPL-2 or later. - */ - -#include <stdarg.h> -#include <common.h> -#include <config.h> -#include <malloc.h> -#include <asm/blackfin.h> -#include <asm/mach-common/bits/dma.h> -#include <i2c.h> -#include <linux/types.h> -#include <stdio_dev.h> - -#define DMA_SIZE16 2 - -#include <asm/mach-common/bits/ppi.h> - -#define NTSC_FRAME_ADDR 0x06000000 -#include "video.h" - -/* NTSC OUTPUT SIZE 720 * 240 */ -#define VERTICAL 2 -#define HORIZONTAL 4 - -int is_vblank_line(const int line) -{ - /* - * This array contains a single bit for each line in - * an NTSC frame. - */ - if ((line <= 18) || (line >= 264 && line <= 281) || (line == 528)) - return true; - - return false; -} - -int NTSC_framebuffer_init(char *base_address) -{ - const int NTSC_frames = 1; - const int NTSC_lines = 525; - char *dest = base_address; - int frame_num, line_num; - - for (frame_num = 0; frame_num < NTSC_frames; ++frame_num) { - for (line_num = 1; line_num <= NTSC_lines; ++line_num) { - unsigned int code; - int offset = 0; - int i; - - if (is_vblank_line(line_num)) - offset++; - - if (line_num > 266 || line_num < 3) - offset += 2; - - /* Output EAV code */ - code = system_code_map[offset].eav; - write_dest_byte((char)(code >> 24) & 0xff); - write_dest_byte((char)(code >> 16) & 0xff); - write_dest_byte((char)(code >> 8) & 0xff); - write_dest_byte((char)(code) & 0xff); - - /* Output horizontal blanking */ - for (i = 0; i < 67 * 2; ++i) { - write_dest_byte(0x80); - write_dest_byte(0x10); - } - - /* Output SAV */ - code = system_code_map[offset].sav; - write_dest_byte((char)(code >> 24) & 0xff); - write_dest_byte((char)(code >> 16) & 0xff); - write_dest_byte((char)(code >> 8) & 0xff); - write_dest_byte((char)(code) & 0xff); - - /* Output empty horizontal data */ - for (i = 0; i < 360 * 2; ++i) { - write_dest_byte(0x80); - write_dest_byte(0x10); - } - } - } - - return dest - base_address; -} - -void fill_frame(char *Frame, int Value) -{ - int *OddPtr32; - int OddLine; - int *EvenPtr32; - int EvenLine; - int i; - int *data; - int m, n; - - /* fill odd and even frames */ - for (OddLine = 22, EvenLine = 285; OddLine < 263; OddLine++, EvenLine++) { - OddPtr32 = (int *)((Frame + (OddLine * 1716)) + 276); - EvenPtr32 = (int *)((Frame + (EvenLine * 1716)) + 276); - for (i = 0; i < 360; i++, OddPtr32++, EvenPtr32++) { - *OddPtr32 = Value; - *EvenPtr32 = Value; - } - } - - for (m = 0; m < VERTICAL; m++) { - data = (int *)u_boot_logo.data; - for (OddLine = (22 + m), EvenLine = (285 + m); - OddLine < (u_boot_logo.height * VERTICAL) + (22 + m); - OddLine += VERTICAL, EvenLine += VERTICAL) { - OddPtr32 = (int *)((Frame + ((OddLine) * 1716)) + 276); - EvenPtr32 = - (int *)((Frame + ((EvenLine) * 1716)) + 276); - for (i = 0; i < u_boot_logo.width / 2; i++) { - /* enlarge one pixel to m x n */ - for (n = 0; n < HORIZONTAL; n++) { - *OddPtr32++ = *data; - *EvenPtr32++ = *data; - } - data++; - } - } - } -} - -static void video_init(char *NTSCFrame) -{ - NTSC_framebuffer_init(NTSCFrame); - fill_frame(NTSCFrame, BLUE); - - bfin_write_PPI_CONTROL(0x0082); - bfin_write_PPI_FRAME(0x020D); - - bfin_write_DMA0_START_ADDR(NTSCFrame); - bfin_write_DMA0_X_COUNT(0x035A); - bfin_write_DMA0_X_MODIFY(0x0002); - bfin_write_DMA0_Y_COUNT(0x020D); - bfin_write_DMA0_Y_MODIFY(0x0002); - bfin_write_DMA0_CONFIG(0x1015); - bfin_write_PPI_CONTROL(0x0083); -} - -void video_stop(void) -{ - bfin_write_PPI_CONTROL(0); - bfin_write_DMA0_CONFIG(0); -} - -int drv_video_init(void) -{ - struct stdio_dev videodev; - - video_init((void *)NTSC_FRAME_ADDR); - - memset(&videodev, 0, sizeof(videodev)); - strcpy(videodev.name, "video"); - - return stdio_register(&videodev); -} diff --git a/board/bf533-stamp/video.h b/board/bf533-stamp/video.h deleted file mode 100644 index 949c3d8f3f..0000000000 --- a/board/bf533-stamp/video.h +++ /dev/null @@ -1,22 +0,0 @@ -#include <video_logo.h> -#define write_dest_byte(val) {*dest++=val;} -#define BLACK (0x01800180) /* black pixel pattern */ -#define BLUE (0x296E29F0) /* blue pixel pattern */ -#define RED (0x51F0515A) /* red pixel pattern */ -#define MAGENTA (0x6ADE6ACA) /* magenta pixel pattern */ -#define GREEN (0x91229136) /* green pixel pattern */ -#define CYAN (0xAA10AAA6) /* cyan pixel pattern */ -#define YELLOW (0xD292D210) /* yellow pixel pattern */ -#define WHITE (0xFE80FE80) /* white pixel pattern */ - -typedef struct { - unsigned int sav; - unsigned int eav; -} system_code_type; - -const system_code_type system_code_map[] = { - { 0xFF000080, 0xFF00009D }, - { 0xFF0000AB, 0xFF0000B6 }, - { 0xFF0000C7, 0xFF0000DA }, - { 0xFF0000EC, 0xFF0000F1 }, -}; diff --git a/board/bf537-minotaur/Kconfig b/board/bf537-minotaur/Kconfig deleted file mode 100644 index 204f609e09..0000000000 --- a/board/bf537-minotaur/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_BF537_MINOTAUR - -config SYS_BOARD - default "bf537-minotaur" - -config SYS_CONFIG_NAME - default "bf537-minotaur" - -endif diff --git a/board/bf537-minotaur/MAINTAINERS b/board/bf537-minotaur/MAINTAINERS deleted file mode 100644 index 04643b1afd..0000000000 --- a/board/bf537-minotaur/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -BF537-MINOTAUR BOARD -M: Martin Strubel <strubel@section5.ch> -S: Maintained -F: board/bf537-minotaur/ -F: include/configs/bf537-minotaur.h -F: configs/bf537-minotaur_defconfig diff --git a/board/bf537-minotaur/Makefile b/board/bf537-minotaur/Makefile deleted file mode 100644 index 13ed8bfa22..0000000000 --- a/board/bf537-minotaur/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := bf537-minotaur.o diff --git a/board/bf537-minotaur/bf537-minotaur.c b/board/bf537-minotaur/bf537-minotaur.c deleted file mode 100644 index 34750eca51..0000000000 --- a/board/bf537-minotaur/bf537-minotaur.c +++ /dev/null @@ -1,30 +0,0 @@ -/* - * U-Boot - main board file - * - * Copyright (c) 2005-2009 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <config.h> -#include <command.h> -#include <netdev.h> -#include <net.h> -#include <asm/blackfin.h> - -DECLARE_GLOBAL_DATA_PTR; - -int checkboard(void) -{ - printf("Board: CSP BF537 Minotaur board\n"); - printf(" Support: http://www.camsig.co.uk/\n"); - return 0; -} - -#ifdef CONFIG_BFIN_MAC -int board_eth_init(bd_t *bis) -{ - return bfin_EMAC_initialize(bis); -} -#endif diff --git a/board/bf537-minotaur/config.mk b/board/bf537-minotaur/config.mk deleted file mode 100644 index 7402f449b0..0000000000 --- a/board/bf537-minotaur/config.mk +++ /dev/null @@ -1,11 +0,0 @@ -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -# Set some default LDR flags based on boot mode. -LDR_FLAGS-BFIN_BOOT_UART := --port g --gpio 6 diff --git a/board/bf537-pnav/Kconfig b/board/bf537-pnav/Kconfig deleted file mode 100644 index acb1f89233..0000000000 --- a/board/bf537-pnav/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_BF537_PNAV - -config SYS_BOARD - default "bf537-pnav" - -config SYS_CONFIG_NAME - default "bf537-pnav" - -endif diff --git a/board/bf537-pnav/MAINTAINERS b/board/bf537-pnav/MAINTAINERS deleted file mode 100644 index b8b22a3d46..0000000000 --- a/board/bf537-pnav/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -BF537-PNAV BOARD -M: Sonic Zhang <sonic.adi@gmail.com> -S: Maintained -F: board/bf537-pnav/ -F: include/configs/bf537-pnav.h -F: configs/bf537-pnav_defconfig diff --git a/board/bf537-pnav/Makefile b/board/bf537-pnav/Makefile deleted file mode 100644 index f7af8cd5ae..0000000000 --- a/board/bf537-pnav/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := bf537-pnav.o diff --git a/board/bf537-pnav/bf537-pnav.c b/board/bf537-pnav/bf537-pnav.c deleted file mode 100644 index c3b06f09fc..0000000000 --- a/board/bf537-pnav/bf537-pnav.c +++ /dev/null @@ -1,30 +0,0 @@ -/* - * U-Boot - main board file - * - * Copyright (c) 2005-2009 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <config.h> -#include <command.h> -#include <netdev.h> -#include <net.h> -#include <asm/blackfin.h> - -DECLARE_GLOBAL_DATA_PTR; - -int checkboard(void) -{ - printf("Board: ADI BF537 PNAV board\n"); - printf(" Support: http://blackfin.uclinux.org/\n"); - return 0; -} - -#ifdef CONFIG_BFIN_MAC -int board_eth_init(bd_t *bis) -{ - return bfin_EMAC_initialize(bis); -} -#endif diff --git a/board/bf537-srv1/Kconfig b/board/bf537-srv1/Kconfig deleted file mode 100644 index 2ddcd69482..0000000000 --- a/board/bf537-srv1/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_BF537_SRV1 - -config SYS_BOARD - default "bf537-srv1" - -config SYS_CONFIG_NAME - default "bf537-srv1" - -endif diff --git a/board/bf537-srv1/MAINTAINERS b/board/bf537-srv1/MAINTAINERS deleted file mode 100644 index c8f1458656..0000000000 --- a/board/bf537-srv1/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -BF537-SRV1 BOARD -M: Martin Strubel <strubel@section5.ch> -S: Maintained -F: board/bf537-srv1/ -F: include/configs/bf537-srv1.h -F: configs/bf537-srv1_defconfig diff --git a/board/bf537-srv1/Makefile b/board/bf537-srv1/Makefile deleted file mode 100644 index 1815fc5f8b..0000000000 --- a/board/bf537-srv1/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := bf537-srv1.o diff --git a/board/bf537-srv1/bf537-srv1.c b/board/bf537-srv1/bf537-srv1.c deleted file mode 100644 index fc22c07102..0000000000 --- a/board/bf537-srv1/bf537-srv1.c +++ /dev/null @@ -1,30 +0,0 @@ -/* - * U-Boot - main board file - * - * Copyright (c) 2005-2009 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <config.h> -#include <command.h> -#include <netdev.h> -#include <net.h> -#include <asm/blackfin.h> - -DECLARE_GLOBAL_DATA_PTR; - -int checkboard(void) -{ - printf("Board: Surveyor SRV1 board\n"); - printf(" Support: http://www.surveyor.com/\n"); - return 0; -} - -#ifdef CONFIG_BFIN_MAC -int board_eth_init(bd_t *bis) -{ - return bfin_EMAC_initialize(bis); -} -#endif diff --git a/board/bf537-srv1/config.mk b/board/bf537-srv1/config.mk deleted file mode 100644 index 7402f449b0..0000000000 --- a/board/bf537-srv1/config.mk +++ /dev/null @@ -1,11 +0,0 @@ -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -# Set some default LDR flags based on boot mode. -LDR_FLAGS-BFIN_BOOT_UART := --port g --gpio 6 diff --git a/board/bf537-stamp/Kconfig b/board/bf537-stamp/Kconfig deleted file mode 100644 index 4f86128e9c..0000000000 --- a/board/bf537-stamp/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_BF537_STAMP - -config SYS_BOARD - default "bf537-stamp" - -config SYS_CONFIG_NAME - default "bf537-stamp" - -endif diff --git a/board/bf537-stamp/MAINTAINERS b/board/bf537-stamp/MAINTAINERS deleted file mode 100644 index 7d9c1334bf..0000000000 --- a/board/bf537-stamp/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -BF537-STAMP BOARD -M: Sonic Zhang <sonic.adi@gmail.com> -S: Maintained -F: board/bf537-stamp/ -F: include/configs/bf537-stamp.h -F: configs/bf537-stamp_defconfig diff --git a/board/bf537-stamp/Makefile b/board/bf537-stamp/Makefile deleted file mode 100644 index 4008e3a2d4..0000000000 --- a/board/bf537-stamp/Makefile +++ /dev/null @@ -1,14 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) 2005-2007 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := bf537-stamp.o -obj-$(CONFIG_BFIN_IDE) += ide-cf.o -obj-$(CONFIG_HAS_POST) += post-memory.o diff --git a/board/bf537-stamp/bf537-stamp.c b/board/bf537-stamp/bf537-stamp.c deleted file mode 100644 index 1f90c003bc..0000000000 --- a/board/bf537-stamp/bf537-stamp.c +++ /dev/null @@ -1,68 +0,0 @@ -/* - * U-Boot - main board file - * - * Copyright (c) 2005-2008 Analog Devices Inc. - * - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <config.h> -#include <command.h> -#include <asm/blackfin.h> -#include <net.h> -#include <asm/mach-common/bits/bootrom.h> -#include <netdev.h> - -DECLARE_GLOBAL_DATA_PTR; - -int checkboard(void) -{ - printf("Board: ADI BF537 stamp board\n"); - printf(" Support: http://blackfin.uclinux.org/\n"); - return 0; -} - -#ifdef CONFIG_BFIN_MAC -static void board_init_enetaddr(uchar *mac_addr) -{ -#ifdef CONFIG_MTD_NOR_FLASH - /* we cram the MAC in the last flash sector */ - uchar *board_mac_addr = (uchar *)0x203F0000; - if (is_valid_ethaddr(board_mac_addr)) { - memcpy(mac_addr, board_mac_addr, 6); - eth_setenv_enetaddr("ethaddr", mac_addr); - } -#endif -} - -int board_eth_init(bd_t *bis) -{ - return bfin_EMAC_initialize(bis); -} -#endif - -/* miscellaneous platform dependent initialisations */ -int misc_init_r(void) -{ -#ifdef CONFIG_BFIN_MAC - uchar enetaddr[6]; - if (!eth_getenv_enetaddr("ethaddr", enetaddr)) - board_init_enetaddr(enetaddr); -#endif - -#ifdef CONFIG_MTD_NOR_FLASH - /* we use the last sector for the MAC address / POST LDR */ - extern flash_info_t flash_info[]; - flash_protect(FLAG_PROTECT_SET, 0x203F0000, 0x203FFFFF, &flash_info[0]); -#endif - -#ifdef CONFIG_BFIN_IDE - cf_ide_init(); -#endif - - return 0; -} diff --git a/board/bf537-stamp/config.mk b/board/bf537-stamp/config.mk deleted file mode 100644 index ab0fbecab9..0000000000 --- a/board/bf537-stamp/config.mk +++ /dev/null @@ -1,12 +0,0 @@ -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -# Set some default LDR flags based on boot mode. -LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8 -LDR_FLAGS-BFIN_BOOT_UART := --port g --gpio 6 diff --git a/board/bf537-stamp/ide-cf.c b/board/bf537-stamp/ide-cf.c deleted file mode 100644 index 5a3720de5a..0000000000 --- a/board/bf537-stamp/ide-cf.c +++ /dev/null @@ -1,66 +0,0 @@ -/* - * CF IDE addon card code - * - * Enter bugs at http://blackfin.uclinux.org/ - * - * Copyright (c) 2005-2009 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <config.h> -#include <command.h> -#include <asm/blackfin.h> - -void cf_outb(unsigned char val, volatile unsigned char *addr) -{ - *(addr) = val; - SSYNC(); -} - -unsigned char cf_inb(volatile unsigned char *addr) -{ - volatile unsigned char c; - - c = *(addr); - SSYNC(); - - return c; -} - -void cf_insw(unsigned short *sect_buf, unsigned short *addr, int words) -{ - int i; - - for (i = 0; i < words; i++) - *(sect_buf + i) = *(addr); - SSYNC(); -} - -void cf_outsw(unsigned short *addr, unsigned short *sect_buf, int words) -{ - int i; - - for (i = 0; i < words; i++) - *(addr) = *(sect_buf + i); - SSYNC(); -} - -void cf_ide_init(void) -{ -#if defined(CONFIG_BFIN_TRUE_IDE) - /* Enable ATASEL when in True IDE mode */ - printf("Using CF True IDE Mode\n"); - cf_outb(0, (unsigned char *)CONFIG_CF_ATASEL_ENA); - udelay(1000); -#elif defined(CONFIG_BFIN_CF_IDE) - /* Disable ATASEL when we're in Common Memory Mode */ - printf("Using CF Common Memory Mode\n"); - cf_outb(0, (unsigned char *)CONFIG_CF_ATASEL_DIS); - udelay(1000); -#elif defined(CONFIG_BFIN_HDD_IDE) - printf("Using HDD IDE Mode\n"); -#endif - ide_init(); -} diff --git a/board/bf537-stamp/post-memory.c b/board/bf537-stamp/post-memory.c deleted file mode 100644 index 2dea92fbe9..0000000000 --- a/board/bf537-stamp/post-memory.c +++ /dev/null @@ -1,257 +0,0 @@ -#include <common.h> -#include <asm/io.h> - -#include <post.h> -#include <watchdog.h> - -#if CONFIG_POST & CONFIG_SYS_POST_MEMORY -#define CLKIN 25000000 -#define PATTERN1 0x5A5A5A5A -#define PATTERN2 0xAAAAAAAA - -#define CCLK_NUM 4 -#define SCLK_NUM 3 - -void post_out_buff(char *buff); -void post_init_pll(int mult, int div); -int post_init_sdram(int sclk); -void post_init_uart(int sclk); - -const int pll[CCLK_NUM][SCLK_NUM][2] = { - { {20, 4}, {20, 5}, {20, 10} }, /* CCLK = 500M */ - { {16, 4}, {16, 5}, {16, 8} }, /* CCLK = 400M */ - { {8, 2}, {8, 4}, {8, 5} }, /* CCLK = 200M */ - { {4, 1}, {4, 2}, {4, 4} } /* CCLK = 100M */ -}; -const char *const log[CCLK_NUM][SCLK_NUM] = { - {"CCLK-500MHz SCLK-125MHz: Writing...\0", - "CCLK-500MHz SCLK-100MHz: Writing...\0", - "CCLK-500MHz SCLK- 50MHz: Writing...\0",}, - {"CCLK-400MHz SCLK-100MHz: Writing...\0", - "CCLK-400MHz SCLK- 80MHz: Writing...\0", - "CCLK-400MHz SCLK- 50MHz: Writing...\0",}, - {"CCLK-200MHz SCLK-100MHz: Writing...\0", - "CCLK-200MHz SCLK- 50MHz: Writing...\0", - "CCLK-200MHz SCLK- 40MHz: Writing...\0",}, - {"CCLK-100MHz SCLK-100MHz: Writing...\0", - "CCLK-100MHz SCLK- 50MHz: Writing...\0", - "CCLK-100MHz SCLK- 25MHz: Writing...\0",}, -}; - -int memory_post_test(int flags) -{ - int addr; - int m, n; - int sclk, sclk_temp; - int ret = 1; - - sclk_temp = CLKIN / 1000000; - sclk_temp = sclk_temp * CONFIG_VCO_MULT; - for (sclk = 0; sclk_temp > 0; sclk++) - sclk_temp -= CONFIG_SCLK_DIV; - sclk = sclk * 1000000; - post_init_uart(sclk); - if (post_hotkeys_pressed() == 0) - return 0; - - for (m = 0; m < CCLK_NUM; m++) { - for (n = 0; n < SCLK_NUM; n++) { - /* Calculate the sclk */ - sclk_temp = CLKIN / 1000000; - sclk_temp = sclk_temp * pll[m][n][0]; - for (sclk = 0; sclk_temp > 0; sclk++) - sclk_temp -= pll[m][n][1]; - sclk = sclk * 1000000; - - post_init_pll(pll[m][n][0], pll[m][n][1]); - post_init_sdram(sclk); - post_init_uart(sclk); - post_out_buff("\n\r\0"); - post_out_buff(log[m][n]); - for (addr = 0x0; addr < CONFIG_SYS_MAX_RAM_SIZE; addr += 4) - *(unsigned long *)addr = PATTERN1; - post_out_buff("Reading...\0"); - for (addr = 0x0; addr < CONFIG_SYS_MAX_RAM_SIZE; addr += 4) { - if ((*(unsigned long *)addr) != PATTERN1) { - post_out_buff("Error\n\r\0"); - ret = 0; - } - } - post_out_buff("OK\n\r\0"); - } - } - if (ret) - post_out_buff("memory POST passed\n\r\0"); - else - post_out_buff("memory POST failed\n\r\0"); - - post_out_buff("\n\r\n\r\0"); - return 1; -} - -void post_init_uart(int sclk) -{ - int divisor; - - for (divisor = 0; sclk > 0; divisor++) - sclk -= 57600 * 16; - - bfin_write_PORTF_FER(0x000F); - bfin_write_PORTH_FER(0xFFFF); - - bfin_write_UART_GCTL(0x00); - bfin_write_UART_LCR(0x83); - SSYNC(); - bfin_write_UART_DLL(divisor & 0xFF); - SSYNC(); - bfin_write_UART_DLH((divisor >> 8) & 0xFF); - SSYNC(); - bfin_write_UART_LCR(0x03); - SSYNC(); - bfin_write_UART_GCTL(0x01); - SSYNC(); -} - -void post_out_buff(char *buff) -{ - - int i = 0; - for (i = 0; i < 0x80000; i++) - ; - i = 0; - while ((buff[i] != '\0') && (i != 100)) { - while (!(bfin_read_pUART_LSR() & 0x20)) ; - bfin_write_UART_THR(buff[i]); - SSYNC(); - i++; - } - for (i = 0; i < 0x80000; i++) - ; -} - -void post_init_pll(int mult, int div) -{ - - bfin_write_SIC_IWR(0x01); - bfin_write_PLL_CTL((mult << 9)); - bfin_write_PLL_DIV(div); - asm("CLI R2;"); - asm("IDLE;"); - asm("STI R2;"); - while (!(bfin_read_PLL_STAT() & 0x20)) ; -} - -int post_init_sdram(int sclk) -{ - int SDRAM_tRP, SDRAM_tRP_num, SDRAM_tRAS, SDRAM_tRAS_num, SDRAM_tRCD, - SDRAM_tWR; - int SDRAM_Tref, SDRAM_NRA, SDRAM_CL, SDRAM_SIZE, SDRAM_WIDTH, - mem_SDGCTL, mem_SDBCTL, mem_SDRRC; - - if ((sclk > 119402985)) { - SDRAM_tRP = TRP_2; - SDRAM_tRP_num = 2; - SDRAM_tRAS = TRAS_7; - SDRAM_tRAS_num = 7; - SDRAM_tRCD = TRCD_2; - SDRAM_tWR = TWR_2; - } else if ((sclk > 104477612) && (sclk <= 119402985)) { - SDRAM_tRP = TRP_2; - SDRAM_tRP_num = 2; - SDRAM_tRAS = TRAS_6; - SDRAM_tRAS_num = 6; - SDRAM_tRCD = TRCD_2; - SDRAM_tWR = TWR_2; - } else if ((sclk > 89552239) && (sclk <= 104477612)) { - SDRAM_tRP = TRP_2; - SDRAM_tRP_num = 2; - SDRAM_tRAS = TRAS_5; - SDRAM_tRAS_num = 5; - SDRAM_tRCD = TRCD_2; - SDRAM_tWR = TWR_2; - } else if ((sclk > 74626866) && (sclk <= 89552239)) { - SDRAM_tRP = TRP_2; - SDRAM_tRP_num = 2; - SDRAM_tRAS = TRAS_4; - SDRAM_tRAS_num = 4; - SDRAM_tRCD = TRCD_2; - SDRAM_tWR = TWR_2; - } else if ((sclk > 66666667) && (sclk <= 74626866)) { - SDRAM_tRP = TRP_2; - SDRAM_tRP_num = 2; - SDRAM_tRAS = TRAS_3; - SDRAM_tRAS_num = 3; - SDRAM_tRCD = TRCD_2; - SDRAM_tWR = TWR_2; - } else if ((sclk > 59701493) && (sclk <= 66666667)) { - SDRAM_tRP = TRP_1; - SDRAM_tRP_num = 1; - SDRAM_tRAS = TRAS_4; - SDRAM_tRAS_num = 4; - SDRAM_tRCD = TRCD_1; - SDRAM_tWR = TWR_2; - } else if ((sclk > 44776119) && (sclk <= 59701493)) { - SDRAM_tRP = TRP_1; - SDRAM_tRP_num = 1; - SDRAM_tRAS = TRAS_3; - SDRAM_tRAS_num = 3; - SDRAM_tRCD = TRCD_1; - SDRAM_tWR = TWR_2; - } else if ((sclk > 29850746) && (sclk <= 44776119)) { - SDRAM_tRP = TRP_1; - SDRAM_tRP_num = 1; - SDRAM_tRAS = TRAS_2; - SDRAM_tRAS_num = 2; - SDRAM_tRCD = TRCD_1; - SDRAM_tWR = TWR_2; - } else if (sclk <= 29850746) { - SDRAM_tRP = TRP_1; - SDRAM_tRP_num = 1; - SDRAM_tRAS = TRAS_1; - SDRAM_tRAS_num = 1; - SDRAM_tRCD = TRCD_1; - SDRAM_tWR = TWR_2; - } else { - SDRAM_tRP = TRP_1; - SDRAM_tRP_num = 1; - SDRAM_tRAS = TRAS_1; - SDRAM_tRAS_num = 1; - SDRAM_tRCD = TRCD_1; - SDRAM_tWR = TWR_2; - } - /*SDRAM INFORMATION: */ - SDRAM_Tref = 64; /* Refresh period in milliseconds */ - SDRAM_NRA = 4096; /* Number of row addresses in SDRAM */ - SDRAM_CL = CL_3; /* 2 */ - - SDRAM_SIZE = EBSZ_64; - SDRAM_WIDTH = EBCAW_10; - - mem_SDBCTL = SDRAM_WIDTH | SDRAM_SIZE | EBE; - - /* Equation from section 17 (p17-46) of BF533 HRM */ - mem_SDRRC = - (((CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - - (SDRAM_tRAS_num + SDRAM_tRP_num); - - /* Enable SCLK Out */ - mem_SDGCTL = - (SCTLE | SDRAM_CL | SDRAM_tRAS | SDRAM_tRP | SDRAM_tRCD | SDRAM_tWR - | PSS); - - SSYNC(); - - bfin_write_EBIU_SDGCTL(bfin_write_EBIU_SDGCTL() | 0x1000000); - /* Set the SDRAM Refresh Rate control register based on SSCLK value */ - bfin_write_EBIU_SDRRC(mem_SDRRC); - - /* SDRAM Memory Bank Control Register */ - bfin_write_EBIU_SDBCTL(mem_SDBCTL); - - /* SDRAM Memory Global Control Register */ - bfin_write_EBIU_SDGCTL(mem_SDGCTL); - SSYNC(); - return mem_SDRRC; -} - -#endif /* CONFIG_POST & CONFIG_SYS_POST_MEMORY */ diff --git a/board/bf538f-ezkit/Kconfig b/board/bf538f-ezkit/Kconfig deleted file mode 100644 index e40fcdb2a2..0000000000 --- a/board/bf538f-ezkit/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_BF538F_EZKIT - -config SYS_BOARD - default "bf538f-ezkit" - -config SYS_CONFIG_NAME - default "bf538f-ezkit" - -endif diff --git a/board/bf538f-ezkit/MAINTAINERS b/board/bf538f-ezkit/MAINTAINERS deleted file mode 100644 index 7964735e6d..0000000000 --- a/board/bf538f-ezkit/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -BF538F-EZKIT BOARD -M: Sonic Zhang <sonic.adi@gmail.com> -S: Maintained -F: board/bf538f-ezkit/ -F: include/configs/bf538f-ezkit.h -F: configs/bf538f-ezkit_defconfig diff --git a/board/bf538f-ezkit/Makefile b/board/bf538f-ezkit/Makefile deleted file mode 100644 index eb1703e897..0000000000 --- a/board/bf538f-ezkit/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := bf538f-ezkit.o diff --git a/board/bf538f-ezkit/bf538f-ezkit.c b/board/bf538f-ezkit/bf538f-ezkit.c deleted file mode 100644 index 2dd4c0c4d1..0000000000 --- a/board/bf538f-ezkit/bf538f-ezkit.c +++ /dev/null @@ -1,28 +0,0 @@ -/* - * U-Boot - main board file - * - * Copyright (c) 2008 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <netdev.h> -#include <config.h> -#include <asm/blackfin.h> - -DECLARE_GLOBAL_DATA_PTR; - -int checkboard(void) -{ - printf("Board: ADI BF538F EZ-Kit Lite board\n"); - printf(" Support: http://blackfin.uclinux.org/\n"); - return 0; -} - -#ifdef CONFIG_SMC91111 -int board_eth_init(bd_t *bis) -{ - return smc91111_initialize(0, CONFIG_SMC91111_BASE); -} -#endif diff --git a/board/bf538f-ezkit/config.mk b/board/bf538f-ezkit/config.mk deleted file mode 100644 index 7f9138b09b..0000000000 --- a/board/bf538f-ezkit/config.mk +++ /dev/null @@ -1,11 +0,0 @@ -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -# Set some default LDR flags based on boot mode. -LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8 diff --git a/board/bf548-ezkit/Kconfig b/board/bf548-ezkit/Kconfig deleted file mode 100644 index 550227fa30..0000000000 --- a/board/bf548-ezkit/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_BF548_EZKIT - -config SYS_BOARD - default "bf548-ezkit" - -config SYS_CONFIG_NAME - default "bf548-ezkit" - -endif diff --git a/board/bf548-ezkit/MAINTAINERS b/board/bf548-ezkit/MAINTAINERS deleted file mode 100644 index e2683bb474..0000000000 --- a/board/bf548-ezkit/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -BF548-EZKIT BOARD -M: Sonic Zhang <sonic.adi@gmail.com> -S: Maintained -F: board/bf548-ezkit/ -F: include/configs/bf548-ezkit.h -F: configs/bf548-ezkit_defconfig diff --git a/board/bf548-ezkit/Makefile b/board/bf548-ezkit/Makefile deleted file mode 100644 index e4d0caaac4..0000000000 --- a/board/bf548-ezkit/Makefile +++ /dev/null @@ -1,13 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := bf548-ezkit.o -obj-$(CONFIG_VIDEO) += video.o diff --git a/board/bf548-ezkit/bf548-ezkit.c b/board/bf548-ezkit/bf548-ezkit.c deleted file mode 100644 index 31d6eeec0c..0000000000 --- a/board/bf548-ezkit/bf548-ezkit.c +++ /dev/null @@ -1,64 +0,0 @@ -/* - * U-Boot - main board file - * - * Copyright (c) 2005-2008 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <config.h> -#include <command.h> -#include <netdev.h> -#include <asm/blackfin.h> -#include <asm/gpio.h> -#include <asm/portmux.h> -#include <asm/sdh.h> - -DECLARE_GLOBAL_DATA_PTR; - -int checkboard(void) -{ - printf("Board: ADI BF548 EZ-Kit board\n"); - printf(" Support: http://blackfin.uclinux.org/\n"); - return 0; -} - -int board_early_init_f(void) -{ - /* Set async addr lines as peripheral */ - const unsigned short pins[] = { - P_A4, P_A5, P_A6, P_A7, P_A8, P_A9, P_A10, P_A11, P_A12, - P_A13, P_A14, P_A15, P_A16, P_A17, P_A18, P_A19, P_A20, - P_A21, P_A22, P_A23, P_A24, 0 - }; - return peripheral_request_list(pins, "async"); -} - -#ifdef CONFIG_SMC911X -int board_eth_init(bd_t *bis) -{ - return smc911x_initialize(0, CONFIG_SMC911X_BASE); -} -#endif - -#ifdef CONFIG_BFIN_SDH -int board_mmc_init(bd_t *bis) -{ - return bfin_mmc_init(bis); -} -#endif - -#ifdef CONFIG_USB_BLACKFIN -void board_musb_init(void) -{ - /* - * Rev 1.0 BF549 EZ-KITs require PE7 to be high for both device - * and OTG host modes, while rev 1.1 and greater require PE7 to - * be low for device mode and high for host mode. We set it high - * here because we are in host mode. - */ - gpio_request(GPIO_PE7, "musb-vbus"); - gpio_direction_output(GPIO_PE7, 1); -} -#endif diff --git a/board/bf548-ezkit/config.mk b/board/bf548-ezkit/config.mk deleted file mode 100644 index 7bb8e9c9ee..0000000000 --- a/board/bf548-ezkit/config.mk +++ /dev/null @@ -1,15 +0,0 @@ -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -# Set some default LDR flags based on boot mode. -LDR_FLAGS-BFIN_BOOT_PARA := --dma 6 -LDR_FLAGS-BFIN_BOOT_FIFO := --dma 1 -LDR_FLAGS-BFIN_BOOT_SPI_MASTER := --dma 1 -LDR_FLAGS-BFIN_BOOT_UART := --dma 1 -LDR_FLAGS-BFIN_BOOT_NAND := --dma 6 diff --git a/board/bf548-ezkit/video.c b/board/bf548-ezkit/video.c deleted file mode 100644 index 37659932f2..0000000000 --- a/board/bf548-ezkit/video.c +++ /dev/null @@ -1,335 +0,0 @@ -/* - * video.c - run splash screen on lcd - * - * Copyright (c) 2007-2008 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#include <stdarg.h> -#include <common.h> -#include <config.h> -#include <malloc.h> -#include <asm/blackfin.h> -#include <asm/gpio.h> -#include <asm/portmux.h> -#include <asm/mach-common/bits/dma.h> -#include <i2c.h> -#include <linux/types.h> -#include <stdio_dev.h> - -#include <lzma/LzmaTypes.h> -#include <lzma/LzmaDec.h> -#include <lzma/LzmaTools.h> - -#define DMA_SIZE16 2 - -#include <asm/mach-common/bits/eppi.h> - -#include EASYLOGO_HEADER - -#define LCD_X_RES 480 /*Horizontal Resolution */ -#define LCD_Y_RES 272 /* Vertical Resolution */ - -#define LCD_BPP 24 /* Bit Per Pixel */ -#define LCD_PIXEL_SIZE (LCD_BPP / 8) -#define DMA_BUS_SIZE 32 -#define ACTIVE_VIDEO_MEM_OFFSET 0 - -/* -- Horizontal synchronizing -- - * - * Timing characteristics taken from the SHARP LQ043T1DG01 datasheet - * (LCY-W-06602A Page 9 of 22) - * - * Clock Frequency 1/Tc Min 7.83 Typ 9.00 Max 9.26 MHz - * - * Period TH - 525 - Clock - * Pulse width THp - 41 - Clock - * Horizontal period THd - 480 - Clock - * Back porch THb - 2 - Clock - * Front porch THf - 2 - Clock - * - * -- Vertical synchronizing -- - * Period TV - 286 - Line - * Pulse width TVp - 10 - Line - * Vertical period TVd - 272 - Line - * Back porch TVb - 2 - Line - * Front porch TVf - 2 - Line - */ - -#define LCD_CLK (8*1000*1000) /* 8MHz */ - -/* # active data to transfer after Horizontal Delay clock */ -#define EPPI_HCOUNT LCD_X_RES - -/* # active lines to transfer after Vertical Delay clock */ -#define EPPI_VCOUNT LCD_Y_RES - -/* Samples per Line = 480 (active data) + 45 (padding) */ -#define EPPI_LINE 525 - -/* Lines per Frame = 272 (active data) + 14 (padding) */ -#define EPPI_FRAME 286 - -/* FS1 (Hsync) Width (Typical)*/ -#define EPPI_FS1W_HBL 41 - -/* FS1 (Hsync) Period (Typical) */ -#define EPPI_FS1P_AVPL EPPI_LINE - -/* Horizontal Delay clock after assertion of Hsync (Typical) */ -#define EPPI_HDELAY 43 - -/* FS2 (Vsync) Width = FS1 (Hsync) Period * 10 */ -#define EPPI_FS2W_LVB (EPPI_LINE * 10) - - /* FS2 (Vsync) Period = FS1 (Hsync) Period * Lines per Frame */ -#define EPPI_FS2P_LAVF (EPPI_LINE * EPPI_FRAME) - -/* Vertical Delay after assertion of Vsync (2 Lines) */ -#define EPPI_VDELAY 12 - -#define EPPI_CLIP 0xFF00FF00 - -/* EPPI Control register configuration value for RGB out - * - EPPI as Output - * GP 2 frame sync mode, - * Internal Clock generation disabled, Internal FS generation enabled, - * Receives samples on EPPI_CLK raising edge, Transmits samples on EPPI_CLK falling edge, - * FS1 & FS2 are active high, - * DLEN = 6 (24 bits for RGB888 out) or 5 (18 bits for RGB666 out) - * DMA Unpacking disabled when RGB Formating is enabled, otherwise DMA unpacking enabled - * Swapping Enabled, - * One (DMA) Channel Mode, - * RGB Formatting Enabled for RGB666 output, disabled for RGB888 output - * Regular watermark - when FIFO is 100% full, - * Urgent watermark - when FIFO is 75% full - */ - -#define EPPI_CONTROL (0x20136E2E) - -static inline u16 get_eppi_clkdiv(u32 target_ppi_clk) -{ - u32 sclk = get_sclk(); - - /* EPPI_CLK = (SCLK) / (2 * (EPPI_CLKDIV[15:0] + 1)) */ - - return (((sclk / target_ppi_clk) / 2) - 1); -} - -void Init_PPI(void) -{ - u16 eppi_clkdiv = get_eppi_clkdiv(LCD_CLK); - - bfin_write_EPPI0_FS1W_HBL(EPPI_FS1W_HBL); - bfin_write_EPPI0_FS1P_AVPL(EPPI_FS1P_AVPL); - bfin_write_EPPI0_FS2W_LVB(EPPI_FS2W_LVB); - bfin_write_EPPI0_FS2P_LAVF(EPPI_FS2P_LAVF); - bfin_write_EPPI0_CLIP(EPPI_CLIP); - - bfin_write_EPPI0_FRAME(EPPI_FRAME); - bfin_write_EPPI0_LINE(EPPI_LINE); - - bfin_write_EPPI0_HCOUNT(EPPI_HCOUNT); - bfin_write_EPPI0_HDELAY(EPPI_HDELAY); - bfin_write_EPPI0_VCOUNT(EPPI_VCOUNT); - bfin_write_EPPI0_VDELAY(EPPI_VDELAY); - - bfin_write_EPPI0_CLKDIV(eppi_clkdiv); - -/* - * DLEN = 6 (24 bits for RGB888 out) or 5 (18 bits for RGB666 out) - * RGB Formatting Enabled for RGB666 output, disabled for RGB888 output - */ -#if defined(CONFIG_VIDEO_RGB666) - bfin_write_EPPI0_CONTROL((EPPI_CONTROL & ~DLENGTH) | DLEN_18 | - RGB_FMT_EN); -#else - bfin_write_EPPI0_CONTROL(((EPPI_CONTROL & ~DLENGTH) | DLEN_24) & - ~RGB_FMT_EN); -#endif - -} - -#define DEB2_URGENT 0x2000 /* DEB2 Urgent */ - -void Init_DMA(void *dst) -{ - -#if defined(CONFIG_DEB_DMA_URGENT) - bfin_write_EBIU_DDRQUE(bfin_read_EBIU_DDRQUE() | DEB2_URGENT); -#endif - - bfin_write_DMA12_START_ADDR(dst); - - /* X count */ - bfin_write_DMA12_X_COUNT((LCD_X_RES * LCD_BPP) / DMA_BUS_SIZE); - bfin_write_DMA12_X_MODIFY(DMA_BUS_SIZE / 8); - - /* Y count */ - bfin_write_DMA12_Y_COUNT(LCD_Y_RES); - bfin_write_DMA12_Y_MODIFY(DMA_BUS_SIZE / 8); - - /* DMA Config */ - bfin_write_DMA12_CONFIG( - WDSIZE_32 | /* 32 bit DMA */ - DMA2D | /* 2D DMA */ - FLOW_AUTO /* autobuffer mode */ - ); -} - -void Init_Ports(void) -{ - const unsigned short pins[] = { - P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3, P_PPI0_D4, - P_PPI0_D5, P_PPI0_D6, P_PPI0_D7, P_PPI0_D8, P_PPI0_D9, - P_PPI0_D10, P_PPI0_D11, P_PPI0_D12, P_PPI0_D13, P_PPI0_D14, - P_PPI0_D15, P_PPI0_D16, P_PPI0_D17, -#if !defined(CONFIG_VIDEO_RGB666) - P_PPI0_D18, P_PPI0_D19, P_PPI0_D20, P_PPI0_D21, P_PPI0_D22, - P_PPI0_D23, -#endif - P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2, 0, - }; - peripheral_request_list(pins, "lcd"); - - gpio_request(GPIO_PE3, "lcd-disp"); - gpio_direction_output(GPIO_PE3, 1); -} - -void EnableDMA(void) -{ - bfin_write_DMA12_CONFIG(bfin_read_DMA12_CONFIG() | DMAEN); -} - -void DisableDMA(void) -{ - bfin_write_DMA12_CONFIG(bfin_read_DMA12_CONFIG() & ~DMAEN); -} - -/* enable and disable PPI functions */ -void EnablePPI(void) -{ - bfin_write_EPPI0_CONTROL(bfin_read_EPPI0_CONTROL() | EPPI_EN); -} - -void DisablePPI(void) -{ - bfin_write_EPPI0_CONTROL(bfin_read_EPPI0_CONTROL() & ~EPPI_EN); -} - -int video_init(void *dst) -{ - Init_Ports(); - Init_DMA(dst); - EnableDMA(); - Init_PPI(); - EnablePPI(); - - return 0; -} - -void video_stop(void) -{ - DisablePPI(); - DisableDMA(); -} - -static void dma_bitblit(void *dst, fastimage_t *logo, int x, int y) -{ - if (dcache_status()) - blackfin_dcache_flush_range(logo->data, logo->data + logo->size); - - bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); - - /* Setup destination start address */ - bfin_write_MDMA_D0_START_ADDR(dst + ((x & -2) * LCD_PIXEL_SIZE) - + (y * LCD_X_RES * LCD_PIXEL_SIZE)); - /* Setup destination xcount */ - bfin_write_MDMA_D0_X_COUNT(logo->width * LCD_PIXEL_SIZE / DMA_SIZE16); - /* Setup destination xmodify */ - bfin_write_MDMA_D0_X_MODIFY(DMA_SIZE16); - - /* Setup destination ycount */ - bfin_write_MDMA_D0_Y_COUNT(logo->height); - /* Setup destination ymodify */ - bfin_write_MDMA_D0_Y_MODIFY((LCD_X_RES - logo->width) * LCD_PIXEL_SIZE + DMA_SIZE16); - - - /* Setup Source start address */ - bfin_write_MDMA_S0_START_ADDR(logo->data); - /* Setup Source xcount */ - bfin_write_MDMA_S0_X_COUNT(logo->width * LCD_PIXEL_SIZE / DMA_SIZE16); - /* Setup Source xmodify */ - bfin_write_MDMA_S0_X_MODIFY(DMA_SIZE16); - - /* Setup Source ycount */ - bfin_write_MDMA_S0_Y_COUNT(logo->height); - /* Setup Source ymodify */ - bfin_write_MDMA_S0_Y_MODIFY(DMA_SIZE16); - - - /* Enable source DMA */ - bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_16 | DMA2D); - SSYNC(); - bfin_write_MDMA_D0_CONFIG(WNR | DMAEN | WDSIZE_16 | DMA2D); - - while (bfin_read_MDMA_D0_IRQ_STATUS() & DMA_RUN); - - bfin_write_MDMA_S0_IRQ_STATUS(bfin_read_MDMA_S0_IRQ_STATUS() | DMA_DONE | DMA_ERR); - bfin_write_MDMA_D0_IRQ_STATUS(bfin_read_MDMA_D0_IRQ_STATUS() | DMA_DONE | DMA_ERR); - -} - -int drv_video_init(void) -{ - int error, devices = 1; - struct stdio_dev videodev; - - u8 *dst; - u32 fbmem_size = LCD_X_RES * LCD_Y_RES * LCD_PIXEL_SIZE + ACTIVE_VIDEO_MEM_OFFSET; - - dst = malloc(fbmem_size); - - if (dst == NULL) { - printf("Failed to alloc FB memory\n"); - return -1; - } - -#ifdef EASYLOGO_ENABLE_GZIP - unsigned char *data = EASYLOGO_DECOMP_BUFFER; - unsigned long src_len = EASYLOGO_ENABLE_GZIP; - error = gunzip(data, bfin_logo.size, bfin_logo.data, &src_len); - bfin_logo.data = data; -#elif defined(EASYLOGO_ENABLE_LZMA) - unsigned char *data = EASYLOGO_DECOMP_BUFFER; - SizeT lzma_len = bfin_logo.size; - error = lzmaBuffToBuffDecompress(data, &lzma_len, - bfin_logo.data, EASYLOGO_ENABLE_LZMA); - bfin_logo.data = data; -#else - error = 0; -#endif - - if (error) { - puts("Failed to decompress logo\n"); - free(dst); - return -1; - } - - memset(dst + ACTIVE_VIDEO_MEM_OFFSET, bfin_logo.data[0], fbmem_size - ACTIVE_VIDEO_MEM_OFFSET); - - dma_bitblit(dst + ACTIVE_VIDEO_MEM_OFFSET, &bfin_logo, - (LCD_X_RES - bfin_logo.width) / 2, - (LCD_Y_RES - bfin_logo.height) / 2); - - video_init(dst); /* Video initialization */ - - memset(&videodev, 0, sizeof(videodev)); - - strcpy(videodev.name, "video"); - - error = stdio_register(&videodev); - - return (error == 0) ? devices : error; -} diff --git a/board/bf561-acvilon/Kconfig b/board/bf561-acvilon/Kconfig deleted file mode 100644 index ba1580d87b..0000000000 --- a/board/bf561-acvilon/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_BF561_ACVILON - -config SYS_BOARD - default "bf561-acvilon" - -config SYS_CONFIG_NAME - default "bf561-acvilon" - -endif diff --git a/board/bf561-acvilon/MAINTAINERS b/board/bf561-acvilon/MAINTAINERS deleted file mode 100644 index 056ee0bdb7..0000000000 --- a/board/bf561-acvilon/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -BF561-ACVILON BOARD -M: Valentin Yakovenkov <yakovenkov@niistt.ru> -S: Maintained -F: board/bf561-acvilon/ -F: include/configs/bf561-acvilon.h -F: configs/bf561-acvilon_defconfig diff --git a/board/bf561-acvilon/Makefile b/board/bf561-acvilon/Makefile deleted file mode 100644 index 08e2fad61e..0000000000 --- a/board/bf561-acvilon/Makefile +++ /dev/null @@ -1,14 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) 2005-2007 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# (C) Copyright 2009 CJSC "NII STT", Russia, Smolensk -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := bf561-acvilon.o diff --git a/board/bf561-acvilon/bf561-acvilon.c b/board/bf561-acvilon/bf561-acvilon.c deleted file mode 100644 index da4c8444e1..0000000000 --- a/board/bf561-acvilon/bf561-acvilon.c +++ /dev/null @@ -1,38 +0,0 @@ -/* - * File: board/bf561-acvilon/bf561-acvilon.c - * Based on: board/bf561-ezkit/bf561-ezkit.c - * Author: - * - * Created: 2009-06-23 - * Description: Acvilon System On Module board file - * - * Modified: - * Copyright 2009 CJSC "NII STT", http://www.niistt.ru/ - * Copyright (c) 2005-2008 Analog Devices Inc. - * - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * Bugs: - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <netdev.h> - -DECLARE_GLOBAL_DATA_PTR; - -int checkboard(void) -{ - printf("Board: CJSC \"NII STT\"-=Acvilon Platform=- [U-Boot]\n"); - printf(" Support: http://www.niistt.ru/\n"); - return 0; -} - -#ifdef CONFIG_SMC911X -int board_eth_init(bd_t *bis) -{ - return smc911x_initialize(0, CONFIG_SMC911X_BASE); -} -#endif diff --git a/board/bf561-acvilon/config.mk b/board/bf561-acvilon/config.mk deleted file mode 100644 index 854d7dbb86..0000000000 --- a/board/bf561-acvilon/config.mk +++ /dev/null @@ -1,11 +0,0 @@ -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -# Set some default LDR flags based on boot mode. -LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 diff --git a/board/bf561-ezkit/Kconfig b/board/bf561-ezkit/Kconfig deleted file mode 100644 index 495a5c51eb..0000000000 --- a/board/bf561-ezkit/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_BF561_EZKIT - -config SYS_BOARD - default "bf561-ezkit" - -config SYS_CONFIG_NAME - default "bf561-ezkit" - -endif diff --git a/board/bf561-ezkit/MAINTAINERS b/board/bf561-ezkit/MAINTAINERS deleted file mode 100644 index 5ced3bb7d6..0000000000 --- a/board/bf561-ezkit/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -BF561-EZKIT BOARD -M: Sonic Zhang <sonic.adi@gmail.com> -S: Maintained -F: board/bf561-ezkit/ -F: include/configs/bf561-ezkit.h -F: configs/bf561-ezkit_defconfig diff --git a/board/bf561-ezkit/Makefile b/board/bf561-ezkit/Makefile deleted file mode 100644 index 3d534d2486..0000000000 --- a/board/bf561-ezkit/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) 2005-2007 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := bf561-ezkit.o diff --git a/board/bf561-ezkit/bf561-ezkit.c b/board/bf561-ezkit/bf561-ezkit.c deleted file mode 100644 index 534c39ca89..0000000000 --- a/board/bf561-ezkit/bf561-ezkit.c +++ /dev/null @@ -1,30 +0,0 @@ -/* - * U-Boot - main board file - * - * Copyright (c) 2005-2008 Analog Devices Inc. - * - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <netdev.h> -#include <asm/io.h> - -DECLARE_GLOBAL_DATA_PTR; - -int checkboard(void) -{ - printf("Board: ADI BF561 EZ-Kit Lite board\n"); - printf(" Support: http://blackfin.uclinux.org/\n"); - return 0; -} - -#ifdef CONFIG_SMC91111 -int board_eth_init(bd_t *bis) -{ - return smc91111_initialize(0, CONFIG_SMC91111_BASE); -} -#endif diff --git a/board/bf561-ezkit/config.mk b/board/bf561-ezkit/config.mk deleted file mode 100644 index 854d7dbb86..0000000000 --- a/board/bf561-ezkit/config.mk +++ /dev/null @@ -1,11 +0,0 @@ -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -# Set some default LDR flags based on boot mode. -LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 diff --git a/board/bf609-ezkit/Kconfig b/board/bf609-ezkit/Kconfig deleted file mode 100644 index 7992e1ec86..0000000000 --- a/board/bf609-ezkit/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_BF609_EZKIT - -config SYS_BOARD - default "bf609-ezkit" - -config SYS_CONFIG_NAME - default "bf609-ezkit" - -endif diff --git a/board/bf609-ezkit/MAINTAINERS b/board/bf609-ezkit/MAINTAINERS deleted file mode 100644 index acfc6c7a86..0000000000 --- a/board/bf609-ezkit/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -BF609-EZKIT BOARD -M: Sonic Zhang <sonic.adi@gmail.com> -S: Maintained -F: board/bf609-ezkit/ -F: include/configs/bf609-ezkit.h -F: configs/bf609-ezkit_defconfig diff --git a/board/bf609-ezkit/Makefile b/board/bf609-ezkit/Makefile deleted file mode 100644 index e4184ee2b6..0000000000 --- a/board/bf609-ezkit/Makefile +++ /dev/null @@ -1,13 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := bf609-ezkit.o -obj-$(CONFIG_BFIN_SOFT_SWITCH) += soft_switch.o diff --git a/board/bf609-ezkit/bf609-ezkit.c b/board/bf609-ezkit/bf609-ezkit.c deleted file mode 100644 index c993ca6d91..0000000000 --- a/board/bf609-ezkit/bf609-ezkit.c +++ /dev/null @@ -1,68 +0,0 @@ -/* - * U-Boot - main board file - * - * Copyright (c) 2008-2011 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <netdev.h> -#include <asm/blackfin.h> -#include <asm/io.h> -#include <asm/sdh.h> -#include <asm/portmux.h> -#include "soft_switch.h" - -int checkboard(void) -{ - printf("Board: ADI BF609 EZ-Kit board\n"); - printf(" Support: http://blackfin.uclinux.org/\n"); - return 0; -} - -int board_early_init_f(void) -{ - static const unsigned short pins[] = { - P_A3, P_A4, P_A5, P_A6, P_A7, P_A8, P_A9, P_A10, P_A11, P_A12, - P_A13, P_A14, P_A15, P_A16, P_A17, P_A18, P_A19, P_A20, P_A21, - P_A22, P_A23, P_A24, P_A25, P_NORCK, 0, - }; - peripheral_request_list(pins, "smc0"); - - return 0; -} - -#ifdef CONFIG_ETH_DESIGNWARE -int board_eth_init(bd_t *bis) -{ - int ret = 0; - - if (CONFIG_DW_PORTS & 1) { - static const unsigned short pins[] = P_RMII0; - if (!peripheral_request_list(pins, "emac0")) - ret += designware_initialize(EMAC0_MACCFG, 0); - } - if (CONFIG_DW_PORTS & 2) { - static const unsigned short pins[] = P_RMII1; - if (!peripheral_request_list(pins, "emac1")) - ret += designware_initialize(EMAC1_MACCFG, 0); - } - - return ret; -} -#endif - -#ifdef CONFIG_BFIN_SDH -int board_mmc_init(bd_t *bis) -{ - return bfin_mmc_init(bis); -} -#endif - -/* miscellaneous platform dependent initialisations */ -int misc_init_r(void) -{ - printf("other init\n"); - return setup_board_switches(); -} diff --git a/board/bf609-ezkit/soft_switch.c b/board/bf609-ezkit/soft_switch.c deleted file mode 100644 index 7c117ea997..0000000000 --- a/board/bf609-ezkit/soft_switch.c +++ /dev/null @@ -1,171 +0,0 @@ -/* - * U-Boot - main board file - * - * Copyright (c) 2008-2011 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <asm/blackfin.h> -#include <asm/io.h> -#include <i2c.h> -#include "soft_switch.h" - -struct switch_config { - uchar dir0; /* IODIRA */ - uchar dir1; /* IODIRB */ - uchar value0; /* OLATA */ - uchar value1; /* OLATB */ -}; - -static struct switch_config switch_config_array[NUM_SWITCH] = { - { -/* - U45 Port A U45 Port B - - 7--------------- RMII_CLK_EN | 7--------------- ~TEMP_THERM_EN - | 6------------- ~CNT0ZM_EN | | 6------------- ~TEMP_IRQ_EN - | | 5----------- ~CNT0DG_EN | | | 5----------- ~UART0CTS_146_EN - | | | 4--------- ~CNT0UD_EN | | | | 4--------- ~UART0CTS_RST_EN - | | | | 3------- ~CAN0RX_EN | | | | | 3------- ~UART0CTS_RTS_LPBK - | | | | | 2----- ~CAN0_ERR_EN | | | | | | 2----- ~UART0CTS_EN - | | | | | | 1--- ~CAN_STB | | | | | | | 1--- ~UART0RX_EN - | | | | | | | 0- CAN_EN | | | | | | | | 0- ~UART0RTS_EN - | | | | | | | | | | | | | | | | | - O O O O O O O O | O O O O O O O O (I/O direction) - 1 0 0 0 0 0 1 1 | 1 1 1 1 1 0 0 0 (value being set) -*/ - .dir0 = 0x0, /* all output */ - .dir1 = 0x0, /* all output */ - .value0 = RMII_CLK_EN | CAN_STB | CAN_EN, - .value1 = TEMP_THERM_EN | TEMP_IRQ_EN | UART0CTS_146_EN - | UART0CTS_RST_EN | UART0CTS_RTS_LPBK, - }, - { -/* - U46 Port A U46 Port B - - 7--------------- ~LED4_GPIO_EN | 7--------------- EMPTY - | 6------------- ~LED3_GPIO_EN | | 6------------- ~SPI0D3_EN - | | 5----------- ~LED2_GPIO_EN | | | 5----------- ~SPI0D2_EN - | | | 4--------- ~LED1_GPIO_EN | | | | 4--------- ~SPIFLASH_CS_EN - | | | | 3------- SMC0_LP0_EN | | | | | 3------- ~SD_WP_EN - | | | | | 2----- EMPTY | | | | | | 2----- ~SD_CD_EN - | | | | | | 1--- SMC0_EPPI2 | | | | | | | 1--- ~PUSHBUTTON2_EN - _LP1_SWITCH - | | | | | | | 0- OVERRIDE_SMC0 | | | | | | | | 0- ~PUSHBUTTON1_EN - _LP0_BOOT - | | | | | | | | | | | | | | | | | - O O O O O O O O | O O O O O O O O (I/O direction) - 0 0 0 0 0 X 0 1 | X 0 0 0 0 0 0 0 (value being set) -*/ - .dir0 = 0x0, /* all output */ - .dir1 = 0x0, /* all output */ -#ifdef CONFIG_BFIN_LINKPORT - .value0 = OVERRIDE_SMC0_LP0_BOOT, -#else - .value0 = SMC0_EPPI2_LP1_SWITCH, -#endif - .value1 = 0x0, - }, - { -/* - U47 Port A U47 Port B - - 7--------------- ~PD2_SPI0MISO | 7--------------- EMPTY - _EI3_EN - | 6------------- ~PD1_SPI0D3 | | 6------------- EMPTY - _EPPI1D17 - _SPI0SEL2 - _EI3_EN - | | 5----------- ~PD0_SPI0D2 | | | 5----------- EMPTY - _EPPI1D16 - _SPI0SEL3 - _EI3_EN - | | | 4--------- ~WAKE_PUSH | | | | 4--------- EMPTY - BUTTON_EN - | | | | 3------- ~ETHERNET_EN | | | | | 3------- EMPTY - | | | | | 2----- PHYAD0 | | | | | | 2----- EMPTY - | | | | | | 1--- PHY_PWR | | | | | | | 1--- ~PD4_SPI0CK_EI3_EN - _DWN_INT - | | | | | | | 0- ~PHYINT_EN | | | | | | | | 0- ~PD3_SPI0MOSI_EI3_EN - | | | | | | | | | | | | | | | | | - O O O O O I I O | O O O O O O O O (I/O direction) - 1 1 1 0 0 0 0 0 | X X X X X X 1 1 (value being set) -*/ - .dir0 = 0x6, /* bits 1 and 2 input, all others output */ - .dir1 = 0x0, /* all output */ - .value0 = PD1_SPI0D3_EN | PD0_SPI0D2_EN, - .value1 = 0, - }, -}; - -static int setup_soft_switch(int addr, struct switch_config *config) -{ - int ret = 0; - - ret = i2c_write(addr, OLATA, 1, &config->value0, 1); - if (ret) - return ret; - ret = i2c_write(addr, OLATB, 1, &config->value1, 1); - if (ret) - return ret; - - ret = i2c_write(addr, IODIRA, 1, &config->dir0, 1); - if (ret) - return ret; - return i2c_write(addr, IODIRB, 1, &config->dir1, 1); -} - -int config_switch_bit(int addr, int port, int bit, int dir, uchar value) -{ - int ret, data_reg, dir_reg; - uchar tmp; - - if (port == IO_PORT_A) { - data_reg = OLATA; - dir_reg = IODIRA; - } else { - data_reg = OLATB; - dir_reg = IODIRB; - } - - if (dir == IO_PORT_INPUT) { - ret = i2c_read(addr, dir_reg, 1, &tmp, 1); - if (ret) - return ret; - tmp |= bit; - return i2c_write(addr, dir_reg, 1, &tmp, 1); - } else { - ret = i2c_read(addr, data_reg, 1, &tmp, 1); - if (ret) - return ret; - if (value) - tmp |= bit; - else - tmp &= ~bit; - ret = i2c_write(addr, data_reg, 1, &tmp, 1); - if (ret) - return ret; - ret = i2c_read(addr, dir_reg, 1, &tmp, 1); - if (ret) - return ret; - tmp &= ~bit; - return i2c_write(addr, dir_reg, 1, &tmp, 1); - } -} - -int setup_board_switches(void) -{ - int ret; - int i; - - for (i = 0; i < NUM_SWITCH; i++) { - ret = setup_soft_switch(SWITCH_ADDR + i, - &switch_config_array[i]); - if (ret) - return ret; - } - return 0; -} diff --git a/board/bf609-ezkit/soft_switch.h b/board/bf609-ezkit/soft_switch.h deleted file mode 100644 index 75d64e279a..0000000000 --- a/board/bf609-ezkit/soft_switch.h +++ /dev/null @@ -1,80 +0,0 @@ -/* - * U-Boot - main board file - * - * Copyright (c) 2008-2011 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#ifndef __BOARD_SOFT_SWITCH_H__ -#define __BOARD_SOFT_SWITCH_H__ - -#include <asm/soft_switch.h> - -/* switch 0 port A */ -#define CAN_EN 0x1 -#define CAN_STB 0x2 -#define CAN0_ERR_EN 0x4 -#define CAN0RX_EN 0x8 -#define CNT0UD_EN 0x10 -#define CNT0DG_EN 0x20 -#define CNT0ZM_EN 0x40 -#define RMII_CLK_EN 0x80 - -/* switch 0 port B */ -#define UART0RTS_EN 0x1 -#define UART0RX_EN 0x2 -#define UART0CTS_EN 0x4 -#define UART0CTS_RTS_LPBK 0x8 -#define UART0CTS_RST_EN 0x10 -#define UART0CTS_146_EN 0x20 -#define TEMP_IRQ_EN 0x40 -#define TEMP_THERM_EN 0x80 - -/* switch 1 port A */ -#define OVERRIDE_SMC0_LP0_BOOT 0x1 -#define SMC0_EPPI2_LP1_SWITCH 0x2 -#define SMC0_LP0_EN 0x8 -#define LED1_GPIO_EN 0x10 -#define LED2_GPIO_EN 0x20 -#define LED3_GPIO_EN 0x40 -#define LED4_GPIO_EN 0x80 - -/* switch 1 port B */ -#define PUSHBUTTON1_EN 0x1 -#define PUSHBUTTON2_EN 0x2 -#define SD_CD_EN 0x4 -#define SD_WP_EN 0x8 -#define SPIFLASH_CS_EN 0x10 -#define SPI0D2_EN 0x20 -#define SPI0D3_EN 0x40 - -/* switch 2 port A */ -#define PHYINT_EN 0x1 -#define PHY_PWR_DWN_INT 0x2 -#define PHYAD0 0x4 -#define ETHERNET_EN 0x8 -#define WAKE_PUSHBUTTON_EN 0x10 -#define PD0_SPI0D2_EN 0x20 -#define PD1_SPI0D3_EN 0x40 -#define PD2_SPI0MISO_EN 0x80 - -/* switch 2 port B */ -#define PD3_SPI0MOSI_EN 0x1 -#define PD4_SPI0CK_EN 0x2 - -#ifdef CONFIG_BFIN_BOARD_VERSION_1_0 -#define SWITCH_ADDR 0x21 -#else -#define SWITCH_ADDR 0x20 -#endif - -#define NUM_SWITCH 3 -#define IODIRA 0x0 -#define IODIRB 0x1 -#define OLATA 0x14 -#define OLATB 0x15 - -int setup_board_switches(void); - -#endif /* __BOARD_SOFT_SWITCH_H__ */ diff --git a/board/blackstamp/Kconfig b/board/blackstamp/Kconfig deleted file mode 100644 index 7ce086a78f..0000000000 --- a/board/blackstamp/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_BLACKSTAMP - -config SYS_BOARD - default "blackstamp" - -config SYS_CONFIG_NAME - default "blackstamp" - -endif diff --git a/board/blackstamp/MAINTAINERS b/board/blackstamp/MAINTAINERS deleted file mode 100644 index a0d72c6e20..0000000000 --- a/board/blackstamp/MAINTAINERS +++ /dev/null @@ -1,8 +0,0 @@ -BLACKSTAMP BOARD -M: Wojtek Skulski <skulski@pas.rochester.edu> -M: Wojtek Skulski <info@skutek.com> -M: Benjamin Matthews <mben12@gmail.com> -S: Maintained -F: board/blackstamp/ -F: include/configs/blackstamp.h -F: configs/blackstamp_defconfig diff --git a/board/blackstamp/Makefile b/board/blackstamp/Makefile deleted file mode 100644 index 2ae79da071..0000000000 --- a/board/blackstamp/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := blackstamp.o diff --git a/board/blackstamp/blackstamp.c b/board/blackstamp/blackstamp.c deleted file mode 100644 index d233b8a7fc..0000000000 --- a/board/blackstamp/blackstamp.c +++ /dev/null @@ -1,41 +0,0 @@ -/* - * U-Boot - blackstamp.c BlackStamp board specific routines - * Most code stolen from boards/bf533-stamp/bf533-stamp.c - * Edited to the BlackStamp by Ben Matthews for UR LLE - * - * Copyright (c) 2005-2009 Analog Devices Inc. - * - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <netdev.h> -#include <asm/gpio.h> - -DECLARE_GLOBAL_DATA_PTR; - -int checkboard(void) -{ - printf("Board: BlackStamp\n"); - printf("Support: http://blackfin.uclinux.org/gf/project/blackstamp/\n"); - return 0; -} - -#ifdef SHARED_RESOURCES -void swap_to(int device_id) -{ - gpio_request(GPIO_PF0, "eth_flash_swap"); - gpio_direction_output(GPIO_PF0, device_id == ETHERNET); - SSYNC(); -} -#endif - -#ifdef CONFIG_SMC91111 -int board_eth_init(bd_t *bis) -{ - return smc91111_initialize(0, CONFIG_SMC91111_BASE); -} -#endif diff --git a/board/blackvme/Kconfig b/board/blackvme/Kconfig deleted file mode 100644 index 5e73f84eff..0000000000 --- a/board/blackvme/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_BLACKVME - -config SYS_BOARD - default "blackvme" - -config SYS_CONFIG_NAME - default "blackvme" - -endif diff --git a/board/blackvme/MAINTAINERS b/board/blackvme/MAINTAINERS deleted file mode 100644 index 3f8b32c884..0000000000 --- a/board/blackvme/MAINTAINERS +++ /dev/null @@ -1,8 +0,0 @@ -BLACKVME BOARD -M: Wojtek Skulski <skulski@pas.rochester.edu> -M: Wojtek Skulski <info@skutek.com> -M: Benjamin Matthews <mben12@gmail.com> -S: Maintained -F: board/blackvme/ -F: include/configs/blackvme.h -F: configs/blackvme_defconfig diff --git a/board/blackvme/Makefile b/board/blackvme/Makefile deleted file mode 100644 index 9a617757ea..0000000000 --- a/board/blackvme/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := blackvme.o diff --git a/board/blackvme/blackvme.c b/board/blackvme/blackvme.c deleted file mode 100644 index d8932ed910..0000000000 --- a/board/blackvme/blackvme.c +++ /dev/null @@ -1,31 +0,0 @@ -/* U-Boot - blackvme.c board specific routines - * (c) Wojtek Skulski 2010 info@skutek.com - * Board info: http://www.skutek.com - * Copyright (c) 2005-2009 Analog Devices Inc. - * - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <netdev.h> - -int checkboard(void) -{ - printf("Board: BlackVME\n"); - printf("Support: http://www.skutek.com/\n"); - return 0; -} - -#ifdef CONFIG_DRIVER_AX88180 -/* - * The ax88180 driver had to be patched to work around a bug - * in Marvell 88E1111 B2 silicon. E-mail me for explanations. - */ -int board_eth_init(bd_t *bis) -{ - return ax88180_initialize(bis); -} -#endif /* CONFIG_DRIVER_AX88180 */ diff --git a/board/br4/Kconfig b/board/br4/Kconfig deleted file mode 100644 index a10a06053a..0000000000 --- a/board/br4/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_BR4 - -config SYS_BOARD - default "br4" - -config SYS_CONFIG_NAME - default "br4" - -endif diff --git a/board/br4/MAINTAINERS b/board/br4/MAINTAINERS deleted file mode 100644 index 4085da5452..0000000000 --- a/board/br4/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -BR4 BOARD -M: Dimitar Penev <dpn@switchfin.org> -S: Maintained -F: board/br4/ -F: include/configs/br4.h -F: configs/br4_defconfig diff --git a/board/br4/Makefile b/board/br4/Makefile deleted file mode 100644 index c6c03aba09..0000000000 --- a/board/br4/Makefile +++ /dev/null @@ -1,14 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) Switchfin Org. <dpn@switchfin.org> -# -# Copyright (c) 2005-2007 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := br4.o diff --git a/board/br4/br4.c b/board/br4/br4.c deleted file mode 100644 index 6f3f170a32..0000000000 --- a/board/br4/br4.c +++ /dev/null @@ -1,30 +0,0 @@ -/* - * U-Boot - main board file - * - * Copyright (c) Switchfin Org. <dpn@switchfin.org> - * - * Copyright (c) 2005-2008 Analog Devices Inc. - * - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <net.h> -#include <netdev.h> - -int checkboard(void) -{ - printf("Board: Switchvoice BR4 Appliance\n"); - printf(" Support: http://www.switchvoice.com/\n"); - return 0; -} - -#ifdef CONFIG_BFIN_MAC -int board_eth_init(bd_t *bis) -{ - return bfin_EMAC_initialize(bis); -} -#endif diff --git a/board/broadcom/bcm23550_w1d/bcm23550_w1d.c b/board/broadcom/bcm23550_w1d/bcm23550_w1d.c index 533e99ece6..5f4c634362 100644 --- a/board/broadcom/bcm23550_w1d/bcm23550_w1d.c +++ b/board/broadcom/bcm23550_w1d/bcm23550_w1d.c @@ -62,10 +62,12 @@ int dram_init(void) } /* This is called after dram_init() so use get_ram_size result */ -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; gd->bd->bi_dram[0].size = gd->ram_size; + + return 0; } #ifdef CONFIG_MMC_SDHCI_KONA diff --git a/board/broadcom/bcm28155_ap/bcm28155_ap.c b/board/broadcom/bcm28155_ap/bcm28155_ap.c index b868812972..f5b94f6430 100644 --- a/board/broadcom/bcm28155_ap/bcm28155_ap.c +++ b/board/broadcom/bcm28155_ap/bcm28155_ap.c @@ -69,10 +69,12 @@ int dram_init(void) } /* This is called after dram_init() so use get_ram_size result */ -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; gd->bd->bi_dram[0].size = gd->ram_size; + + return 0; } #ifdef CONFIG_MMC_SDHCI_KONA diff --git a/board/broadcom/bcm958712k/MAINTAINERS b/board/broadcom/bcm958712k/MAINTAINERS new file mode 100644 index 0000000000..024fb1447d --- /dev/null +++ b/board/broadcom/bcm958712k/MAINTAINERS @@ -0,0 +1,6 @@ +BCM958712K BOARD +M: Jon Mason <jon.mason@broadcom.com> +S: Maintained +F: board/broadcom/bcmns2/ +F: include/configs/bcm_northstar2.h +F: configs/bcm958712k_defconfig diff --git a/board/broadcom/bcm_ep/board.c b/board/broadcom/bcm_ep/board.c index c28b203cea..a409622788 100644 --- a/board/broadcom/bcm_ep/board.c +++ b/board/broadcom/bcm_ep/board.c @@ -37,10 +37,12 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; gd->bd->bi_dram[0].size = gd->ram_size; + + return 0; } int board_early_init_f(void) diff --git a/board/broadcom/bcmns2/Kconfig b/board/broadcom/bcmns2/Kconfig new file mode 100644 index 0000000000..3ac67249c4 --- /dev/null +++ b/board/broadcom/bcmns2/Kconfig @@ -0,0 +1,15 @@ +if TARGET_BCMNS2 + +config SYS_BOARD + default "bcmns2" + +config SYS_VENDOR + default "broadcom" + +config SYS_SOC + default "ns2" + +config SYS_CONFIG_NAME + default "bcm_northstar2" + +endif diff --git a/board/broadcom/bcmns2/Makefile b/board/broadcom/bcmns2/Makefile new file mode 100644 index 0000000000..f6ddd800b1 --- /dev/null +++ b/board/broadcom/bcmns2/Makefile @@ -0,0 +1,7 @@ +# +# Copyright 2016 Broadcom Ltd. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := northstar2.o diff --git a/board/broadcom/bcmns2/northstar2.c b/board/broadcom/bcmns2/northstar2.c new file mode 100644 index 0000000000..10279a5763 --- /dev/null +++ b/board/broadcom/bcmns2/northstar2.c @@ -0,0 +1,60 @@ +/* + * (C) Copyright 2016 Broadcom Ltd. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include <common.h> +#include <asm/system.h> +#include <asm/armv8/mmu.h> + +static struct mm_region ns2_mem_map[] = { + { + .virt = 0x0UL, + .phys = 0x0UL, + .size = 0x80000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + .virt = 0x80000000UL, + .phys = 0x80000000UL, + .size = 0xff80000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + /* List terminator */ + 0, + } +}; + +struct mm_region *mem_map = ns2_mem_map; + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + return 0; +} + +int dram_init(void) +{ + gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, + PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE); + return 0; +} + +int dram_init_banksize(void) +{ + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + + gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE + PHYS_SDRAM_1_SIZE; + gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; + + return 0; +} + +void reset_cpu(ulong addr) +{ + psci_system_reset(); +} diff --git a/board/cadence/xtfpga/xtfpga.c b/board/cadence/xtfpga/xtfpga.c index 5899aa6362..39b9b12567 100644 --- a/board/cadence/xtfpga/xtfpga.c +++ b/board/cadence/xtfpga/xtfpga.c @@ -48,10 +48,12 @@ int checkboard(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_memstart = PHYSADDR(CONFIG_SYS_SDRAM_BASE); gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE; + + return 0; } int board_postclk_init(void) diff --git a/board/canmb/canmb.c b/board/canmb/canmb.c index 15c934d29b..54de0e2673 100644 --- a/board/canmb/canmb.c +++ b/board/canmb/canmb.c @@ -18,6 +18,8 @@ #include "mt48lc16m32s2-75.h" #endif +DECLARE_GLOBAL_DATA_PTR; + #ifndef CONFIG_SYS_RAMBOOT static void sdram_start (int hi_addr) { @@ -60,12 +62,12 @@ static void sdram_start (int hi_addr) #endif /* - * ATTENTION: Although partially referenced initdram does NOT make real use + * ATTENTION: Although partially referenced dram_init does NOT make real use * use of CONFIG_SYS_SDRAM_BASE. The code does not work if CONFIG_SYS_SDRAM_BASE * is something else than 0x00000000. */ -phys_size_t initdram (int board_type) +int dram_init(void) { ulong dramsize = 0; ulong dramsize2 = 0; @@ -163,7 +165,9 @@ phys_size_t initdram (int board_type) #endif /* CONFIG_SYS_RAMBOOT */ - return dramsize + dramsize2; + gd->ram_size = dramsize + dramsize2; + + return 0; } int checkboard (void) diff --git a/board/cirrus/edb93xx/edb93xx.c b/board/cirrus/edb93xx/edb93xx.c index 51ff16215e..720b490f2b 100644 --- a/board/cirrus/edb93xx/edb93xx.c +++ b/board/cirrus/edb93xx/edb93xx.c @@ -216,9 +216,11 @@ static unsigned dram_init_banksize_int(int print) return dram_total; } -void dram_init_banksize(void) +int dram_init_banksize(void) { dram_init_banksize_int(0); + + return 0; } /* called in board_init_f (before relocation) */ diff --git a/board/cm-bf527/Kconfig b/board/cm-bf527/Kconfig deleted file mode 100644 index 8d14179124..0000000000 --- a/board/cm-bf527/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_CM_BF527 - -config SYS_BOARD - default "cm-bf527" - -config SYS_CONFIG_NAME - default "cm-bf527" - -endif diff --git a/board/cm-bf527/MAINTAINERS b/board/cm-bf527/MAINTAINERS deleted file mode 100644 index fefcfcfb7d..0000000000 --- a/board/cm-bf527/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -CM-BF527 BOARD -#M: Bluetechnix Tinyboards <bluetechnix@blackfin.uclinux.org> -S: Orphan (since 2014-03) -F: board/cm-bf527/ -F: include/configs/cm-bf527.h -F: configs/cm-bf527_defconfig diff --git a/board/cm-bf527/Makefile b/board/cm-bf527/Makefile deleted file mode 100644 index 1d662c6684..0000000000 --- a/board/cm-bf527/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := cm-bf527.o gpio_cfi_flash.o diff --git a/board/cm-bf527/cm-bf527.c b/board/cm-bf527/cm-bf527.c deleted file mode 100644 index 0c2138b082..0000000000 --- a/board/cm-bf527/cm-bf527.c +++ /dev/null @@ -1,62 +0,0 @@ -/* - * U-Boot - main board file - * - * Copyright (c) 2005-2009 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <config.h> -#include <net.h> -#include <netdev.h> -#include <asm/blackfin.h> -#include <asm/mach-common/bits/otp.h> -#include "../cm-bf537e/gpio_cfi_flash.h" - -DECLARE_GLOBAL_DATA_PTR; - -int checkboard(void) -{ - printf("Board: Bluetechnix CM-BF527 board\n"); - printf(" Support: http://www.bluetechnix.at/\n"); - return 0; -} - -#ifdef CONFIG_BFIN_MAC -static void board_init_enetaddr(uchar *mac_addr) -{ - /* the MAC is stored in OTP memory page 0xDF */ - uint32_t ret; - uint64_t otp_mac; - - ret = bfrom_OtpRead(0xDF, OTP_LOWER_HALF, &otp_mac); - if (!(ret & OTP_MASTER_ERROR)) { - uchar *otp_mac_p = (uchar *)&otp_mac; - - for (ret = 0; ret < 6; ++ret) - mac_addr[ret] = otp_mac_p[5 - ret]; - - if (is_valid_ethaddr(mac_addr)) - eth_setenv_enetaddr("ethaddr", mac_addr); - } -} - -int board_eth_init(bd_t *bis) -{ - return bfin_EMAC_initialize(bis); -} -#endif - -int misc_init_r(void) -{ -#ifdef CONFIG_BFIN_MAC - uchar enetaddr[6]; - if (!eth_getenv_enetaddr("ethaddr", enetaddr)) - board_init_enetaddr(enetaddr); -#endif - - gpio_cfi_flash_init(); - - return 0; -} diff --git a/board/cm-bf527/gpio_cfi_flash.c b/board/cm-bf527/gpio_cfi_flash.c deleted file mode 100644 index 6e62fff230..0000000000 --- a/board/cm-bf527/gpio_cfi_flash.c +++ /dev/null @@ -1,3 +0,0 @@ -#define GPIO_PIN_1 GPIO_PH9 -#define GPIO_PIN_2 GPIO_PG11 -#include "../cm-bf537e/gpio_cfi_flash.c" diff --git a/board/cm-bf533/Kconfig b/board/cm-bf533/Kconfig deleted file mode 100644 index cedd7529d5..0000000000 --- a/board/cm-bf533/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_CM_BF533 - -config SYS_BOARD - default "cm-bf533" - -config SYS_CONFIG_NAME - default "cm-bf533" - -endif diff --git a/board/cm-bf533/MAINTAINERS b/board/cm-bf533/MAINTAINERS deleted file mode 100644 index 0bf51fb1ea..0000000000 --- a/board/cm-bf533/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -CM-BF533 BOARD -#M: Bluetechnix Tinyboards <bluetechnix@blackfin.uclinux.org> -S: Orphan (since 2014-03) -F: board/cm-bf533/ -F: include/configs/cm-bf533.h -F: configs/cm-bf533_defconfig diff --git a/board/cm-bf533/Makefile b/board/cm-bf533/Makefile deleted file mode 100644 index 41e100da1b..0000000000 --- a/board/cm-bf533/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := cm-bf533.o diff --git a/board/cm-bf533/cm-bf533.c b/board/cm-bf533/cm-bf533.c deleted file mode 100644 index 02ef076735..0000000000 --- a/board/cm-bf533/cm-bf533.c +++ /dev/null @@ -1,26 +0,0 @@ -/* - * U-Boot - main board file - * - * Copyright (c) 2005-2008 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <netdev.h> - -DECLARE_GLOBAL_DATA_PTR; - -int checkboard(void) -{ - printf("Board: Bluetechnix CM-BF533 board\n"); - printf(" Support: http://www.bluetechnix.at/\n"); - return 0; -} - -#ifdef CONFIG_SMC91111 -int board_eth_init(bd_t *bis) -{ - return smc91111_initialize(0, CONFIG_SMC91111_BASE); -} -#endif diff --git a/board/cm-bf533/config.mk b/board/cm-bf533/config.mk deleted file mode 100644 index 7f9138b09b..0000000000 --- a/board/cm-bf533/config.mk +++ /dev/null @@ -1,11 +0,0 @@ -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -# Set some default LDR flags based on boot mode. -LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8 diff --git a/board/cm-bf537e/Kconfig b/board/cm-bf537e/Kconfig deleted file mode 100644 index af2e548cb9..0000000000 --- a/board/cm-bf537e/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_CM_BF537E - -config SYS_BOARD - default "cm-bf537e" - -config SYS_CONFIG_NAME - default "cm-bf537e" - -endif diff --git a/board/cm-bf537e/MAINTAINERS b/board/cm-bf537e/MAINTAINERS deleted file mode 100644 index 63d242893e..0000000000 --- a/board/cm-bf537e/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -CM-BF537E BOARD -#M: Bluetechnix Tinyboards <bluetechnix@blackfin.uclinux.org> -S: Orphan (since 2014-03) -F: board/cm-bf537e/ -F: include/configs/cm-bf537e.h -F: configs/cm-bf537e_defconfig diff --git a/board/cm-bf537e/Makefile b/board/cm-bf537e/Makefile deleted file mode 100644 index 317098cf2e..0000000000 --- a/board/cm-bf537e/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := cm-bf537e.o gpio_cfi_flash.o diff --git a/board/cm-bf537e/cm-bf537e.c b/board/cm-bf537e/cm-bf537e.c deleted file mode 100644 index 7e4cfc2116..0000000000 --- a/board/cm-bf537e/cm-bf537e.c +++ /dev/null @@ -1,44 +0,0 @@ -/* - * U-Boot - main board file - * - * Copyright (c) 2005-2009 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <config.h> -#include <command.h> -#include <net.h> -#include <netdev.h> -#include <asm/blackfin.h> -#include "gpio_cfi_flash.h" - -DECLARE_GLOBAL_DATA_PTR; - -int checkboard(void) -{ - printf("Board: Bluetechnix CM-BF537E board\n"); - printf(" Support: http://www.bluetechnix.at/\n"); - return 0; -} - -#ifndef CONFIG_BFIN_MAC -# define bfin_EMAC_initialize(x) 1 -#endif -#ifndef CONFIG_SMC911X -# define smc911x_initialize(n, x) 1 -#endif -int board_eth_init(bd_t *bis) -{ - /* return ok if at least 1 eth device works */ - return bfin_EMAC_initialize(bis) & - smc911x_initialize(0, CONFIG_SMC911X_BASE); -} - -int misc_init_r(void) -{ - gpio_cfi_flash_init(); - - return 0; -} diff --git a/board/cm-bf537e/config.mk b/board/cm-bf537e/config.mk deleted file mode 100644 index 7f9138b09b..0000000000 --- a/board/cm-bf537e/config.mk +++ /dev/null @@ -1,11 +0,0 @@ -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -# Set some default LDR flags based on boot mode. -LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8 diff --git a/board/cm-bf537e/gpio_cfi_flash.c b/board/cm-bf537e/gpio_cfi_flash.c deleted file mode 100644 index 1075cc4112..0000000000 --- a/board/cm-bf537e/gpio_cfi_flash.c +++ /dev/null @@ -1,81 +0,0 @@ -/* - * gpio_cfi_flash.c - GPIO-assisted Flash Chip Support - * - * Copyright (c) 2009-2010 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <asm/blackfin.h> -#include <asm/gpio.h> -#include <asm/io.h> -#include "gpio_cfi_flash.h" - -/* Allow this driver to be shared among boards */ -#ifndef GPIO_PIN_1 -#define GPIO_PIN_1 GPIO_PF4 -#endif -#define GPIO_MASK_1 (1 << 21) -#ifndef GPIO_PIN_2 -#define GPIO_MASK_2 (0) -#else -#define GPIO_MASK_2 (1 << 22) -#endif -#ifndef GPIO_PIN_3 -#define GPIO_MASK_3 (0) -#else -#define GPIO_MASK_3 (1 << 23) -#endif -#define GPIO_MASK (GPIO_MASK_1 | GPIO_MASK_2 | GPIO_MASK_3) - -void *gpio_cfi_flash_swizzle(void *vaddr) -{ - unsigned long addr = (unsigned long)vaddr; - - gpio_set_value(GPIO_PIN_1, addr & GPIO_MASK_1); - -#ifdef GPIO_PIN_2 - gpio_set_value(GPIO_PIN_2, addr & GPIO_MASK_2); -#endif - -#ifdef GPIO_PIN_3 - gpio_set_value(GPIO_PIN_3, addr & GPIO_MASK_3); -#endif - - SSYNC(); - udelay(1); - - return (void *)(addr & ~GPIO_MASK); -} - -#define __raw_writeq(value, addr) *(volatile u64 *)addr = value -#define __raw_readq(addr) *(volatile u64 *)addr - -#define MAKE_FLASH(size, sfx) \ -void flash_write##size(u##size value, void *addr) \ -{ \ - __raw_write##sfx(value, gpio_cfi_flash_swizzle(addr)); \ -} \ -u##size flash_read##size(void *addr) \ -{ \ - return __raw_read##sfx(gpio_cfi_flash_swizzle(addr)); \ -} -MAKE_FLASH(8, b) /* flash_write8() flash_read8() */ -MAKE_FLASH(16, w) /* flash_write16() flash_read16() */ -MAKE_FLASH(32, l) /* flash_write32() flash_read32() */ -MAKE_FLASH(64, q) /* flash_write64() flash_read64() */ - -void gpio_cfi_flash_init(void) -{ - gpio_request(GPIO_PIN_1, "gpio_cfi_flash"); - gpio_direction_output(GPIO_PIN_1, 0); -#ifdef GPIO_PIN_2 - gpio_request(GPIO_PIN_2, "gpio_cfi_flash"); - gpio_direction_output(GPIO_PIN_2, 0); -#endif -#ifdef GPIO_PIN_3 - gpio_request(GPIO_PIN_3, "gpio_cfi_flash"); - gpio_direction_output(GPIO_PIN_3, 0); -#endif -} diff --git a/board/cm-bf537e/gpio_cfi_flash.h b/board/cm-bf537e/gpio_cfi_flash.h deleted file mode 100644 index 5211e972ad..0000000000 --- a/board/cm-bf537e/gpio_cfi_flash.h +++ /dev/null @@ -1,10 +0,0 @@ -/* - * gpio_cfi_flash.c - GPIO-assisted Flash Chip Support - * - * Copyright (c) 2009 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -void *gpio_cfi_flash_swizzle(void *vaddr); -void gpio_cfi_flash_init(void); diff --git a/board/cm-bf537u/Kconfig b/board/cm-bf537u/Kconfig deleted file mode 100644 index baf9e8cf61..0000000000 --- a/board/cm-bf537u/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_CM_BF537U - -config SYS_BOARD - default "cm-bf537u" - -config SYS_CONFIG_NAME - default "cm-bf537u" - -endif diff --git a/board/cm-bf537u/MAINTAINERS b/board/cm-bf537u/MAINTAINERS deleted file mode 100644 index a89cfcae74..0000000000 --- a/board/cm-bf537u/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -CM-BF537U BOARD -#M: Bluetechnix Tinyboards <bluetechnix@blackfin.uclinux.org> -S: Orphan (since 2014-03) -F: board/cm-bf537u/ -F: include/configs/cm-bf537u.h -F: configs/cm-bf537u_defconfig diff --git a/board/cm-bf537u/Makefile b/board/cm-bf537u/Makefile deleted file mode 100644 index 835d5b73f0..0000000000 --- a/board/cm-bf537u/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := cm-bf537u.o gpio_cfi_flash.o diff --git a/board/cm-bf537u/cm-bf537u.c b/board/cm-bf537u/cm-bf537u.c deleted file mode 100644 index aad72a9783..0000000000 --- a/board/cm-bf537u/cm-bf537u.c +++ /dev/null @@ -1,44 +0,0 @@ -/* - * U-Boot - main board file - * - * Copyright (c) 2005-2009 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <config.h> -#include <command.h> -#include <net.h> -#include <netdev.h> -#include <asm/blackfin.h> -#include "../cm-bf537e/gpio_cfi_flash.h" - -DECLARE_GLOBAL_DATA_PTR; - -int checkboard(void) -{ - printf("Board: Bluetechnix CM-BF537U board\n"); - printf(" Support: http://www.bluetechnix.at/\n"); - return 0; -} - -#ifndef CONFIG_BFIN_MAC -# define bfin_EMAC_initialize(x) 1 -#endif -#ifndef CONFIG_SMC911X -# define smc911x_initialize(n, x) 1 -#endif -int board_eth_init(bd_t *bis) -{ - /* return ok if at least 1 eth device works */ - return bfin_EMAC_initialize(bis) & - smc911x_initialize(0, CONFIG_SMC911X_BASE); -} - -int misc_init_r(void) -{ - gpio_cfi_flash_init(); - - return 0; -} diff --git a/board/cm-bf537u/config.mk b/board/cm-bf537u/config.mk deleted file mode 100644 index 7f9138b09b..0000000000 --- a/board/cm-bf537u/config.mk +++ /dev/null @@ -1,11 +0,0 @@ -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -# Set some default LDR flags based on boot mode. -LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8 diff --git a/board/cm-bf537u/gpio_cfi_flash.c b/board/cm-bf537u/gpio_cfi_flash.c deleted file mode 100644 index ef5ea8b793..0000000000 --- a/board/cm-bf537u/gpio_cfi_flash.c +++ /dev/null @@ -1,2 +0,0 @@ -#define GPIO_PIN_1 GPIO_PH0 -#include "../cm-bf537e/gpio_cfi_flash.c" diff --git a/board/cm-bf548/Kconfig b/board/cm-bf548/Kconfig deleted file mode 100644 index b96cb5f153..0000000000 --- a/board/cm-bf548/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_CM_BF548 - -config SYS_BOARD - default "cm-bf548" - -config SYS_CONFIG_NAME - default "cm-bf548" - -endif diff --git a/board/cm-bf548/MAINTAINERS b/board/cm-bf548/MAINTAINERS deleted file mode 100644 index b7f5779cef..0000000000 --- a/board/cm-bf548/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -CM-BF548 BOARD -#M: Bluetechnix Tinyboards <bluetechnix@blackfin.uclinux.org> -S: Orphan (since 2014-03) -F: board/cm-bf548/ -F: include/configs/cm-bf548.h -F: configs/cm-bf548_defconfig diff --git a/board/cm-bf548/Makefile b/board/cm-bf548/Makefile deleted file mode 100644 index 1e11b8cdb1..0000000000 --- a/board/cm-bf548/Makefile +++ /dev/null @@ -1,13 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := cm-bf548.o -obj-$(CONFIG_VIDEO) += video.o diff --git a/board/cm-bf548/cm-bf548.c b/board/cm-bf548/cm-bf548.c deleted file mode 100644 index d9d018bfbc..0000000000 --- a/board/cm-bf548/cm-bf548.c +++ /dev/null @@ -1,43 +0,0 @@ -/* - * U-Boot - main board file - * - * Copyright (c) 2005-2008 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <config.h> -#include <command.h> -#include <netdev.h> -#include <asm/blackfin.h> -#include <asm/portmux.h> - -DECLARE_GLOBAL_DATA_PTR; - -int checkboard(void) -{ - printf("Board: Bluetechnix CM-BF548 board\n"); - printf(" Support: http://www.bluetechnix.at/\n"); - return 0; -} - -int board_early_init_f(void) -{ - /* Set async addr lines as peripheral */ - const unsigned short pins[] = { - P_A4, P_A5, P_A6, P_A7, P_A8, P_A9, P_A10, P_A11, P_A12, - P_A13, P_A14, P_A15, P_A16, P_A17, P_A18, P_A19, P_A20, - P_A21, P_A22, P_A23, P_A24, 0 - }; - return peripheral_request_list(pins, "async"); -} - -int board_eth_init(bd_t *bis) -{ - int rc = 0; -#ifdef CONFIG_SMC911X - rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); -#endif - return rc; -} diff --git a/board/cm-bf548/config.mk b/board/cm-bf548/config.mk deleted file mode 100644 index beb9834649..0000000000 --- a/board/cm-bf548/config.mk +++ /dev/null @@ -1,14 +0,0 @@ -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -# Set some default LDR flags based on boot mode. -LDR_FLAGS-BFIN_BOOT_PARA := --dma 6 -LDR_FLAGS-BFIN_BOOT_FIFO := --dma 1 -LDR_FLAGS-BFIN_BOOT_SPI_MASTER := --dma 1 -LDR_FLAGS-BFIN_BOOT_UART := --dma 1 diff --git a/board/cm-bf548/video.c b/board/cm-bf548/video.c deleted file mode 100644 index b8cc873863..0000000000 --- a/board/cm-bf548/video.c +++ /dev/null @@ -1,339 +0,0 @@ -/* - * video.c - run splash screen on lcd - * - * Copyright (c) 2007-2008 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#include <stdarg.h> -#include <common.h> -#include <config.h> -#include <malloc.h> -#include <asm/blackfin.h> -#include <asm/clock.h> -#include <asm/gpio.h> -#include <asm/portmux.h> -#include <asm/mach-common/bits/dma.h> -#include <i2c.h> -#include <linux/types.h> -#include <stdio_dev.h> - -#include <lzma/LzmaTypes.h> -#include <lzma/LzmaDec.h> -#include <lzma/LzmaTools.h> - -#define DMA_SIZE16 2 - -#include <asm/mach-common/bits/eppi.h> - -#include EASYLOGO_HEADER - -#define LCD_X_RES 480 /*Horizontal Resolution */ -#define LCD_Y_RES 272 /* Vertical Resolution */ - -#define LCD_BPP 24 /* Bit Per Pixel */ -#define LCD_PIXEL_SIZE (LCD_BPP / 8) -#define DMA_BUS_SIZE 32 -#define ACTIVE_VIDEO_MEM_OFFSET 0 - -/* -- Horizontal synchronizing -- - * - * Timing characteristics taken from the SHARP LQ043T1DG01 datasheet - * (LCY-W-06602A Page 9 of 22) - * - * Clock Frequency 1/Tc Min 7.83 Typ 9.00 Max 9.26 MHz - * - * Period TH - 525 - Clock - * Pulse width THp - 41 - Clock - * Horizontal period THd - 480 - Clock - * Back porch THb - 2 - Clock - * Front porch THf - 2 - Clock - * - * -- Vertical synchronizing -- - * Period TV - 286 - Line - * Pulse width TVp - 10 - Line - * Vertical period TVd - 272 - Line - * Back porch TVb - 2 - Line - * Front porch TVf - 2 - Line - */ - -#define LCD_CLK (8*1000*1000) /* 8MHz */ - -/* # active data to transfer after Horizontal Delay clock */ -#define EPPI_HCOUNT LCD_X_RES - -/* # active lines to transfer after Vertical Delay clock */ -#define EPPI_VCOUNT LCD_Y_RES - -/* Samples per Line = 480 (active data) + 45 (padding) */ -#define EPPI_LINE 525 - -/* Lines per Frame = 272 (active data) + 14 (padding) */ -#define EPPI_FRAME 286 - -/* FS1 (Hsync) Width (Typical)*/ -#define EPPI_FS1W_HBL 41 - -/* FS1 (Hsync) Period (Typical) */ -#define EPPI_FS1P_AVPL EPPI_LINE - -/* Horizontal Delay clock after assertion of Hsync (Typical) */ -#define EPPI_HDELAY 43 - -/* FS2 (Vsync) Width = FS1 (Hsync) Period * 10 */ -#define EPPI_FS2W_LVB (EPPI_LINE * 10) - - /* FS2 (Vsync) Period = FS1 (Hsync) Period * Lines per Frame */ -#define EPPI_FS2P_LAVF (EPPI_LINE * EPPI_FRAME) - -/* Vertical Delay after assertion of Vsync (2 Lines) */ -#define EPPI_VDELAY 12 - -#define EPPI_CLIP 0xFF00FF00 - -/* EPPI Control register configuration value for RGB out - * - EPPI as Output - * GP 2 frame sync mode, - * Internal Clock generation disabled, Internal FS generation enabled, - * Receives samples on EPPI_CLK raising edge, Transmits samples on EPPI_CLK falling edge, - * FS1 & FS2 are active high, - * DLEN = 6 (24 bits for RGB888 out) or 5 (18 bits for RGB666 out) - * DMA Unpacking disabled when RGB Formating is enabled, otherwise DMA unpacking enabled - * Swapping Enabled, - * One (DMA) Channel Mode, - * RGB Formatting Enabled for RGB666 output, disabled for RGB888 output - * Regular watermark - when FIFO is 100% full, - * Urgent watermark - when FIFO is 75% full - */ - -#define EPPI_CONTROL (0x20136E2E) - -static inline u16 get_eppi_clkdiv(u32 target_ppi_clk) -{ - u32 sclk = get_sclk(); - - /* EPPI_CLK = (SCLK) / (2 * (EPPI_CLKDIV[15:0] + 1)) */ - - return (((sclk / target_ppi_clk) / 2) - 1); -} - -void Init_PPI(void) -{ - u16 eppi_clkdiv = get_eppi_clkdiv(LCD_CLK); - - bfin_write_EPPI0_FS1W_HBL(EPPI_FS1W_HBL); - bfin_write_EPPI0_FS1P_AVPL(EPPI_FS1P_AVPL); - bfin_write_EPPI0_FS2W_LVB(EPPI_FS2W_LVB); - bfin_write_EPPI0_FS2P_LAVF(EPPI_FS2P_LAVF); - bfin_write_EPPI0_CLIP(EPPI_CLIP); - - bfin_write_EPPI0_FRAME(EPPI_FRAME); - bfin_write_EPPI0_LINE(EPPI_LINE); - - bfin_write_EPPI0_HCOUNT(EPPI_HCOUNT); - bfin_write_EPPI0_HDELAY(EPPI_HDELAY); - bfin_write_EPPI0_VCOUNT(EPPI_VCOUNT); - bfin_write_EPPI0_VDELAY(EPPI_VDELAY); - - bfin_write_EPPI0_CLKDIV(eppi_clkdiv); - -/* - * DLEN = 6 (24 bits for RGB888 out) or 5 (18 bits for RGB666 out) - * RGB Formatting Enabled for RGB666 output, disabled for RGB888 output - */ -#if defined(CONFIG_VIDEO_RGB666) - bfin_write_EPPI0_CONTROL((EPPI_CONTROL & ~DLENGTH) | DLEN_18 | - RGB_FMT_EN); -#else - bfin_write_EPPI0_CONTROL(((EPPI_CONTROL & ~DLENGTH) | DLEN_24) & - ~RGB_FMT_EN); -#endif - -} - -#define DEB2_URGENT 0x2000 /* DEB2 Urgent */ - -void Init_DMA(void *dst) -{ -#if defined(CONFIG_DEB_DMA_URGENT) - bfin_write_EBIU_DDRQUE(bfin_read_EBIU_DDRQUE() | DEB2_URGENT); -#endif - - bfin_write_DMA12_START_ADDR(dst); - - /* X count */ - bfin_write_DMA12_X_COUNT((LCD_X_RES * LCD_BPP) / DMA_BUS_SIZE); - bfin_write_DMA12_X_MODIFY(DMA_BUS_SIZE / 8); - - /* Y count */ - bfin_write_DMA12_Y_COUNT(LCD_Y_RES); - bfin_write_DMA12_Y_MODIFY(DMA_BUS_SIZE / 8); - - /* DMA Config */ - bfin_write_DMA12_CONFIG( - WDSIZE_32 | /* 32 bit DMA */ - DMA2D | /* 2D DMA */ - FLOW_AUTO /* autobuffer mode */ - ); -} - -void Init_Ports(void) -{ - const unsigned short pins[] = { - P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3, P_PPI0_D4, - P_PPI0_D5, P_PPI0_D6, P_PPI0_D7, P_PPI0_D8, P_PPI0_D9, - P_PPI0_D10, P_PPI0_D11, P_PPI0_D12, P_PPI0_D13, P_PPI0_D14, - P_PPI0_D15, P_PPI0_D16, P_PPI0_D17, -#if !defined(CONFIG_VIDEO_RGB666) - P_PPI0_D18, P_PPI0_D19, P_PPI0_D20, P_PPI0_D21, P_PPI0_D22, - P_PPI0_D23, -#endif - P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2, 0, - }; - peripheral_request_list(pins, "lcd"); - - gpio_request(GPIO_PE3, "lcd-disp"); - gpio_direction_output(GPIO_PE3, 1); -} - -void EnableDMA(void) -{ - bfin_write_DMA12_CONFIG(bfin_read_DMA12_CONFIG() | DMAEN); -} - -void DisableDMA(void) -{ - bfin_write_DMA12_CONFIG(bfin_read_DMA12_CONFIG() & ~DMAEN); -} - -/* enable and disable PPI functions */ -void EnablePPI(void) -{ - bfin_write_EPPI0_CONTROL(bfin_read_EPPI0_CONTROL() | EPPI_EN); -} - -void DisablePPI(void) -{ - bfin_write_EPPI0_CONTROL(bfin_read_EPPI0_CONTROL() & ~EPPI_EN); -} - -int video_init(void *dst) -{ - Init_Ports(); - Init_DMA(dst); - EnableDMA(); - Init_PPI(); - EnablePPI(); - - return 0; -} - -void video_stop(void) -{ - DisablePPI(); - DisableDMA(); -} - -static void dma_bitblit(void *dst, fastimage_t *logo, int x, int y) -{ - if (dcache_status()) - blackfin_dcache_flush_range(logo->data, - logo->data + logo->size); - - bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); - - /* Setup destination start address */ - bfin_write_MDMA_D0_START_ADDR(dst + ((x & -2) * LCD_PIXEL_SIZE) - + (y * LCD_X_RES * LCD_PIXEL_SIZE)); - /* Setup destination xcount */ - bfin_write_MDMA_D0_X_COUNT(logo->width * LCD_PIXEL_SIZE / DMA_SIZE16); - /* Setup destination xmodify */ - bfin_write_MDMA_D0_X_MODIFY(DMA_SIZE16); - - /* Setup destination ycount */ - bfin_write_MDMA_D0_Y_COUNT(logo->height); - /* Setup destination ymodify */ - bfin_write_MDMA_D0_Y_MODIFY((LCD_X_RES - logo->width) * LCD_PIXEL_SIZE + - DMA_SIZE16); - - /* Setup Source start address */ - bfin_write_MDMA_S0_START_ADDR(logo->data); - /* Setup Source xcount */ - bfin_write_MDMA_S0_X_COUNT(logo->width * LCD_PIXEL_SIZE / DMA_SIZE16); - /* Setup Source xmodify */ - bfin_write_MDMA_S0_X_MODIFY(DMA_SIZE16); - - /* Setup Source ycount */ - bfin_write_MDMA_S0_Y_COUNT(logo->height); - /* Setup Source ymodify */ - bfin_write_MDMA_S0_Y_MODIFY(DMA_SIZE16); - - /* Enable source DMA */ - bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_16 | DMA2D); - SSYNC(); - bfin_write_MDMA_D0_CONFIG(WNR | DMAEN | WDSIZE_16 | DMA2D); - - while (bfin_read_MDMA_D0_IRQ_STATUS() & DMA_RUN) ; - - bfin_write_MDMA_S0_IRQ_STATUS(bfin_read_MDMA_S0_IRQ_STATUS() | DMA_DONE - | DMA_ERR); - bfin_write_MDMA_D0_IRQ_STATUS(bfin_read_MDMA_D0_IRQ_STATUS() | DMA_DONE - | DMA_ERR); - -} - -int drv_video_init(void) -{ - int error, devices = 1; - struct stdio_dev videodev; - - u8 *dst; - u32 fbmem_size = - LCD_X_RES * LCD_Y_RES * LCD_PIXEL_SIZE + ACTIVE_VIDEO_MEM_OFFSET; - - dst = malloc(fbmem_size); - - if (dst == NULL) { - printf("Failed to alloc FB memory\n"); - return -1; - } - -#ifdef EASYLOGO_ENABLE_GZIP - unsigned char *data = EASYLOGO_DECOMP_BUFFER; - unsigned long src_len = EASYLOGO_ENABLE_GZIP; - error = gunzip(data, bfin_logo.size, bfin_logo.data, &src_len); - bfin_logo.data = data; -#elif defined(EASYLOGO_ENABLE_LZMA) - unsigned char *data = EASYLOGO_DECOMP_BUFFER; - SizeT lzma_len = bfin_logo.size; - error = lzmaBuffToBuffDecompress(data, &lzma_len, - bfin_logo.data, EASYLOGO_ENABLE_LZMA); - bfin_logo.data = data; -#else - error = 0; -#endif - - if (error) { - puts("Failed to decompress logo\n"); - free(dst); - return -1; - } - - memset(dst + ACTIVE_VIDEO_MEM_OFFSET, bfin_logo.data[0], - fbmem_size - ACTIVE_VIDEO_MEM_OFFSET); - - dma_bitblit(dst + ACTIVE_VIDEO_MEM_OFFSET, &bfin_logo, - (LCD_X_RES - bfin_logo.width) / 2, - (LCD_Y_RES - bfin_logo.height) / 2); - - video_init(dst); /* Video initialization */ - - memset(&videodev, 0, sizeof(videodev)); - - strcpy(videodev.name, "video"); - - error = stdio_register(&videodev); - - return (error == 0) ? devices : error; -} diff --git a/board/cm-bf561/Kconfig b/board/cm-bf561/Kconfig deleted file mode 100644 index 8b302a5c8f..0000000000 --- a/board/cm-bf561/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_CM_BF561 - -config SYS_BOARD - default "cm-bf561" - -config SYS_CONFIG_NAME - default "cm-bf561" - -endif diff --git a/board/cm-bf561/MAINTAINERS b/board/cm-bf561/MAINTAINERS deleted file mode 100644 index 9c86c8d39a..0000000000 --- a/board/cm-bf561/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -CM-BF561 BOARD -#M: Bluetechnix Tinyboards <bluetechnix@blackfin.uclinux.org> -S: Orphan (since 2014-03) -F: board/cm-bf561/ -F: include/configs/cm-bf561.h -F: configs/cm-bf561_defconfig diff --git a/board/cm-bf561/Makefile b/board/cm-bf561/Makefile deleted file mode 100644 index e0f0c34095..0000000000 --- a/board/cm-bf561/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := cm-bf561.o diff --git a/board/cm-bf561/cm-bf561.c b/board/cm-bf561/cm-bf561.c deleted file mode 100644 index 99b7eb2612..0000000000 --- a/board/cm-bf561/cm-bf561.c +++ /dev/null @@ -1,26 +0,0 @@ -/* - * U-Boot - main board file - * - * Copyright (c) 2005-2008 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <netdev.h> - -DECLARE_GLOBAL_DATA_PTR; - -int checkboard(void) -{ - printf("Board: Bluetechnix CM-BF561 core module\n"); - printf(" Support: http://www.bluetechnix.at/\n"); - return 0; -} - -#ifdef CONFIG_SMC911X -int board_eth_init(bd_t *bis) -{ - return smc911x_initialize(0, CONFIG_SMC911X_BASE); -} -#endif diff --git a/board/cm-bf561/config.mk b/board/cm-bf561/config.mk deleted file mode 100644 index 854d7dbb86..0000000000 --- a/board/cm-bf561/config.mk +++ /dev/null @@ -1,11 +0,0 @@ -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -# Set some default LDR flags based on boot mode. -LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 diff --git a/board/cm5200/cm5200.c b/board/cm5200/cm5200.c index fce998d00f..7b862355c8 100644 --- a/board/cm5200/cm5200.c +++ b/board/cm5200/cm5200.c @@ -97,14 +97,14 @@ static mem_conf_t* get_mem_config(int board_type) /* * Initalize SDRAM - configure SDRAM controller, detect memory size. */ -phys_size_t initdram(int board_type) +int dram_init(void) { ulong dramsize = 0; #ifndef CONFIG_SYS_RAMBOOT ulong test1, test2; mem_conf_t *mem_conf; - mem_conf = get_mem_config(board_type); + mem_conf = get_mem_config(gd->board_type); /* configure SDRAM start/end for detection */ *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e; /* 2G at 0x0 */ @@ -150,7 +150,9 @@ phys_size_t initdram(int board_type) *(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04; __asm__ volatile ("sync"); - return dramsize; + gd->ram_size = dramsize; + + return 0; } diff --git a/board/cobra5272/cobra5272.c b/board/cobra5272/cobra5272.c index 0f3bcc592a..0ceaa1f772 100644 --- a/board/cobra5272/cobra5272.c +++ b/board/cobra5272/cobra5272.c @@ -8,6 +8,7 @@ #include <common.h> #include <asm/immap.h> +DECLARE_GLOBAL_DATA_PTR; int checkboard (void) { @@ -16,7 +17,7 @@ int checkboard (void) return 0; }; -phys_size_t initdram (int board_type) +int dram_init(void) { volatile sdramctrl_t *sdp = (sdramctrl_t *) (MMAP_SDRAM); @@ -26,7 +27,9 @@ phys_size_t initdram (int board_type) /* Dummy write to start SDRAM */ *((volatile unsigned long *) 0) = 0; - return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; + gd->ram_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; + + return 0; }; int testdram (void) diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c index 5b88bcce59..80b5dc9026 100644 --- a/board/compulab/cm_fx6/cm_fx6.c +++ b/board/compulab/cm_fx6/cm_fx6.c @@ -688,7 +688,7 @@ int misc_init_r(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[1].start = PHYS_SDRAM_2; @@ -720,6 +720,8 @@ void dram_init_banksize(void) gd->bd->bi_dram[1].size = 0x7FF00000; break; } + + return 0; } int dram_init(void) diff --git a/board/davedenx/aria/aria.c b/board/davedenx/aria/aria.c index 1b6c40f8d5..e3441cad4e 100644 --- a/board/davedenx/aria/aria.c +++ b/board/davedenx/aria/aria.c @@ -18,9 +18,11 @@ DECLARE_GLOBAL_DATA_PTR; -phys_size_t initdram (int board_type) +int dram_init(void) { - return fixed_sdram(NULL, NULL, 0); + gd->ram_size = fixed_sdram(NULL, NULL, 0); + + return 0; } int misc_init_r(void) diff --git a/board/davinci/da8xxevm/README.da850 b/board/davinci/da8xxevm/README.da850 index 29cb4ec408..519267e2f0 100644 --- a/board/davinci/da8xxevm/README.da850 +++ b/board/davinci/da8xxevm/README.da850 @@ -47,6 +47,47 @@ U-Boot > sf erase 0 +320000 U-Boot > tftp u-boot.ais U-Boot > sf write c0700000 0 $filesize +Flashing the images to NAND +=========================== +The AIS image can be written to NAND using the u-boot "nand" commands. + +Example: + +OMAPL138_LCDK requires the AIS image to be written to the second block of +the NAND flash. + +From the "nand info" command we see that the second block would start at +offset 0x20000: + + U-Boot > nand info + sector size 128 KiB (0x20000) + Page size 2048 b + +From the tftp command we see that we need to copy 0x74908 bytes from +memory address 0xc0700000 (0x75000 if we align a page of 2048): + + U-Boot > tftp u-boot.ais + Load address: 0xc0700000 + Bytes transferred = 477448 (74908 hex) + +The commands to write the image from memory to NAND would be: + + U-Boot > nand erase 0x20000 0x75000 + U-Boot > nand write 0xc0700000 0x20000 0x75000 + +Alternatively, MTD partitions may be defined. Using "mtdparts" to +conveniently have a bootloader partition starting at the second block +(offset 0x20000): + + setenv mtdids nand0=davinci_nand.0 + setenv mtdparts mtdparts=davinci_nand.0:128k(bootenv),2m(bootloader) + +In this case the commands would be simplified to: + + U-Boot > tftp u-boot.ais + U-Boot > nand erase.part bootloader + U-Boot > nand write 0xc0700000 bootloader + Flashing the images to MMC ========================== If the boot pins are set to boot from mmc, the RBL will try to load the diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c index 37d2f54d3b..9e17eb865d 100644 --- a/board/davinci/da8xxevm/da850evm.c +++ b/board/davinci/da8xxevm/da850evm.c @@ -323,9 +323,7 @@ int board_early_init_f(void) int board_init(void) { -#ifndef CONFIG_USE_IRQ irq_init(); -#endif #ifdef CONFIG_NAND_DAVINCI /* diff --git a/board/davinci/da8xxevm/omapl138_lcdk.c b/board/davinci/da8xxevm/omapl138_lcdk.c index 3ce1992c1d..d941285977 100644 --- a/board/davinci/da8xxevm/omapl138_lcdk.c +++ b/board/davinci/da8xxevm/omapl138_lcdk.c @@ -171,9 +171,7 @@ int board_early_init_f(void) int board_init(void) { -#ifndef CONFIG_USE_IRQ irq_init(); -#endif /* arch number of the board */ gd->bd->bi_arch_number = MACH_TYPE_OMAPL138_LCDK; diff --git a/board/davinci/ea20/ea20.c b/board/davinci/ea20/ea20.c index 66804d75bd..6edfa17a91 100644 --- a/board/davinci/ea20/ea20.c +++ b/board/davinci/ea20/ea20.c @@ -203,9 +203,7 @@ int board_early_init_f(void) /* Set LCD_B_PWR low to power down LCD Backlight*/ gpio_direction_output(102, 0); -#ifndef CONFIG_USE_IRQ irq_init(); -#endif /* * NAND CS setup - cycle counts based on da850evm NAND timings in the diff --git a/board/dbau1x00/dbau1x00.c b/board/dbau1x00/dbau1x00.c index 75e6f0ef5a..81285d7470 100644 --- a/board/dbau1x00/dbau1x00.c +++ b/board/dbau1x00/dbau1x00.c @@ -11,11 +11,15 @@ #include <asm/mipsregs.h> #include <asm/io.h> -phys_size_t initdram(int board_type) +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) { /* Sdram is setup by assembler code */ /* If memory could be changed, we should return the true value here */ - return MEM_SIZE*1024*1024; + gd->ram_size = MEM_SIZE * 1024 * 1024; + + return 0; } #define BCSR_PCMCIA_PC0DRVEN 0x0010 diff --git a/board/dnp5370/Kconfig b/board/dnp5370/Kconfig deleted file mode 100644 index 797081d5f2..0000000000 --- a/board/dnp5370/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_DNP5370 - -config SYS_BOARD - default "dnp5370" - -config SYS_CONFIG_NAME - default "dnp5370" - -endif diff --git a/board/dnp5370/MAINTAINERS b/board/dnp5370/MAINTAINERS deleted file mode 100644 index 8333891a40..0000000000 --- a/board/dnp5370/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -DNP5370 BOARD -M: M.Hasewinkel (MHA) <info@ssv-embedded.de> -S: Maintained -F: board/dnp5370/ -F: include/configs/dnp5370.h -F: configs/dnp5370_defconfig diff --git a/board/dnp5370/Makefile b/board/dnp5370/Makefile deleted file mode 100644 index c0271da01b..0000000000 --- a/board/dnp5370/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) 2005-2007 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := dnp5370.o diff --git a/board/dnp5370/README b/board/dnp5370/README deleted file mode 100644 index 0172698e96..0000000000 --- a/board/dnp5370/README +++ /dev/null @@ -1,67 +0,0 @@ -This document describes the board support for -Dil/NetPC DNP/5370 (http://www.dilnetpc.com/dnp0086.htm) module. -The distributor is SSV (http://www.ssv-embedded.de), - -The module used to develop the support files contains: - -* Processor: Blackfin BF537 Rev 0.3 (600 MHz core / 120MHz RAM) - -* RAM: 32 MB SDRAM - Hynix HY57V561620FTP-H 810EA - Connected to Blackfin via "Expansion Bus" - Address range 0x0000.0000 - 0x1fff.ffff - -* NOR flash: 32 MBit (4 MByte) - Exel Semiconductor ES29LVS320EB - Connected to Blackfin via "Expansion Bus", - Chip Selects 0, 1 and 2, each is connected - to a 1 MB memory bank at Blackfin, therefore - only 3 MB accessible. - Address range 0x2000.0000 - 0x202f.ffff - CFI compatible - - Exel Semiconductor was bought by Rohm Semiconductor (www.rohm.com). - -* NAND flash: 64 MBit (8 MByte) - Atmel 45DB642D-CNU - Connected to Blackfin via SPI - CFI compatible - -* Davicom DM9161EP Ethernet PHY - -* A SD card reader, connected via SPI - -* Hardware watchdog MAX823 or TPS3823 - -(other devices not listed here) - -To run it, the module must be inserted in a 64 pin DIL socket -on another board, e.g. DNP/EVA13 (together: SSV SK28). - -The Blackfin is booted from NOR flash. The NOR flash data begins -with the U-Boot code and is then followed by the Linux code. -Finally, the MAC is stored in the last sector. -You may need to adjust these settings to your needs. -The memory map used to develop the board support is: - -Memory map: -0x00000000 .. 0x01ffffff SDRAM -0x20000000 .. 0x202fffff NOR flash - -RAM use: -0x01f9bffc .. 0x01fbbffb U-Boot stack -0x01f9c000 .. 0x01f9ffff U-Boot global data -0x01fa0000 .. 0x01fbffff U-Boot malloc() RAM -0x01fc0000 .. 0x01ffffff U-Boot execution RAM - -NOR flash use: -0x20000000 .. 0x0002ffff U-Boot -0x20004000 .. 0x20005fff U-Boot environment -0x20030000 .. 0x202effff Linux kernel image -0x202f0000 .. 0x202fffff MAC address sector - -NOR flash is 0x00300000 (3145728) bytes large (3 MB). -Max space for compressed kernel in flash is 0x002c0000 (2883584) bytes (2.75 MB) -Max space for u-boot in flash is 0x00030000 (196608) bytes (192 KB) - -The module is hardwired to BYPASS boot mode. diff --git a/board/dnp5370/dnp5370.c b/board/dnp5370/dnp5370.c deleted file mode 100644 index 719203db0c..0000000000 --- a/board/dnp5370/dnp5370.c +++ /dev/null @@ -1,73 +0,0 @@ -/* - * U-Boot - main board file - * - * (C) Copyright 2010 3ality Digital Systems - * - * Copyright (c) 2005-2008 Analog Devices Inc. - * - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <config.h> -#include <asm/blackfin.h> -#include <net.h> -#include <netdev.h> -#include <asm/gpio.h> - -static void disable_external_watchdog(void) -{ -#ifdef CONFIG_DNP5370_EXT_WD_DISABLE - /* disable external HW watchdog with PH13 = WD1 = 1 */ - gpio_request(GPIO_PH13, "ext_wd"); - gpio_direction_output(GPIO_PH13, 1); -#endif -} - -int checkboard(void) -{ - printf("Board: SSV DilNet DNP5370\n"); - return 0; -} - -#ifdef CONFIG_BFIN_MAC -static void board_init_enetaddr(uchar *mac_addr) -{ -#ifdef CONFIG_MTD_NOR_FLASH - /* we cram the MAC in the last flash sector */ - uchar *board_mac_addr = (uchar *)0x202F0000; - if (is_valid_ethaddr(board_mac_addr)) { - memcpy(mac_addr, board_mac_addr, 6); - eth_setenv_enetaddr("ethaddr", mac_addr); - } -#endif -} - -int board_eth_init(bd_t *bis) -{ - return bfin_EMAC_initialize(bis); -} -#endif - -/* miscellaneous platform dependent initialisations */ -int misc_init_r(void) -{ - disable_external_watchdog(); - -#ifdef CONFIG_BFIN_MAC - uchar enetaddr[6]; - if (!eth_getenv_enetaddr("ethaddr", enetaddr)) - board_init_enetaddr(enetaddr); -#endif - -#ifdef CONFIG_MTD_NOR_FLASH - /* we use the last sector for the MAC address / POST LDR */ - extern flash_info_t flash_info[]; - flash_protect(FLAG_PROTECT_SET, 0x202F0000, 0x202FFFFF, &flash_info[0]); -#endif - - return 0; -} diff --git a/board/esd/mecp5123/mecp5123.c b/board/esd/mecp5123/mecp5123.c index 656f0fa83f..66dc407bae 100644 --- a/board/esd/mecp5123/mecp5123.c +++ b/board/esd/mecp5123/mecp5123.c @@ -62,9 +62,11 @@ int board_early_init_f(void) return 0; } -phys_size_t initdram(int board_type) +int dram_init(void) { - return get_ram_size(0, fixed_sdram(NULL, NULL, 0)); + gd->ram_size = get_ram_size(0, fixed_sdram(NULL, NULL, 0)); + + return 0; } int misc_init_r(void) diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c index fe781dcc92..19b673e6d2 100644 --- a/board/esd/meesc/meesc.c +++ b/board/esd/meesc/meesc.c @@ -132,10 +132,12 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM; gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; + + return 0; } int board_eth_init(bd_t *bis) diff --git a/board/esd/pmc440/sdram.c b/board/esd/pmc440/sdram.c index e7f8115870..c379e7723d 100644 --- a/board/esd/pmc440/sdram.c +++ b/board/esd/pmc440/sdram.c @@ -24,6 +24,8 @@ #include <asm/mmu.h> #include <asm/ppc440.h> +DECLARE_GLOBAL_DATA_PTR; + extern int denali_wait_for_dlllock(void); extern void denali_core_search_data_eye(void); @@ -40,7 +42,7 @@ struct sdram_conf_s sdram_conf[] = { }; /* - * initdram -- 440EPx's DDR controller is a DENALI Core + * dram_init -- 440EPx's DDR controller is a DENALI Core */ int initdram_by_rb(int rows, int banks) { @@ -105,7 +107,7 @@ int initdram_by_rb(int rows, int banks) return 0; } -phys_size_t initdram(int board_type) +int dram_init(void) { phys_size_t size; int n; @@ -125,12 +127,14 @@ phys_size_t initdram(int board_type) sdram_conf[n].banks); /* check for suitable configuration */ - if (get_ram_size(CONFIG_SYS_SDRAM_BASE, size) == size) - return size; + if (get_ram_size(CONFIG_SYS_SDRAM_BASE, size) == size) { + gd->ram_size = size; + return 0; + } /* delete TLB entries */ remove_tlb(CONFIG_SYS_SDRAM_BASE, size); } - return 0; + return -ENXIO; } diff --git a/board/esd/vme8349/vme8349.c b/board/esd/vme8349/vme8349.c index f8f1834b59..36a55195df 100644 --- a/board/esd/vme8349/vme8349.c +++ b/board/esd/vme8349/vme8349.c @@ -26,15 +26,17 @@ #include <i2c.h> #include <netdev.h> +DECLARE_GLOBAL_DATA_PTR; + void ddr_enable_ecc(unsigned int dram_size); -phys_size_t initdram(int board_type) +int dram_init(void) { volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; u32 msize = 0; if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im) - return -1; + return -ENXIO; /* DDR SDRAM - Main memory */ im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; @@ -52,7 +54,9 @@ phys_size_t initdram(int board_type) msize = get_ram_size(0, msize); /* return total bus SDRAM size(bytes) -- DDR */ - return msize * 1024 * 1024; + gd->ram_size = msize * 1024 * 1024; + + return 0; } int checkboard(void) diff --git a/board/freescale/b4860qds/ddr.c b/board/freescale/b4860qds/ddr.c index 99cd88466d..5cc2f73a16 100644 --- a/board/freescale/b4860qds/ddr.c +++ b/board/freescale/b4860qds/ddr.c @@ -176,7 +176,7 @@ found: popts->cpo_sample = 0x3e; } -phys_size_t initdram(int board_type) +int dram_init(void) { phys_size_t dram_size; @@ -189,7 +189,9 @@ phys_size_t initdram(int board_type) dram_size = setup_ddr_tlbs(dram_size / 0x100000); dram_size *= 0x100000; - return dram_size; + gd->ram_size = dram_size; + + return 0; } unsigned long long step_assign_addresses(fsl_ddr_info_t *pinfo, diff --git a/board/freescale/b4860qds/spl.c b/board/freescale/b4860qds/spl.c index 35b812cb18..60d7f0d48a 100644 --- a/board/freescale/b4860qds/spl.c +++ b/board/freescale/b4860qds/spl.c @@ -108,7 +108,7 @@ void board_init_r(gd_t *gd, ulong dest_addr) puts("\n\n"); - gd->ram_size = initdram(0); + dram_init(); #ifdef CONFIG_SPL_NAND_BOOT nand_boot(); diff --git a/board/freescale/c29xpcie/spl.c b/board/freescale/c29xpcie/spl.c index 6613216950..94093f11a8 100644 --- a/board/freescale/c29xpcie/spl.c +++ b/board/freescale/c29xpcie/spl.c @@ -67,7 +67,7 @@ void board_init_r(gd_t *gd, ulong dest_addr) i2c_init_all(); - gd->ram_size = initdram(0); + dram_init(); #ifdef CONFIG_SPL_NAND_BOOT puts("TPL\n"); diff --git a/board/freescale/common/fsl_validate.c b/board/freescale/common/fsl_validate.c index 2b723a4b9c..7396aa2f69 100644 --- a/board/freescale/common/fsl_validate.c +++ b/board/freescale/common/fsl_validate.c @@ -27,6 +27,10 @@ #define CHECK_KEY_LEN(key_len) (((key_len) == 2 * KEY_SIZE_BYTES / 4) || \ ((key_len) == 2 * KEY_SIZE_BYTES / 2) || \ ((key_len) == 2 * KEY_SIZE_BYTES)) +#if defined(CONFIG_FSL_ISBC_KEY_EXT) +/* Global data structure */ +static struct fsl_secboot_glb glb; +#endif /* This array contains DER value for SHA-256 */ static const u8 hash_identifier[] = { 0x30, 0x31, 0x30, 0x0d, 0x06, 0x09, 0x60, @@ -60,7 +64,7 @@ self: #if defined(CONFIG_FSL_ISBC_KEY_EXT) static u32 check_ie(struct fsl_secboot_img_priv *img) { - if (img->hdr.ie_flag) + if (img->hdr.ie_flag & IE_FLAG_MASK) return 1; return 0; @@ -119,7 +123,21 @@ int get_csf_base_addr(u32 *csf_addr, u32 *flash_base_addr) } #endif -static int get_ie_info_addr(u32 *ie_addr) +#if defined(CONFIG_ESBC_HDR_LS) +static int get_ie_info_addr(uintptr_t *ie_addr) +{ + struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); + /* For LS-CH3, the address of IE Table is + * stated in Scratch13 and scratch14 of DCFG. + * Bootrom validates this table while validating uboot. + * DCFG is LE*/ + *ie_addr = in_le32(&gur->scratchrw[SCRATCH_IE_HIGH_ADR - 1]); + *ie_addr = *ie_addr << 32; + *ie_addr |= in_le32(&gur->scratchrw[SCRATCH_IE_LOW_ADR - 1]); + return 0; +} +#else /* CONFIG_ESBC_HDR_LS */ +static int get_ie_info_addr(uintptr_t *ie_addr) { struct fsl_secboot_img_hdr *hdr; struct fsl_secboot_sg_table *sg_tbl; @@ -147,16 +165,17 @@ static int get_ie_info_addr(u32 *ie_addr) /* IE Key Table is the first entry in the SG Table */ #if defined(CONFIG_MPC85xx) - *ie_addr = (sg_tbl->src_addr & ~(CONFIG_SYS_PBI_FLASH_BASE)) + - flash_base_addr; + *ie_addr = (uintptr_t)((sg_tbl->src_addr & + ~(CONFIG_SYS_PBI_FLASH_BASE)) + + flash_base_addr); #else - *ie_addr = sg_tbl->src_addr; + *ie_addr = (uintptr_t)sg_tbl->src_addr; #endif - debug("IE Table address is %x\n", *ie_addr); + debug("IE Table address is %lx\n", *ie_addr); return 0; } - +#endif /* CONFIG_ESBC_HDR_LS */ #endif #ifdef CONFIG_KEY_REVOCATION @@ -164,7 +183,10 @@ static int get_ie_info_addr(u32 *ie_addr) static u32 check_srk(struct fsl_secboot_img_priv *img) { #ifdef CONFIG_ESBC_HDR_LS - /* In LS, No SRK Flag as SRK is always present*/ + /* In LS, No SRK Flag as SRK is always present if IE not present*/ +#if defined(CONFIG_FSL_ISBC_KEY_EXT) + return !check_ie(img); +#endif return 1; #else if (img->hdr.len_kr.srk_table_flag & SRK_FLAG) @@ -253,14 +275,29 @@ static u32 read_validate_single_key(struct fsl_secboot_img_priv *img) #endif /* CONFIG_ESBC_HDR_LS */ #if defined(CONFIG_FSL_ISBC_KEY_EXT) + +static void install_ie_tbl(uintptr_t ie_tbl_addr, + struct fsl_secboot_img_priv *img) +{ + /* Copy IE tbl to Global Data */ + memcpy(&glb.ie_tbl, (u8 *)ie_tbl_addr, sizeof(struct ie_key_info)); + img->ie_addr = (uintptr_t)&glb.ie_tbl; + glb.ie_addr = img->ie_addr; +} + static u32 read_validate_ie_tbl(struct fsl_secboot_img_priv *img) { struct fsl_secboot_img_hdr *hdr = &img->hdr; u32 ie_key_len, ie_revoc_flag, ie_num; struct ie_key_info *ie_info; - if (get_ie_info_addr(&img->ie_addr)) - return ERROR_IE_TABLE_NOT_FOUND; + if (!img->ie_addr) { + if (get_ie_info_addr(&img->ie_addr)) + return ERROR_IE_TABLE_NOT_FOUND; + else + install_ie_tbl(img->ie_addr, img); + } + ie_info = (struct ie_key_info *)(uintptr_t)img->ie_addr; if (ie_info->num_keys == 0 || ie_info->num_keys > 32) return ERROR_ESBC_CLIENT_HEADER_INVALID_IE_NUM_ENTRY; @@ -786,6 +823,26 @@ static int calculate_cmp_img_sig(struct fsl_secboot_img_priv *img) return 0; } +/* Function to initialize img priv and global data structure + */ +static int secboot_init(struct fsl_secboot_img_priv **img_ptr) +{ + *img_ptr = malloc(sizeof(struct fsl_secboot_img_priv)); + + struct fsl_secboot_img_priv *img = *img_ptr; + + if (!img) + return -ENOMEM; + memset(img, 0, sizeof(struct fsl_secboot_img_priv)); + +#if defined(CONFIG_FSL_ISBC_KEY_EXT) + if (glb.ie_addr) + img->ie_addr = glb.ie_addr; +#endif + return 0; +} + + /* haddr - Address of the header of image to be validated. * arg_hash_str - Option hash string. If provided, this * overrides the key hash in the SFP fuses. @@ -839,12 +896,9 @@ int fsl_secboot_validate(uintptr_t haddr, char *arg_hash_str, hash_cmd = 1; } - img = malloc(sizeof(struct fsl_secboot_img_priv)); - - if (!img) - return -1; - - memset(img, 0, sizeof(struct fsl_secboot_img_priv)); + ret = secboot_init(&img); + if (ret) + goto exit; /* Update the information in Private Struct */ hdr = &img->hdr; @@ -899,5 +953,7 @@ int fsl_secboot_validate(uintptr_t haddr, char *arg_hash_str, } exit: + /* Free Img as it was malloc'ed*/ + free(img); return ret; } diff --git a/board/freescale/corenet_ds/ddr.c b/board/freescale/corenet_ds/ddr.c index 9c1a4c2f7c..496d8415ec 100644 --- a/board/freescale/corenet_ds/ddr.c +++ b/board/freescale/corenet_ds/ddr.c @@ -260,7 +260,7 @@ found: popts->ddr_cdr1 = DDR_CDR1_DHC_EN; } -phys_size_t initdram(int board_type) +int dram_init(void) { phys_size_t dram_size; @@ -278,5 +278,7 @@ phys_size_t initdram(int board_type) dram_size *= 0x100000; debug(" DDR: "); - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/freescale/ls1021aqds/ddr.c b/board/freescale/ls1021aqds/ddr.c index 2f66ba9e7f..d16a69fc98 100644 --- a/board/freescale/ls1021aqds/ddr.c +++ b/board/freescale/ls1021aqds/ddr.c @@ -164,7 +164,7 @@ void board_mem_sleep_setup(void) } #endif -phys_size_t initdram(int board_type) +int fsl_initdram(void) { phys_size_t dram_size; @@ -179,11 +179,15 @@ phys_size_t initdram(int board_type) fsl_dp_resume(); #endif - return dram_size; + gd->ram_size = dram_size; + + return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; gd->bd->bi_dram[0].size = gd->ram_size; + + return 0; } diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c index 79078d237b..d81d8abc9b 100644 --- a/board/freescale/ls1021aqds/ls1021aqds.c +++ b/board/freescale/ls1021aqds/ls1021aqds.c @@ -162,9 +162,7 @@ int dram_init(void) * before accessing DDR SPD. */ select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); - gd->ram_size = initdram(0); - - return 0; + return fsl_initdram(); } #ifdef CONFIG_FSL_ESDHC diff --git a/board/freescale/ls1043aqds/ddr.c b/board/freescale/ls1043aqds/ddr.c index c740062887..2643f5bf4a 100644 --- a/board/freescale/ls1043aqds/ddr.c +++ b/board/freescale/ls1043aqds/ddr.c @@ -108,7 +108,7 @@ found: #endif } -phys_size_t initdram(int board_type) +int fsl_initdram(void) { phys_size_t dram_size; @@ -125,5 +125,7 @@ phys_size_t initdram(int board_type) fsl_dp_ddr_restore(); #endif - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c index 6507c09143..2df63e468d 100644 --- a/board/freescale/ls1043aqds/ls1043aqds.c +++ b/board/freescale/ls1043aqds/ls1043aqds.c @@ -7,6 +7,7 @@ #include <common.h> #include <i2c.h> #include <fdt_support.h> +#include <fsl_ddr_sdram.h> #include <asm/io.h> #include <asm/arch/clock.h> #include <asm/arch/fsl_serdes.h> @@ -153,7 +154,7 @@ int dram_init(void) * before accessing DDR SPD. */ select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); - gd->ram_size = initdram(0); + fsl_initdram(); #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) /* This will break-before-make MMU for DDR */ update_early_mmu_table(); diff --git a/board/freescale/ls1043ardb/ddr.c b/board/freescale/ls1043ardb/ddr.c index f90b85df1a..36d27ecfae 100644 --- a/board/freescale/ls1043ardb/ddr.c +++ b/board/freescale/ls1043ardb/ddr.c @@ -170,7 +170,7 @@ int fsl_ddr_get_dimm_params(dimm_params_t *pdimm, } #endif -phys_size_t initdram(int board_type) +int fsl_initdram(void) { phys_size_t dram_size; @@ -186,5 +186,7 @@ phys_size_t initdram(int board_type) fsl_dp_ddr_restore(); #endif - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c index 2333843958..728de2e3f1 100644 --- a/board/freescale/ls1043ardb/ls1043ardb.c +++ b/board/freescale/ls1043ardb/ls1043ardb.c @@ -23,9 +23,7 @@ #ifdef CONFIG_U_QE #include <fsl_qe.h> #endif -#ifdef CONFIG_FSL_LS_PPA #include <asm/arch/ppa.h> -#endif DECLARE_GLOBAL_DATA_PTR; diff --git a/board/freescale/ls1046aqds/ddr.c b/board/freescale/ls1046aqds/ddr.c index dc4d689adc..d37af34a9c 100644 --- a/board/freescale/ls1046aqds/ddr.c +++ b/board/freescale/ls1046aqds/ddr.c @@ -92,7 +92,7 @@ found: popts->cpo_sample = 0x70; } -phys_size_t initdram(int board_type) +int fsl_initdram(void) { phys_size_t dram_size; @@ -110,5 +110,7 @@ phys_size_t initdram(int board_type) erratum_a008850_post(); - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/freescale/ls1046aqds/ls1046aqds.c b/board/freescale/ls1046aqds/ls1046aqds.c index af3f70a38b..69fc15b681 100644 --- a/board/freescale/ls1046aqds/ls1046aqds.c +++ b/board/freescale/ls1046aqds/ls1046aqds.c @@ -7,6 +7,7 @@ #include <common.h> #include <i2c.h> #include <fdt_support.h> +#include <fsl_ddr_sdram.h> #include <asm/io.h> #include <asm/arch/clock.h> #include <asm/arch/fsl_serdes.h> @@ -149,7 +150,7 @@ int dram_init(void) * before accessing DDR SPD. */ select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); - gd->ram_size = initdram(0); + fsl_initdram(); #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) /* This will break-before-make MMU for DDR */ update_early_mmu_table(); diff --git a/board/freescale/ls1046ardb/ddr.c b/board/freescale/ls1046ardb/ddr.c index efe2ba6eb1..a16f7bc83a 100644 --- a/board/freescale/ls1046ardb/ddr.c +++ b/board/freescale/ls1046ardb/ddr.c @@ -96,7 +96,7 @@ found: popts->cpo_sample = 0x70; } -phys_size_t initdram(int board_type) +int fsl_initdram(void) { phys_size_t dram_size; @@ -110,5 +110,7 @@ phys_size_t initdram(int board_type) erratum_a008850_post(); - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/freescale/ls2080a/ddr.c b/board/freescale/ls2080a/ddr.c index 5ed9e1461b..9d176d3851 100644 --- a/board/freescale/ls2080a/ddr.c +++ b/board/freescale/ls2080a/ddr.c @@ -158,14 +158,13 @@ int fsl_ddr_get_dimm_params(dimm_params_t *pdimm, return 0; } #endif -phys_size_t initdram(int board_type) -{ - phys_size_t dram_size; +int fsl_initdram(void) +{ puts("Initializing DDR...."); puts("using SPD\n"); - dram_size = fsl_ddr_sdram(); + gd->ram_size = fsl_ddr_sdram(); - return dram_size; + return 0; } diff --git a/board/freescale/ls2080aqds/ddr.c b/board/freescale/ls2080aqds/ddr.c index 0408c0fc25..22a2676a95 100644 --- a/board/freescale/ls2080aqds/ddr.c +++ b/board/freescale/ls2080aqds/ddr.c @@ -155,17 +155,15 @@ found: } } -phys_size_t initdram(int board_type) +int fsl_initdram(void) { - phys_size_t dram_size; - #if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD) - return fsl_ddr_sdram_size(); + gd->ram_size = fsl_ddr_sdram_size(); #else puts("Initializing DDR....using SPD\n"); - dram_size = fsl_ddr_sdram(); + gd->ram_size = fsl_ddr_sdram(); #endif - return dram_size; + return 0; } diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c index 277013bfcc..6da9c6cfe8 100644 --- a/board/freescale/ls2080aqds/ls2080aqds.c +++ b/board/freescale/ls2080aqds/ls2080aqds.c @@ -19,6 +19,8 @@ #include <asm/arch/soc.h> #include <hwconfig.h> #include <fsl_sec.h> +#include <asm/arch/ppa.h> + #include "../common/qixis.h" #include "ls2080aqds_qixis.h" @@ -225,6 +227,14 @@ int board_init(void) select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); rtc_enable_32khz_output(); +#ifdef CONFIG_FSL_LS_PPA + ppa_init(); +#endif + +#ifdef CONFIG_FSL_CAAM + sec_init(); +#endif + return 0; } @@ -266,9 +276,6 @@ void detail_board_ddr_info(void) #if defined(CONFIG_ARCH_MISC_INIT) int arch_misc_init(void) { -#ifdef CONFIG_FSL_CAAM - sec_init(); -#endif return 0; } #endif diff --git a/board/freescale/ls2080ardb/ddr.c b/board/freescale/ls2080ardb/ddr.c index 2851d5b443..7002dfb236 100644 --- a/board/freescale/ls2080ardb/ddr.c +++ b/board/freescale/ls2080ardb/ddr.c @@ -158,17 +158,15 @@ found: } } -phys_size_t initdram(int board_type) +int fsl_initdram(void) { - phys_size_t dram_size; - #if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD) - return fsl_ddr_sdram_size(); + gd->ram_size = fsl_ddr_sdram_size(); #else puts("Initializing DDR....using SPD\n"); - dram_size = fsl_ddr_sdram(); + gd->ram_size = fsl_ddr_sdram(); #endif - return dram_size; + return 0; } diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index 4c01f560bc..ea05ec6f65 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -19,6 +19,7 @@ #include <i2c.h> #include <asm/arch/mmu.h> #include <asm/arch/soc.h> +#include <asm/arch/ppa.h> #include <fsl_sec.h> #include "../common/qixis.h" @@ -181,10 +182,17 @@ int board_init(void) QIXIS_WRITE(rst_ctl, QIXIS_RST_CTL_RESET_EN); +#ifdef CONFIG_FSL_LS_PPA + ppa_init(); +#endif + #ifdef CONFIG_FSL_MC_ENET /* invert AQR405 IRQ pins polarity */ out_le32(irq_ccsr + IRQCR_OFFSET / 4, AQR405_IRQ_MASK); #endif +#ifdef CONFIG_FSL_CAAM + sec_init(); +#endif return 0; } @@ -223,9 +231,6 @@ void detail_board_ddr_info(void) #if defined(CONFIG_ARCH_MISC_INIT) int arch_misc_init(void) { -#ifdef CONFIG_FSL_CAAM - sec_init(); -#endif return 0; } #endif diff --git a/board/freescale/m5208evbe/m5208evbe.c b/board/freescale/m5208evbe/m5208evbe.c index 1df128b268..4b841c6221 100644 --- a/board/freescale/m5208evbe/m5208evbe.c +++ b/board/freescale/m5208evbe/m5208evbe.c @@ -22,7 +22,7 @@ int checkboard(void) return 0; }; -phys_size_t initdram(int board_type) +int dram_init(void) { sdram_t *sdram = (sdram_t *)(MMAP_SDRAM); u32 dramsize, i; @@ -68,7 +68,9 @@ phys_size_t initdram(int board_type) udelay(100); - return dramsize; + gd->ram_size = dramsize; + + return 0; }; int testdram(void) diff --git a/board/freescale/m52277evb/m52277evb.c b/board/freescale/m52277evb/m52277evb.c index a1127e52a3..e4dfb6fda0 100644 --- a/board/freescale/m52277evb/m52277evb.c +++ b/board/freescale/m52277evb/m52277evb.c @@ -21,7 +21,7 @@ int checkboard(void) return 0; }; -phys_size_t initdram(int board_type) +int dram_init(void) { u32 dramsize; @@ -78,7 +78,9 @@ phys_size_t initdram(int board_type) udelay(100); #endif - return (dramsize); + gd->ram_size = dramsize; + + return 0; }; int testdram(void) diff --git a/board/freescale/m5235evb/m5235evb.c b/board/freescale/m5235evb/m5235evb.c index 68c1631f81..93403f6748 100644 --- a/board/freescale/m5235evb/m5235evb.c +++ b/board/freescale/m5235evb/m5235evb.c @@ -22,7 +22,7 @@ int checkboard(void) return 0; }; -phys_size_t initdram(int board_type) +int dram_init(void) { sdram_t *sdram = (sdram_t *)(MMAP_SDRAM); gpio_t *gpio = (gpio_t *)(MMAP_GPIO); @@ -97,7 +97,9 @@ phys_size_t initdram(int board_type) *(u32 *) (CONFIG_SYS_SDRAM_BASE + 0x400) = 0xA5A59696; } - return dramsize; + gd->ram_size = dramsize; + + return 0; }; int testdram(void) diff --git a/board/freescale/m5249evb/m5249evb.c b/board/freescale/m5249evb/m5249evb.c index 7ae842c3d3..7c9b599d66 100644 --- a/board/freescale/m5249evb/m5249evb.c +++ b/board/freescale/m5249evb/m5249evb.c @@ -10,6 +10,8 @@ #include <malloc.h> #include <asm/immap.h> +DECLARE_GLOBAL_DATA_PTR; + int checkboard (void) { ulong val; uchar val8; @@ -29,7 +31,8 @@ int checkboard (void) { }; -phys_size_t initdram (int board_type) { +int dram_init(void) +{ unsigned long junk = 0xa5a59696; /* @@ -81,7 +84,9 @@ phys_size_t initdram (int board_type) { mbar_writeLong(MCFSIM_DACR0, 0x0000b364); /* Enable DACR0[IMRS] (bit 6); RE remains enabled */ *((volatile unsigned long *) 0x800) = junk; /* Access RAM to initialize the mode register */ - return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; + gd->ram_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; + + return 0; }; diff --git a/board/freescale/m5253demo/m5253demo.c b/board/freescale/m5253demo/m5253demo.c index 7e516bfa40..c2cc2d76e4 100644 --- a/board/freescale/m5253demo/m5253demo.c +++ b/board/freescale/m5253demo/m5253demo.c @@ -13,6 +13,8 @@ #include <netdev.h> #include <asm/io.h> +DECLARE_GLOBAL_DATA_PTR; + int checkboard(void) { puts("Board: "); @@ -20,7 +22,7 @@ int checkboard(void) return 0; }; -phys_size_t initdram(int board_type) +int dram_init(void) { u32 dramsize = 0; @@ -73,7 +75,9 @@ phys_size_t initdram(int board_type) mb(); } - return dramsize; + gd->ram_size = dramsize; + + return 0; } int testdram(void) diff --git a/board/freescale/m5253evbe/m5253evbe.c b/board/freescale/m5253evbe/m5253evbe.c index 15ff755a56..c1ed431190 100644 --- a/board/freescale/m5253evbe/m5253evbe.c +++ b/board/freescale/m5253evbe/m5253evbe.c @@ -12,6 +12,8 @@ #include <asm/immap.h> #include <asm/io.h> +DECLARE_GLOBAL_DATA_PTR; + int checkboard(void) { puts("Board: "); @@ -19,7 +21,7 @@ int checkboard(void) return 0; }; -phys_size_t initdram(int board_type) +int dram_init(void) { /* * Check to see if the SDRAM has already been initialized @@ -66,7 +68,9 @@ phys_size_t initdram(int board_type) *(u32 *) (CONFIG_SYS_SDRAM_BASE + 0x800) = 0xa5a5a5a5; } - return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; + gd->ram_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; + + return 0; } int testdram(void) diff --git a/board/freescale/m5272c3/m5272c3.c b/board/freescale/m5272c3/m5272c3.c index 3ed4a7da93..efff465d0f 100644 --- a/board/freescale/m5272c3/m5272c3.c +++ b/board/freescale/m5272c3/m5272c3.c @@ -11,6 +11,7 @@ #include <asm/immap.h> #include <asm/io.h> +DECLARE_GLOBAL_DATA_PTR; int checkboard (void) { puts ("Board: "); @@ -18,7 +19,8 @@ int checkboard (void) { return 0; }; -phys_size_t initdram (int board_type) { +int dram_init(void) +{ sdramctrl_t * sdp = (sdramctrl_t *)(MMAP_SDRAM); out_be16(&sdp->sdram_sdtr, 0xf539); @@ -27,7 +29,9 @@ phys_size_t initdram (int board_type) { /* Dummy write to start SDRAM */ *((volatile unsigned long *)0) = 0; - return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; + gd->ram_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; + + return 0; }; int testdram (void) { diff --git a/board/freescale/m5275evb/m5275evb.c b/board/freescale/m5275evb/m5275evb.c index 16083d1bc0..5a9831d619 100644 --- a/board/freescale/m5275evb/m5275evb.c +++ b/board/freescale/m5275evb/m5275evb.c @@ -13,6 +13,8 @@ #include <asm/immap.h> #include <asm/io.h> +DECLARE_GLOBAL_DATA_PTR; + #define PERIOD 13 /* system bus period in ns */ #define SDRAM_TREFI 7800 /* in ns */ @@ -23,7 +25,7 @@ int checkboard(void) return 0; }; -phys_size_t initdram(int board_type) +int dram_init(void) { sdramctrl_t *sdp = (sdramctrl_t *)(MMAP_SDRAM); gpio_t *gpio_reg = (gpio_t *)(MMAP_GPIO); @@ -88,7 +90,9 @@ phys_size_t initdram(int board_type) | MCF_SDRAMC_SDCR_RCNT((SDRAM_TREFI/(PERIOD*64)) - 1 + 1) | MCF_SDRAMC_SDCR_DQS_OE(0x3)); - return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; + gd->ram_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; + + return 0; }; int testdram(void) diff --git a/board/freescale/m5282evb/m5282evb.c b/board/freescale/m5282evb/m5282evb.c index 39f12fb4aa..eb618b54f4 100644 --- a/board/freescale/m5282evb/m5282evb.c +++ b/board/freescale/m5282evb/m5282evb.c @@ -16,7 +16,7 @@ int checkboard (void) return 0; } -phys_size_t initdram (int board_type) +int dram_init(void) { u32 dramsize, i, dramclk; @@ -80,5 +80,7 @@ phys_size_t initdram (int board_type) /* Write to the SDRAM Mode Register */ *(u32 *)(CONFIG_SYS_SDRAM_BASE + 0x400) = 0xA5A59696; } - return dramsize; + gd->ram_size = dramsize; + + return 0; } diff --git a/board/freescale/m53017evb/m53017evb.c b/board/freescale/m53017evb/m53017evb.c index dbe886b03a..71cca35e02 100644 --- a/board/freescale/m53017evb/m53017evb.c +++ b/board/freescale/m53017evb/m53017evb.c @@ -22,7 +22,7 @@ int checkboard(void) return 0; }; -phys_size_t initdram(int board_type) +int dram_init(void) { sdram_t *sdram = (sdram_t *)(MMAP_SDRAM); u32 dramsize, i; @@ -68,7 +68,9 @@ phys_size_t initdram(int board_type) udelay(100); - return dramsize; + gd->ram_size = dramsize; + + return 0; }; int testdram(void) diff --git a/board/freescale/m5329evb/m5329evb.c b/board/freescale/m5329evb/m5329evb.c index 1f77adf4c2..4e0b4e4bd8 100644 --- a/board/freescale/m5329evb/m5329evb.c +++ b/board/freescale/m5329evb/m5329evb.c @@ -22,7 +22,7 @@ int checkboard(void) return 0; }; -phys_size_t initdram(int board_type) +int dram_init(void) { sdram_t *sdram = (sdram_t *)(MMAP_SDRAM); u32 dramsize, i; @@ -62,7 +62,9 @@ phys_size_t initdram(int board_type) udelay(100); - return dramsize; + gd->ram_size = dramsize; + + return 0; }; int testdram(void) diff --git a/board/freescale/m5373evb/m5373evb.c b/board/freescale/m5373evb/m5373evb.c index bfcc4b23b0..f2ed298f0f 100644 --- a/board/freescale/m5373evb/m5373evb.c +++ b/board/freescale/m5373evb/m5373evb.c @@ -22,7 +22,7 @@ int checkboard(void) return 0; }; -phys_size_t initdram(int board_type) +int dram_init(void) { sdram_t *sdram = (sdram_t *)(MMAP_SDRAM); u32 dramsize, i; @@ -62,7 +62,9 @@ phys_size_t initdram(int board_type) udelay(100); - return dramsize; + gd->ram_size = dramsize; + + return 0; }; int testdram(void) diff --git a/board/freescale/m54418twr/m54418twr.c b/board/freescale/m54418twr/m54418twr.c index 5375d1675d..433539486e 100644 --- a/board/freescale/m54418twr/m54418twr.c +++ b/board/freescale/m54418twr/m54418twr.c @@ -25,7 +25,7 @@ int checkboard(void) return 0; }; -phys_size_t initdram(int board_type) +int dram_init(void) { u32 dramsize; @@ -104,7 +104,9 @@ phys_size_t initdram(int board_type) udelay(100); #endif - return dramsize; + gd->ram_size = dramsize; + + return 0; }; int testdram(void) diff --git a/board/freescale/m54451evb/m54451evb.c b/board/freescale/m54451evb/m54451evb.c index d2ad42c085..050624bf92 100644 --- a/board/freescale/m54451evb/m54451evb.c +++ b/board/freescale/m54451evb/m54451evb.c @@ -26,7 +26,7 @@ int checkboard(void) return 0; }; -phys_size_t initdram(int board_type) +int dram_init(void) { u32 dramsize; #ifdef CONFIG_CF_SBF @@ -82,7 +82,9 @@ phys_size_t initdram(int board_type) udelay(100); #endif - return (dramsize); + gd->ram_size = dramsize; + + return 0; }; int testdram(void) diff --git a/board/freescale/m54455evb/m54455evb.c b/board/freescale/m54455evb/m54455evb.c index 76b4322a19..d6b0650b99 100644 --- a/board/freescale/m54455evb/m54455evb.c +++ b/board/freescale/m54455evb/m54455evb.c @@ -22,7 +22,7 @@ int checkboard(void) return 0; }; -phys_size_t initdram(int board_type) +int dram_init(void) { u32 dramsize; #ifdef CONFIG_CF_SBF @@ -75,7 +75,9 @@ phys_size_t initdram(int board_type) udelay(100); #endif - return (dramsize << 1); + gd->ram_size = dramsize << 1; + + return 0; }; int testdram(void) diff --git a/board/freescale/m547xevb/m547xevb.c b/board/freescale/m547xevb/m547xevb.c index 1e3cb6179f..d28f43da04 100644 --- a/board/freescale/m547xevb/m547xevb.c +++ b/board/freescale/m547xevb/m547xevb.c @@ -23,7 +23,7 @@ int checkboard(void) return 0; }; -phys_size_t initdram(int board_type) +int dram_init(void) { siu_t *siu = (siu_t *) (MMAP_SIU); sdram_t *sdram = (sdram_t *)(MMAP_SDRAM); @@ -79,7 +79,9 @@ phys_size_t initdram(int board_type) udelay(100); - return dramsize; + gd->ram_size = dramsize; + + return 0; }; int testdram(void) diff --git a/board/freescale/m548xevb/m548xevb.c b/board/freescale/m548xevb/m548xevb.c index 05361550b3..56060b68b6 100644 --- a/board/freescale/m548xevb/m548xevb.c +++ b/board/freescale/m548xevb/m548xevb.c @@ -23,7 +23,7 @@ int checkboard(void) return 0; }; -phys_size_t initdram(int board_type) +int dram_init(void) { siu_t *siu = (siu_t *) (MMAP_SIU); sdram_t *sdram = (sdram_t *)(MMAP_SDRAM); @@ -79,7 +79,9 @@ phys_size_t initdram(int board_type) udelay(100); - return dramsize; + gd->ram_size = dramsize; + + return 0; }; int testdram(void) diff --git a/board/freescale/mpc5121ads/mpc5121ads.c b/board/freescale/mpc5121ads/mpc5121ads.c index 7c44282ca2..f87579f193 100644 --- a/board/freescale/mpc5121ads/mpc5121ads.c +++ b/board/freescale/mpc5121ads/mpc5121ads.c @@ -95,7 +95,7 @@ int is_micron(void){ return(ismicron); } -phys_size_t initdram(int board_type) +int dram_init(void) { u32 msize = 0; /* @@ -167,7 +167,9 @@ phys_size_t initdram(int board_type) sizeof(elpida_init_sequence)/sizeof(u32)); } - return msize; + gd->ram_size = msize; + + return 0; } int misc_init_r(void) diff --git a/board/freescale/mpc8308rdb/sdram.c b/board/freescale/mpc8308rdb/sdram.c index 89b665e649..81e155a401 100644 --- a/board/freescale/mpc8308rdb/sdram.c +++ b/board/freescale/mpc8308rdb/sdram.c @@ -65,17 +65,19 @@ static long fixed_sdram(void) return get_ram_size(CONFIG_SYS_DDR_SDRAM_BASE, msize); } -phys_size_t initdram(int board_type) +int dram_init(void) { immap_t *im = (immap_t *)CONFIG_SYS_IMMR; u32 msize; if ((in_be32(&im->sysconf.immrbar) & IMMRBAR_BASE_ADDR) != (u32)im) - return -1; + return -ENXIO; /* DDR SDRAM */ msize = fixed_sdram(); /* return total bus SDRAM size(bytes) -- DDR */ - return msize; + gd->ram_size = msize; + + return 0; } diff --git a/board/freescale/mpc8313erdb/mpc8313erdb.c b/board/freescale/mpc8313erdb/mpc8313erdb.c index eac193e817..8974378326 100644 --- a/board/freescale/mpc8313erdb/mpc8313erdb.c +++ b/board/freescale/mpc8313erdb/mpc8313erdb.c @@ -133,8 +133,8 @@ void board_init_f(ulong bootflag) NS16550_init((NS16550_t)(CONFIG_SYS_IMMR + 0x4500), CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE); puts("NAND boot... "); - init_timebase(); - initdram(0); + timer_init(); + dram_init(); relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, (gd_t *)gd, CONFIG_SYS_NAND_U_BOOT_RELOC); } diff --git a/board/freescale/mpc8313erdb/sdram.c b/board/freescale/mpc8313erdb/sdram.c index 6282c3d920..a4128cbd11 100644 --- a/board/freescale/mpc8313erdb/sdram.c +++ b/board/freescale/mpc8313erdb/sdram.c @@ -97,14 +97,14 @@ static long fixed_sdram(void) return msize; } -phys_size_t initdram(int board_type) +int dram_init(void) { volatile immap_t *im = (volatile immap_t *)CONFIG_SYS_IMMR; volatile fsl_lbc_t *lbc = &im->im_lbc; u32 msize; if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im) - return -1; + return -ENXIO; /* DDR SDRAM - Main SODIMM */ msize = fixed_sdram(); @@ -120,5 +120,7 @@ phys_size_t initdram(int board_type) #endif /* return total bus SDRAM size(bytes) -- DDR */ - return msize; + gd->ram_size = msize; + + return 0; } diff --git a/board/freescale/mpc8315erdb/mpc8315erdb.c b/board/freescale/mpc8315erdb/mpc8315erdb.c index 3cec09b586..22f1565b4c 100644 --- a/board/freescale/mpc8315erdb/mpc8315erdb.c +++ b/board/freescale/mpc8315erdb/mpc8315erdb.c @@ -221,8 +221,8 @@ void board_init_f(ulong bootflag) NS16550_init((NS16550_t)(CONFIG_SYS_IMMR + 0x4500), CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE); puts("NAND boot... "); - init_timebase(); - initdram(0); + timer_init(); + dram_init(); relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC + 0x10000, (gd_t *)gd, CONFIG_SYS_NAND_U_BOOT_RELOC); } diff --git a/board/freescale/mpc8315erdb/sdram.c b/board/freescale/mpc8315erdb/sdram.c index 6c9431202f..b69c86bb81 100644 --- a/board/freescale/mpc8315erdb/sdram.c +++ b/board/freescale/mpc8315erdb/sdram.c @@ -92,13 +92,13 @@ static long fixed_sdram(void) } #endif /* CONFIG_SYS_RAMBOOT */ -phys_size_t initdram(int board_type) +int dram_init(void) { volatile immap_t *im = (volatile immap_t *)CONFIG_SYS_IMMR; u32 msize; if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im) - return -1; + return -ENXIO; /* DDR SDRAM */ msize = fixed_sdram(); @@ -106,6 +106,8 @@ phys_size_t initdram(int board_type) if (im->pmc.pmccr1 & PMCCR1_POWER_OFF) resume_from_sleep(); - /* return total bus SDRAM size(bytes) -- DDR */ - return msize; + /* set total bus SDRAM size(bytes) -- DDR */ + gd->ram_size = msize; + + return 0; } diff --git a/board/freescale/mpc8323erdb/mpc8323erdb.c b/board/freescale/mpc8323erdb/mpc8323erdb.c index 0a0152ad9e..f30a1510ee 100644 --- a/board/freescale/mpc8323erdb/mpc8323erdb.c +++ b/board/freescale/mpc8323erdb/mpc8323erdb.c @@ -21,6 +21,8 @@ #endif #include <asm/mmu.h> +DECLARE_GLOBAL_DATA_PTR; + const qe_iop_conf_t qe_iop_conf_tab[] = { /* UCC3 */ {1, 0, 1, 0, 1}, /* TxD0 */ @@ -68,21 +70,23 @@ const qe_iop_conf_t qe_iop_conf_tab[] = { int fixed_sdram(void); -phys_size_t initdram(int board_type) +int dram_init(void) { volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; u32 msize = 0; if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) - return -1; + return -ENXIO; /* DDR SDRAM - Main SODIMM */ im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; msize = fixed_sdram(); - /* return total bus SDRAM size(bytes) -- DDR */ - return (msize * 1024 * 1024); + /* set total bus SDRAM size(bytes) -- DDR */ + gd->ram_size = msize * 1024 * 1024; + + return 0; } /************************************************************************* diff --git a/board/freescale/mpc832xemds/mpc832xemds.c b/board/freescale/mpc832xemds/mpc832xemds.c index adf425486e..b49e03e4f9 100644 --- a/board/freescale/mpc832xemds/mpc832xemds.c +++ b/board/freescale/mpc832xemds/mpc832xemds.c @@ -23,6 +23,8 @@ #include "../common/pq-mds-pib.h" #endif +DECLARE_GLOBAL_DATA_PTR; + const qe_iop_conf_t qe_iop_conf_tab[] = { /* ETH3 */ {1, 0, 1, 0, 1}, /* TxD0 */ @@ -88,21 +90,23 @@ int board_early_init_r(void) int fixed_sdram(void); -phys_size_t initdram(int board_type) +int dram_init(void) { volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; u32 msize = 0; if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) - return -1; + return -ENXIO; /* DDR SDRAM - Main SODIMM */ im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; msize = fixed_sdram(); - /* return total bus SDRAM size(bytes) -- DDR */ - return (msize * 1024 * 1024); + /* set total bus SDRAM size(bytes) -- DDR */ + gd->ram_size = msize * 1024 * 1024; + + return 0; } /************************************************************************* diff --git a/board/freescale/mpc8349emds/mpc8349emds.c b/board/freescale/mpc8349emds/mpc8349emds.c index 02b5040ef4..5f502e2a65 100644 --- a/board/freescale/mpc8349emds/mpc8349emds.c +++ b/board/freescale/mpc8349emds/mpc8349emds.c @@ -22,6 +22,8 @@ #include <libfdt.h> #endif +DECLARE_GLOBAL_DATA_PTR; + int fixed_sdram(void); void sdram_init(void); @@ -46,13 +48,13 @@ int board_early_init_f (void) #define ns2clk(ns) (ns / (1000000000 / CONFIG_8349_CLKIN) + 1) -phys_size_t initdram (int board_type) +int dram_init(void) { volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; phys_size_t msize = 0; if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im) - return -1; + return -ENXIO; /* DDR SDRAM - Main SODIMM */ im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; @@ -73,8 +75,10 @@ phys_size_t initdram (int board_type) */ sdram_init(); - /* return total bus SDRAM size(bytes) -- DDR */ - return msize; + /* set total bus SDRAM size(bytes) -- DDR */ + gd->ram_size = msize; + + return 0; } #if !defined(CONFIG_SPD_EEPROM) diff --git a/board/freescale/mpc8349itx/mpc8349itx.c b/board/freescale/mpc8349itx/mpc8349itx.c index 22a1d99c88..895e9ffda6 100644 --- a/board/freescale/mpc8349itx/mpc8349itx.c +++ b/board/freescale/mpc8349itx/mpc8349itx.c @@ -20,6 +20,8 @@ #include <libfdt.h> #endif +DECLARE_GLOBAL_DATA_PTR; + #ifndef CONFIG_SPD_EEPROM /************************************************************************* * fixed sdram init -- doesn't use serial presence detect. @@ -116,7 +118,7 @@ volatile static struct pci_controller hose[] = { }; #endif /* CONFIG_PCI */ -phys_size_t initdram(int board_type) +int dram_init(void) { volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; u32 msize = 0; @@ -125,7 +127,7 @@ phys_size_t initdram(int board_type) #endif if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) - return -1; + return -ENXIO; /* DDR SDRAM - Main SODIMM */ im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; @@ -144,7 +146,9 @@ phys_size_t initdram(int board_type) #endif /* return total bus RAM size(bytes) */ - return msize * 1024 * 1024; + gd->ram_size = msize * 1024 * 1024; + + return 0; } int checkboard(void) diff --git a/board/freescale/mpc837xemds/mpc837xemds.c b/board/freescale/mpc837xemds/mpc837xemds.c index 045841d57b..233049227f 100644 --- a/board/freescale/mpc837xemds/mpc837xemds.c +++ b/board/freescale/mpc837xemds/mpc837xemds.c @@ -20,6 +20,8 @@ #include "pci.h" #include "../common/pq-mds-pib.h" +DECLARE_GLOBAL_DATA_PTR; + int board_early_init_f(void) { u8 *bcsr = (u8 *)CONFIG_SYS_BCSR; @@ -216,13 +218,13 @@ extern void ddr_enable_ecc(unsigned int dram_size); #endif int fixed_sdram(void); -phys_size_t initdram(int board_type) +int dram_init(void) { volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; u32 msize = 0; if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) - return -1; + return -ENXIO; #if defined(CONFIG_SPD_EEPROM) msize = spd_sdram(); @@ -236,7 +238,9 @@ phys_size_t initdram(int board_type) #endif /* return total bus DDR size(bytes) */ - return (msize * 1024 * 1024); + gd->ram_size = msize * 1024 * 1024; + + return 0; } #if !defined(CONFIG_SPD_EEPROM) diff --git a/board/freescale/mpc837xerdb/mpc837xerdb.c b/board/freescale/mpc837xerdb/mpc837xerdb.c index 07c0599858..319f0479e2 100644 --- a/board/freescale/mpc837xerdb/mpc837xerdb.c +++ b/board/freescale/mpc837xerdb/mpc837xerdb.c @@ -16,6 +16,8 @@ #include <vsc7385.h> #include <fsl_esdhc.h> +DECLARE_GLOBAL_DATA_PTR; + #if defined(CONFIG_SYS_DRAM_TEST) int testdram(void) @@ -60,13 +62,13 @@ void ddr_enable_ecc(unsigned int dram_size); #endif int fixed_sdram(void); -phys_size_t initdram(int board_type) +int dram_init(void) { immap_t *im = (immap_t *) CONFIG_SYS_IMMR; u32 msize = 0; if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) - return -1; + return -ENXIO; #if defined(CONFIG_SPD_EEPROM) msize = spd_sdram(); @@ -79,7 +81,9 @@ phys_size_t initdram(int board_type) ddr_enable_ecc(msize * 1024 * 1024); #endif /* return total bus DDR size(bytes) */ - return (msize * 1024 * 1024); + gd->ram_size = msize * 1024 * 1024; + + return 0; } #if !defined(CONFIG_SPD_EEPROM) diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c index 95e398c9f4..d97562c849 100644 --- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c +++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c @@ -19,6 +19,8 @@ #include <spd_sdram.h> #include <netdev.h> +DECLARE_GLOBAL_DATA_PTR; + void sdram_init(void); phys_size_t fixed_sdram(void); int mpc8610hpcd_diu_init(void); @@ -116,8 +118,7 @@ int checkboard(void) } -phys_size_t -initdram(int board_type) +int dram_init(void) { phys_size_t dram_size = 0; @@ -130,7 +131,9 @@ initdram(int board_type) setup_ddr_bat(dram_size); debug(" DDR: "); - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c index 94633b5c99..2604a51e91 100644 --- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c +++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c @@ -16,6 +16,8 @@ #include <fdt_support.h> #include <netdev.h> +DECLARE_GLOBAL_DATA_PTR; + phys_size_t fixed_sdram(void); int checkboard(void) @@ -37,8 +39,7 @@ int checkboard(void) return 0; } -phys_size_t -initdram(int board_type) +int dram_init(void) { phys_size_t dram_size = 0; @@ -51,7 +52,9 @@ initdram(int board_type) setup_ddr_bat(dram_size); debug(" DDR: "); - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/freescale/mx35pdk/mx35pdk.c b/board/freescale/mx35pdk/mx35pdk.c index fb0ab77445..123fb11f42 100644 --- a/board/freescale/mx35pdk/mx35pdk.c +++ b/board/freescale/mx35pdk/mx35pdk.c @@ -47,13 +47,15 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; gd->bd->bi_dram[1].start = PHYS_SDRAM_2; gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; + + return 0; } #define I2C_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN | PAD_CTL_ODE) diff --git a/board/freescale/mx53ard/mx53ard.c b/board/freescale/mx53ard/mx53ard.c index a6e46b92f9..eb9f74337f 100644 --- a/board/freescale/mx53ard/mx53ard.c +++ b/board/freescale/mx53ard/mx53ard.c @@ -32,13 +32,15 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; gd->bd->bi_dram[1].start = PHYS_SDRAM_2; gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; + + return 0; } #ifdef CONFIG_NAND_MXC diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c index 9e1072f4b1..3741fa178c 100644 --- a/board/freescale/mx53loco/mx53loco.c +++ b/board/freescale/mx53loco/mx53loco.c @@ -58,13 +58,15 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = mx53_dram_size[0]; gd->bd->bi_dram[1].start = PHYS_SDRAM_2; gd->bd->bi_dram[1].size = mx53_dram_size[1]; + + return 0; } u32 get_board_rev(void) diff --git a/board/freescale/mx53smd/mx53smd.c b/board/freescale/mx53smd/mx53smd.c index 938c611ef8..630d6714af 100644 --- a/board/freescale/mx53smd/mx53smd.c +++ b/board/freescale/mx53smd/mx53smd.c @@ -30,13 +30,15 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; gd->bd->bi_dram[1].start = PHYS_SDRAM_2; gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; + + return 0; } #define UART_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \ diff --git a/board/freescale/p1010rdb/spl.c b/board/freescale/p1010rdb/spl.c index 05c76f2e45..2cebc2c002 100644 --- a/board/freescale/p1010rdb/spl.c +++ b/board/freescale/p1010rdb/spl.c @@ -94,7 +94,7 @@ void board_init_r(gd_t *gd, ulong dest_addr) i2c_init_all(); - gd->ram_size = initdram(0); + dram_init(); #ifdef CONFIG_SPL_NAND_BOOT puts("\nTertiary program loader running in sram..."); #else diff --git a/board/freescale/p1022ds/spl.c b/board/freescale/p1022ds/spl.c index ef38551600..a117dc3a2c 100644 --- a/board/freescale/p1022ds/spl.c +++ b/board/freescale/p1022ds/spl.c @@ -111,7 +111,7 @@ void board_init_r(gd_t *gd, ulong dest_addr) i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); #endif - gd->ram_size = initdram(0); + dram_init(); #ifdef CONFIG_SPL_NAND_BOOT puts("Tertiary program loader running in sram..."); #else diff --git a/board/freescale/p1_p2_rdb_pc/spl.c b/board/freescale/p1_p2_rdb_pc/spl.c index 2af5576ff7..1cf3497aa6 100644 --- a/board/freescale/p1_p2_rdb_pc/spl.c +++ b/board/freescale/p1_p2_rdb_pc/spl.c @@ -108,7 +108,7 @@ void board_init_r(gd_t *gd, ulong dest_addr) i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); #endif - gd->ram_size = initdram(0); + dram_init(); #ifdef CONFIG_SPL_NAND_BOOT puts("Tertiary program loader running in sram..."); #else diff --git a/board/freescale/p2041rdb/ddr.c b/board/freescale/p2041rdb/ddr.c index b2493e1f61..1ab98fc089 100644 --- a/board/freescale/p2041rdb/ddr.c +++ b/board/freescale/p2041rdb/ddr.c @@ -12,6 +12,8 @@ #include <fsl_ddr_dimm_params.h> #include <asm/fsl_law.h> +DECLARE_GLOBAL_DATA_PTR; + struct board_specific_parameters { u32 n_ranks; u32 datarate_mhz_high; @@ -116,7 +118,7 @@ found: popts->ddr_cdr1 = DDR_CDR1_DHC_EN; } -phys_size_t initdram(int board_type) +int dram_init(void) { phys_size_t dram_size = 0; @@ -127,12 +129,14 @@ phys_size_t initdram(int board_type) dram_size = fsl_ddr_sdram(); } else { puts("no SPD and fixed parameters\n"); - return dram_size; + return -ENXIO; } dram_size = setup_ddr_tlbs(dram_size / 0x100000); dram_size *= 0x100000; debug(" DDR: "); - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/freescale/t102xqds/ddr.c b/board/freescale/t102xqds/ddr.c index b6b1191990..d822d3f806 100644 --- a/board/freescale/t102xqds/ddr.c +++ b/board/freescale/t102xqds/ddr.c @@ -169,7 +169,7 @@ void board_mem_sleep_setup(void) } #endif -phys_size_t initdram(int board_type) +int dram_init(void) { phys_size_t dram_size; @@ -187,5 +187,7 @@ phys_size_t initdram(int board_type) fsl_dp_resume(); #endif - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/freescale/t102xqds/spl.c b/board/freescale/t102xqds/spl.c index 3e96b33c40..b987ecea1d 100644 --- a/board/freescale/t102xqds/spl.c +++ b/board/freescale/t102xqds/spl.c @@ -142,7 +142,7 @@ void board_init_r(gd_t *gd, ulong dest_addr) i2c_init_all(); - gd->ram_size = initdram(0); + dram_init(); #ifdef CONFIG_SPL_MMC_BOOT mmc_boot(); diff --git a/board/freescale/t102xrdb/ddr.c b/board/freescale/t102xrdb/ddr.c index e66657869c..49460a02d1 100644 --- a/board/freescale/t102xrdb/ddr.c +++ b/board/freescale/t102xrdb/ddr.c @@ -229,7 +229,7 @@ void board_mem_sleep_setup(void) } #endif -phys_size_t initdram(int board_type) +int dram_init(void) { phys_size_t dram_size; @@ -249,5 +249,7 @@ phys_size_t initdram(int board_type) fsl_dp_resume(); #endif - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/freescale/t102xrdb/spl.c b/board/freescale/t102xrdb/spl.c index b70c2c5d79..dc6d9eeef6 100644 --- a/board/freescale/t102xrdb/spl.c +++ b/board/freescale/t102xrdb/spl.c @@ -129,7 +129,7 @@ void board_init_r(gd_t *gd, ulong dest_addr) i2c_init_all(); - gd->ram_size = initdram(0); + dram_init(); #ifdef CONFIG_SPL_MMC_BOOT mmc_boot(); diff --git a/board/freescale/t1040qds/ddr.c b/board/freescale/t1040qds/ddr.c index cb58d1e524..8f7909dc68 100644 --- a/board/freescale/t1040qds/ddr.c +++ b/board/freescale/t1040qds/ddr.c @@ -117,7 +117,7 @@ void board_mem_sleep_setup(void) } #endif -phys_size_t initdram(int board_type) +int dram_init(void) { phys_size_t dram_size; @@ -134,5 +134,7 @@ phys_size_t initdram(int board_type) fsl_dp_resume(); #endif - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/freescale/t104xrdb/ddr.c b/board/freescale/t104xrdb/ddr.c index 302f19be69..4e55844abe 100644 --- a/board/freescale/t104xrdb/ddr.c +++ b/board/freescale/t104xrdb/ddr.c @@ -120,7 +120,7 @@ void board_mem_sleep_setup(void) } #endif -phys_size_t initdram(int board_type) +int dram_init(void) { phys_size_t dram_size; @@ -137,5 +137,7 @@ phys_size_t initdram(int board_type) fsl_dp_resume(); #endif - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/freescale/t104xrdb/spl.c b/board/freescale/t104xrdb/spl.c index 4402e0f4b0..2e43307b2d 100644 --- a/board/freescale/t104xrdb/spl.c +++ b/board/freescale/t104xrdb/spl.c @@ -125,7 +125,7 @@ void board_init_r(gd_t *gd, ulong dest_addr) puts("\n\n"); - gd->ram_size = initdram(0); + dram_init(); #ifdef CONFIG_SPL_MMC_BOOT mmc_boot(); diff --git a/board/freescale/t208xqds/ddr.c b/board/freescale/t208xqds/ddr.c index d6e4554a80..ba65049709 100644 --- a/board/freescale/t208xqds/ddr.c +++ b/board/freescale/t208xqds/ddr.c @@ -104,7 +104,7 @@ found: popts->cpo_sample = 0x64; } -phys_size_t initdram(int board_type) +int dram_init(void) { phys_size_t dram_size; @@ -118,5 +118,7 @@ phys_size_t initdram(int board_type) dram_size = setup_ddr_tlbs(dram_size / 0x100000); dram_size *= 0x100000; - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/freescale/t208xqds/spl.c b/board/freescale/t208xqds/spl.c index 334f5083b8..d7d716b690 100644 --- a/board/freescale/t208xqds/spl.c +++ b/board/freescale/t208xqds/spl.c @@ -128,7 +128,7 @@ void board_init_r(gd_t *gd, ulong dest_addr) i2c_init_all(); - gd->ram_size = initdram(0); + dram_init(); #ifdef CONFIG_SPL_MMC_BOOT mmc_boot(); diff --git a/board/freescale/t208xrdb/ddr.c b/board/freescale/t208xrdb/ddr.c index 3487261b9d..50dc69a443 100644 --- a/board/freescale/t208xrdb/ddr.c +++ b/board/freescale/t208xrdb/ddr.c @@ -97,7 +97,7 @@ found: popts->cpo_sample = 0x54; } -phys_size_t initdram(int board_type) +int dram_init(void) { phys_size_t dram_size; @@ -111,5 +111,7 @@ phys_size_t initdram(int board_type) dram_size = setup_ddr_tlbs(dram_size / 0x100000); dram_size *= 0x100000; - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/freescale/t208xrdb/spl.c b/board/freescale/t208xrdb/spl.c index aa8e9285fe..b43140148b 100644 --- a/board/freescale/t208xrdb/spl.c +++ b/board/freescale/t208xrdb/spl.c @@ -98,7 +98,7 @@ void board_init_r(gd_t *gd, ulong dest_addr) i2c_init_all(); - gd->ram_size = initdram(0); + dram_init(); #ifdef CONFIG_SPL_MMC_BOOT mmc_boot(); diff --git a/board/freescale/t4qds/ddr.c b/board/freescale/t4qds/ddr.c index 842073b6c6..740897015e 100644 --- a/board/freescale/t4qds/ddr.c +++ b/board/freescale/t4qds/ddr.c @@ -112,7 +112,7 @@ found: popts->cpo_sample = 0x63; } -phys_size_t initdram(int board_type) +int dram_init(void) { phys_size_t dram_size; @@ -127,5 +127,7 @@ phys_size_t initdram(int board_type) dram_size = setup_ddr_tlbs(dram_size / 0x100000); dram_size *= 0x100000; - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/freescale/t4qds/spl.c b/board/freescale/t4qds/spl.c index 5e946dc84f..9ecdaedda3 100644 --- a/board/freescale/t4qds/spl.c +++ b/board/freescale/t4qds/spl.c @@ -133,7 +133,7 @@ void board_init_r(gd_t *gd, ulong dest_addr) i2c_init_all(); - gd->ram_size = initdram(0); + dram_init(); #ifdef CONFIG_SPL_MMC_BOOT mmc_boot(); diff --git a/board/freescale/t4rdb/ddr.c b/board/freescale/t4rdb/ddr.c index 7b05821cf7..8415527ec2 100644 --- a/board/freescale/t4rdb/ddr.c +++ b/board/freescale/t4rdb/ddr.c @@ -105,7 +105,7 @@ found: popts->cpo_sample = 0x64; } -phys_size_t initdram(int board_type) +int dram_init(void) { phys_size_t dram_size; @@ -120,5 +120,7 @@ phys_size_t initdram(int board_type) dram_size = setup_ddr_tlbs(dram_size / 0x100000); dram_size *= 0x100000; - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/freescale/t4rdb/spl.c b/board/freescale/t4rdb/spl.c index a32e34ef96..5feab1cfcd 100644 --- a/board/freescale/t4rdb/spl.c +++ b/board/freescale/t4rdb/spl.c @@ -91,7 +91,7 @@ void board_init_r(gd_t *gd, ulong dest_addr) i2c_init_all(); - gd->ram_size = initdram(0); + dram_init(); mmc_boot(); } diff --git a/board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c b/board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c index d26212ea82..f1868550c7 100644 --- a/board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c +++ b/board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c @@ -10,9 +10,11 @@ #include <config.h> #include <asm/leon.h> -phys_size_t initdram(int board_type) +int dram_init(void) { - return 1; + /* Does not set gd->ram_size here */ + + return 0; } int checkboard(void) diff --git a/board/gaisler/gr_ep2s60/gr_ep2s60.c b/board/gaisler/gr_ep2s60/gr_ep2s60.c index 98fb45fdb8..a73d89db2f 100644 --- a/board/gaisler/gr_ep2s60/gr_ep2s60.c +++ b/board/gaisler/gr_ep2s60/gr_ep2s60.c @@ -10,9 +10,11 @@ #include <config.h> #include <asm/leon.h> -phys_size_t initdram(int board_type) +int dram_init(void) { - return 1; + /* Does not set gd->ram_size here */ + + return 0; } int checkboard(void) diff --git a/board/gaisler/gr_xc3s_1500/gr_xc3s_1500.c b/board/gaisler/gr_xc3s_1500/gr_xc3s_1500.c index 32fbbe2d75..d86047a785 100644 --- a/board/gaisler/gr_xc3s_1500/gr_xc3s_1500.c +++ b/board/gaisler/gr_xc3s_1500/gr_xc3s_1500.c @@ -9,9 +9,11 @@ #include <config.h> #include <asm/leon.h> -phys_size_t initdram(int board_type) +int dram_init(void) { - return 1; + /* Does not set gd->ram_size here */ + + return 0; } int checkboard(void) diff --git a/board/gaisler/grsim/grsim.c b/board/gaisler/grsim/grsim.c index fd73920b62..99262b0813 100644 --- a/board/gaisler/grsim/grsim.c +++ b/board/gaisler/grsim/grsim.c @@ -10,9 +10,11 @@ #include <common.h> #include <asm/leon.h> -phys_size_t initdram(int board_type) +int dram_init(void) { - return 1; + /* Does not set gd->ram_size here */ + + return 0; } int checkboard(void) diff --git a/board/gaisler/grsim_leon2/grsim_leon2.c b/board/gaisler/grsim_leon2/grsim_leon2.c index 882b0a4247..c6c4bb4270 100644 --- a/board/gaisler/grsim_leon2/grsim_leon2.c +++ b/board/gaisler/grsim_leon2/grsim_leon2.c @@ -10,9 +10,11 @@ #include <common.h> #include <asm/leon.h> -phys_size_t initdram(int board_type) +int dram_init(void) { - return 1; + /* Does not set gd->ram_size here */ + + return 0; } int checkboard(void) diff --git a/board/gdsys/a38x/.gitignore b/board/gdsys/a38x/.gitignore new file mode 100644 index 0000000000..775b9346b8 --- /dev/null +++ b/board/gdsys/a38x/.gitignore @@ -0,0 +1 @@ +kwbimage.cfg diff --git a/board/gdsys/a38x/Kconfig b/board/gdsys/a38x/Kconfig new file mode 100644 index 0000000000..3fdef64b59 --- /dev/null +++ b/board/gdsys/a38x/Kconfig @@ -0,0 +1,36 @@ +if TARGET_CONTROLCENTERDC + +config SYS_BOARD + default "a38x" + +config SYS_VENDOR + default "gdsys" + +config SYS_SOC + default "mvebu" + +config SYS_CONFIG_NAME + default "controlcenterdc" + +menu "Controlcenter DC board options" + +choice + prompt "Select boot method" + +config SPL_BOOT_DEVICE_SPI + bool "SPI" + +config SPL_BOOT_DEVICE_MMC + bool "MMC" + select SPL_LIBDISK_SUPPORT + +endchoice + +#config SPL_BOOT_DEVICE +# int +# default 1 if SPL_BOOT_DEVICE_SPI +# default 2 if SPL_BOOT_DEVICE_MMC + +endmenu + +endif diff --git a/board/gdsys/a38x/MAINTAINERS b/board/gdsys/a38x/MAINTAINERS new file mode 100644 index 0000000000..3cb9b63ff0 --- /dev/null +++ b/board/gdsys/a38x/MAINTAINERS @@ -0,0 +1,7 @@ +A38X BOARD +M: Dirk Eibach <eibach@gdsys.cc> +M: Mario Six <six@gdsys.de> +S: Maintained +F: board/gdsys/a38x/ +F: include/configs/controlcenterdc.h +F: configs/controlcenterdc_defconfig diff --git a/board/gdsys/a38x/Makefile b/board/gdsys/a38x/Makefile new file mode 100644 index 0000000000..e1f0bd8433 --- /dev/null +++ b/board/gdsys/a38x/Makefile @@ -0,0 +1,44 @@ +# +# Copyright (C) 2015 Stefan Roese <sr@denx.de> +# Copyright (C) 2015 Reinhard Pfau <reinhard.pfau@gdsys.cc> +# Copyright (C) 2016 Mario Six <mario.six@gdsys.cc> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-$(CONFIG_TARGET_CONTROLCENTERDC) += controlcenterdc.o hre.o spl.o keyprogram.o dt_helpers.o + +ifeq ($(CONFIG_SPL_BUILD),) + +obj-$(CONFIG_TARGET_CONTROLCENTERDC) += hydra.o ihs_phys.o + +extra-$(CONFIG_TARGET_CONTROLCENTERDC) += kwbimage.cfg + +KWB_REPLACE += BOOT_FROM +ifneq ($(CONFIG_SPL_BOOT_DEVICE_SPI),) + KWB_CFG_BOOT_FROM=spi +endif +ifneq ($(CONFIG_SPL_BOOT_DEVICE_MMC),) + KWB_CFG_BOOT_FROM=sdio +endif + +ifneq ($(CONFIG_SECURED_MODE_IMAGE),) +KWB_REPLACE += CSK_INDEX +KWB_CFG_CSK_INDEX = $(CONFIG_SECURED_MODE_CSK_INDEX) + +KWB_REPLACE += SEC_BOOT_DEV +KWB_CFG_SEC_BOOT_DEV=$(patsubst "%",%, \ + $(if $(findstring BOOT_SPI_NOR_FLASH,$(CONFIG_SPL_BOOT_DEVICE)),0x34) \ + $(if $(findstring BOOT_SDIO_MMC_CARD,$(CONFIG_SPL_BOOT_DEVICE)),0x31) \ + ) + +KWB_REPLACE += SEC_FUSE_DUMP +KWB_CFG_SEC_FUSE_DUMP = a38x +endif + +$(src)/kwbimage.cfg: $(src)/kwbimage.cfg.in include/autoconf.mk \ + include/config/auto.conf + $(Q)sed -ne '$(foreach V,$(KWB_REPLACE),s/^#@$(V)/$(V) $(KWB_CFG_$(V))/;)p' \ + <$< >$(dir $<)$(@F) + +endif diff --git a/board/gdsys/a38x/controlcenterdc.c b/board/gdsys/a38x/controlcenterdc.c new file mode 100644 index 0000000000..f0efb53447 --- /dev/null +++ b/board/gdsys/a38x/controlcenterdc.c @@ -0,0 +1,279 @@ +/* + * Copyright (C) 2015 Stefan Roese <sr@denx.de> + * Copyright (C) 2016 Mario Six <mario.six@gdsys.cc> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <miiphy.h> +#include <tpm.h> +#include <asm/io.h> +#include <asm/arch/cpu.h> +#include <asm-generic/gpio.h> + +#include "../drivers/ddr/marvell/a38x/ddr3_a38x_topology.h" +#include "../arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h" + +#include "keyprogram.h" +#include "dt_helpers.h" +#include "hydra.h" +#include "ihs_phys.h" + +DECLARE_GLOBAL_DATA_PTR; + +#define ETH_PHY_CTRL_REG 0 +#define ETH_PHY_CTRL_POWER_DOWN_BIT 11 +#define ETH_PHY_CTRL_POWER_DOWN_MASK (1 << ETH_PHY_CTRL_POWER_DOWN_BIT) + +#define DB_GP_88F68XX_GPP_OUT_ENA_LOW 0x7fffffff +#define DB_GP_88F68XX_GPP_OUT_ENA_MID 0xffffefff + +#define DB_GP_88F68XX_GPP_OUT_VAL_LOW 0x0 +#define DB_GP_88F68XX_GPP_OUT_VAL_MID 0x00001000 +#define DB_GP_88F68XX_GPP_POL_LOW 0x0 +#define DB_GP_88F68XX_GPP_POL_MID 0x0 + +/* + * Define the DDR layout / topology here in the board file. This will + * be used by the DDR3 init code in the SPL U-Boot version to configure + * the DDR3 controller. + */ +static struct hws_topology_map ddr_topology_map = { + 0x1, /* active interfaces */ + /* cs_mask, mirror, dqs_swap, ck_swap X PUPs */ + { { { {0x1, 0, 0, 0}, + {0x1, 0, 0, 0}, + {0x1, 0, 0, 0}, + {0x1, 0, 0, 0}, + {0x1, 0, 0, 0} }, + SPEED_BIN_DDR_1600K, /* speed_bin */ + BUS_WIDTH_16, /* memory_width */ + MEM_4G, /* mem_size */ + DDR_FREQ_533, /* frequency */ + 0, 0, /* cas_l cas_wl */ + HWS_TEMP_LOW} }, /* temperature */ + 5, /* Num Of Bus Per Interface*/ + BUS_MASK_32BIT /* Busses mask */ +}; + +static struct serdes_map serdes_topology_map[] = { + {SGMII0, SERDES_SPEED_1_25_GBPS, SERDES_DEFAULT_MODE, 0, 0}, + {USB3_HOST0, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0}, + /* SATA tx polarity is inverted */ + {SATA1, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 1}, + {SGMII2, SERDES_SPEED_1_25_GBPS, SERDES_DEFAULT_MODE, 0, 0}, + {DEFAULT_SERDES, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0}, + {PEX2, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0} +}; + +int hws_board_topology_load(struct serdes_map **serdes_map_array, u8 *count) +{ + *serdes_map_array = serdes_topology_map; + *count = ARRAY_SIZE(serdes_topology_map); + return 0; +} + +void board_pex_config(void) +{ +#ifdef CONFIG_SPL_BUILD + uint k; + struct gpio_desc gpio = {}; + + if (!request_gpio_by_name(&gpio, "pca9698@22", 31, "fpga-program-gpio")) { + /* prepare FPGA reconfiguration */ + dm_gpio_set_dir_flags(&gpio, GPIOD_IS_OUT); + dm_gpio_set_value(&gpio, 0); + + /* give lunatic PCIe clock some time to stabilize */ + mdelay(500); + + /* start FPGA reconfiguration */ + dm_gpio_set_dir_flags(&gpio, GPIOD_IS_IN); + } + + /* wait for FPGA done */ + if (!request_gpio_by_name(&gpio, "pca9698@22", 19, "fpga-done-gpio")) { + for (k = 0; k < 20; ++k) { + if (dm_gpio_get_value(&gpio)) { + printf("FPGA done after %u rounds\n", k); + break; + } + mdelay(100); + } + } + + /* disable FPGA reset */ + if (!request_gpio_by_name(&gpio, "gpio@18100", 6, "cpu-to-fpga-reset")) { + dm_gpio_set_dir_flags(&gpio, GPIOD_IS_OUT); + dm_gpio_set_value(&gpio, 1); + } + + /* wait for FPGA ready */ + if (!request_gpio_by_name(&gpio, "pca9698@22", 27, "fpga-ready-gpio")) { + for (k = 0; k < 2; ++k) { + if (!dm_gpio_get_value(&gpio)) + break; + mdelay(100); + } + } +#endif +} + +struct hws_topology_map *ddr3_get_topology_map(void) +{ + return &ddr_topology_map; +} + +int board_early_init_f(void) +{ +#ifdef CONFIG_SPL_BUILD + /* Configure MPP */ + writel(0x00111111, MVEBU_MPP_BASE + 0x00); + writel(0x40040000, MVEBU_MPP_BASE + 0x04); + writel(0x00466444, MVEBU_MPP_BASE + 0x08); + writel(0x00043300, MVEBU_MPP_BASE + 0x0c); + writel(0x44400000, MVEBU_MPP_BASE + 0x10); + writel(0x20000334, MVEBU_MPP_BASE + 0x14); + writel(0x40000000, MVEBU_MPP_BASE + 0x18); + writel(0x00004444, MVEBU_MPP_BASE + 0x1c); + + /* Set GPP Out value */ + writel(DB_GP_88F68XX_GPP_OUT_VAL_LOW, MVEBU_GPIO0_BASE + 0x00); + writel(DB_GP_88F68XX_GPP_OUT_VAL_MID, MVEBU_GPIO1_BASE + 0x00); + + /* Set GPP Polarity */ + writel(DB_GP_88F68XX_GPP_POL_LOW, MVEBU_GPIO0_BASE + 0x0c); + writel(DB_GP_88F68XX_GPP_POL_MID, MVEBU_GPIO1_BASE + 0x0c); + + /* Set GPP Out Enable */ + writel(DB_GP_88F68XX_GPP_OUT_ENA_LOW, MVEBU_GPIO0_BASE + 0x04); + writel(DB_GP_88F68XX_GPP_OUT_ENA_MID, MVEBU_GPIO1_BASE + 0x04); +#endif + + return 0; +} + +int board_init(void) +{ + /* Address of boot parameters */ + gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; + + return 0; +} + +#ifndef CONFIG_SPL_BUILD +void init_host_phys(struct mii_dev *bus) +{ + uint k; + + for (k = 0; k < 2; ++k) { + struct phy_device *phydev; + + phydev = phy_find_by_mask(bus, 1 << k, + PHY_INTERFACE_MODE_SGMII); + + if (phydev) + phy_config(phydev); + } +} + +int ccdc_eth_init(void) +{ + uint k; + uint octo_phy_mask = 0; + int ret; + struct mii_dev *bus; + + /* Init SoC's phys */ + bus = miiphy_get_dev_by_name("ethernet@34000"); + + if (bus) + init_host_phys(bus); + + bus = miiphy_get_dev_by_name("ethernet@70000"); + + if (bus) + init_host_phys(bus); + + /* Init octo phys */ + octo_phy_mask = calculate_octo_phy_mask(); + + printf("IHS PHYS: %08x", octo_phy_mask); + + ret = init_octo_phys(octo_phy_mask); + + if (ret) + return ret; + + printf("\n"); + + if (!get_fpga()) { + puts("fpga was NULL\n"); + return 1; + } + + /* reset all FPGA-QSGMII instances */ + for (k = 0; k < 80; ++k) + writel(1 << 31, get_fpga()->qsgmii_port_state[k]); + + udelay(100); + + for (k = 0; k < 80; ++k) + writel(0, get_fpga()->qsgmii_port_state[k]); + return 0; +} + +#endif + +int board_late_init(void) +{ +#ifndef CONFIG_SPL_BUILD + hydra_initialize(); +#endif + return 0; +} + +int board_fix_fdt(void *rw_fdt_blob) +{ + struct udevice *bus = NULL; + uint k; + char name[64]; + int err; + + err = uclass_get_device_by_name(UCLASS_I2C, "i2c@11000", &bus); + + if (err) { + printf("Could not get I2C bus.\n"); + return err; + } + + for (k = 0x21; k <= 0x26; k++) { + snprintf(name, 64, + "/soc/internal-regs/i2c@11000/pca9698@%02x", k); + + if (!dm_i2c_simple_probe(bus, k)) + fdt_disable_by_ofname(rw_fdt_blob, name); + } + + return 0; +} + +int last_stage_init(void) +{ +#ifndef CONFIG_SPL_BUILD + ccdc_eth_init(); +#endif + if (tpm_init() || tpm_startup(TPM_ST_CLEAR) || + tpm_continue_self_test()) { + return 1; + } + + mdelay(37); + + flush_keys(); + load_and_run_keyprog(); + + return 0; +} diff --git a/board/gdsys/a38x/dt_helpers.c b/board/gdsys/a38x/dt_helpers.c new file mode 100644 index 0000000000..759d82a728 --- /dev/null +++ b/board/gdsys/a38x/dt_helpers.c @@ -0,0 +1,43 @@ +/* + * (C) Copyright 2016 + * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <i2c.h> +#include <fdt_support.h> +#include <asm-generic/gpio.h> +#include <dm.h> + +int fdt_disable_by_ofname(void *rw_fdt_blob, char *ofname) +{ + int offset = fdt_path_offset(rw_fdt_blob, ofname); + + return fdt_status_disabled(rw_fdt_blob, offset); +} + +bool dm_i2c_simple_probe(struct udevice *bus, uint chip_addr) +{ + struct udevice *dev; + + return !dm_i2c_probe(bus, chip_addr, DM_I2C_CHIP_RD_ADDRESS | + DM_I2C_CHIP_WR_ADDRESS, &dev); +} + +int request_gpio_by_name(struct gpio_desc *gpio, const char *gpio_dev_name, + uint offset, char *gpio_name) +{ + struct udevice *gpio_dev = NULL; + + if (uclass_get_device_by_name(UCLASS_GPIO, gpio_dev_name, &gpio_dev)) + return 1; + + gpio->dev = gpio_dev; + gpio->offset = offset; + gpio->flags = 0; + + return dm_gpio_request(gpio, gpio_name); +} + diff --git a/board/gdsys/a38x/dt_helpers.h b/board/gdsys/a38x/dt_helpers.h new file mode 100644 index 0000000000..1b95262c51 --- /dev/null +++ b/board/gdsys/a38x/dt_helpers.h @@ -0,0 +1,16 @@ +/* + * (C) Copyright 2016 + * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __DT_HELPERS_H +#define __DT_HELPERS_H + +int fdt_disable_by_ofname(void *rw_fdt_blob, char *ofname); +bool dm_i2c_simple_probe(struct udevice *bus, uint chip_addr); +int request_gpio_by_name(struct gpio_desc *gpio, const char *gpio_dev_name, + uint offset, char *gpio_name); + +#endif /* __DT_HELPERS_H */ diff --git a/board/gdsys/a38x/hre.c b/board/gdsys/a38x/hre.c new file mode 100644 index 0000000000..1689d44db6 --- /dev/null +++ b/board/gdsys/a38x/hre.c @@ -0,0 +1,516 @@ +/* + * (C) Copyright 2013 + * Reinhard Pfau, Guntermann & Drunck GmbH, reinhard.pfau@gdsys.cc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <malloc.h> +#include <fs.h> +#include <i2c.h> +#include <mmc.h> +#include <tpm.h> +#include <u-boot/sha1.h> +#include <asm/byteorder.h> +#include <asm/unaligned.h> +#include <pca9698.h> + +#include "hre.h" + +/* other constants */ +enum { + ESDHC_BOOT_IMAGE_SIG_OFS = 0x40, + ESDHC_BOOT_IMAGE_SIZE_OFS = 0x48, + ESDHC_BOOT_IMAGE_ADDR_OFS = 0x50, + ESDHC_BOOT_IMAGE_TARGET_OFS = 0x58, + ESDHC_BOOT_IMAGE_ENTRY_OFS = 0x60, +}; + +enum { + I2C_SOC_0 = 0, + I2C_SOC_1 = 1, +}; + +enum access_mode { + HREG_NONE = 0, + HREG_RD = 1, + HREG_WR = 2, + HREG_RDWR = 3, +}; + +/* register constants */ +enum { + FIX_HREG_DEVICE_ID_HASH = 0, + FIX_HREG_UNUSED1 = 1, + FIX_HREG_UNUSED2 = 2, + FIX_HREG_VENDOR = 3, + COUNT_FIX_HREGS +}; + +static struct h_reg pcr_hregs[24]; +static struct h_reg fix_hregs[COUNT_FIX_HREGS]; +static struct h_reg var_hregs[8]; + +/* hre opcodes */ +enum { + /* opcodes w/o data */ + HRE_NOP = 0x00, + HRE_SYNC = HRE_NOP, + HRE_CHECK0 = 0x01, + /* opcodes w/o data, w/ sync dst */ + /* opcodes w/ data */ + HRE_LOAD = 0x81, + /* opcodes w/data, w/sync dst */ + HRE_XOR = 0xC1, + HRE_AND = 0xC2, + HRE_OR = 0xC3, + HRE_EXTEND = 0xC4, + HRE_LOADKEY = 0xC5, +}; + +/* hre errors */ +enum { + HRE_E_OK = 0, + HRE_E_TPM_FAILURE, + HRE_E_INVALID_HREG, +}; + +static uint64_t device_id; +static uint64_t device_cl; +static uint64_t device_type; + +static uint32_t platform_key_handle; + +static uint32_t hre_tpm_err; +static int hre_err = HRE_E_OK; + +#define IS_PCR_HREG(spec) ((spec) & 0x20) +#define IS_FIX_HREG(spec) (((spec) & 0x38) == 0x08) +#define IS_VAR_HREG(spec) (((spec) & 0x38) == 0x10) +#define HREG_IDX(spec) ((spec) & (IS_PCR_HREG(spec) ? 0x1f : 0x7)) + +static const uint8_t vendor[] = "Guntermann & Drunck"; + +/** + * @brief get the size of a given (TPM) NV area + * @param index NV index of the area to get size for + * @param size pointer to the size + * @return 0 on success, != 0 on error + */ +static int get_tpm_nv_size(uint32_t index, uint32_t *size) +{ + uint32_t err; + uint8_t info[72]; + uint8_t *ptr; + uint16_t v16; + + err = tpm_get_capability(TPM_CAP_NV_INDEX, index, + info, sizeof(info)); + if (err) { + printf("tpm_get_capability(CAP_NV_INDEX, %08x) failed: %u\n", + index, err); + return 1; + } + + /* skip tag and nvIndex */ + ptr = info + 6; + /* skip 2 pcr info fields */ + v16 = get_unaligned_be16(ptr); + ptr += 2 + v16 + 1 + 20; + v16 = get_unaligned_be16(ptr); + ptr += 2 + v16 + 1 + 20; + /* skip permission and flags */ + ptr += 6 + 3; + + *size = get_unaligned_be32(ptr); + return 0; +} + +/** + * @brief search for a key by usage auth and pub key hash. + * @param auth usage auth of the key to search for + * @param pubkey_digest (SHA1) hash of the pub key structure of the key + * @param[out] handle the handle of the key iff found + * @return 0 if key was found in TPM; != 0 if not. + */ +static int find_key(const uint8_t auth[20], const uint8_t pubkey_digest[20], + uint32_t *handle) +{ + uint16_t key_count; + uint32_t key_handles[10]; + uint8_t buf[288]; + uint8_t *ptr; + uint32_t err; + uint8_t digest[20]; + size_t buf_len; + unsigned int i; + + /* fetch list of already loaded keys in the TPM */ + err = tpm_get_capability(TPM_CAP_HANDLE, TPM_RT_KEY, buf, sizeof(buf)); + if (err) + return -1; + key_count = get_unaligned_be16(buf); + ptr = buf + 2; + for (i = 0; i < key_count; ++i, ptr += 4) + key_handles[i] = get_unaligned_be32(ptr); + + /* now search a(/ the) key which we can access with the given auth */ + for (i = 0; i < key_count; ++i) { + buf_len = sizeof(buf); + err = tpm_get_pub_key_oiap(key_handles[i], auth, buf, &buf_len); + if (err && err != TPM_AUTHFAIL) + return -1; + if (err) + continue; + sha1_csum(buf, buf_len, digest); + if (!memcmp(digest, pubkey_digest, 20)) { + *handle = key_handles[i]; + return 0; + } + } + return 1; +} + +/** + * @brief read CCDM common data from TPM NV + * @return 0 if CCDM common data was found and read, !=0 if something failed. + */ +static int read_common_data(void) +{ + uint32_t size = 0; + uint32_t err; + uint8_t buf[256]; + sha1_context ctx; + + if (get_tpm_nv_size(NV_COMMON_DATA_INDEX, &size) || + size < NV_COMMON_DATA_MIN_SIZE) + return 1; + err = tpm_nv_read_value(NV_COMMON_DATA_INDEX, + buf, min(sizeof(buf), size)); + if (err) { + printf("tpm_nv_read_value() failed: %u\n", err); + return 1; + } + + device_id = get_unaligned_be64(buf); + device_cl = get_unaligned_be64(buf + 8); + device_type = get_unaligned_be64(buf + 16); + + sha1_starts(&ctx); + sha1_update(&ctx, buf, 24); + sha1_finish(&ctx, fix_hregs[FIX_HREG_DEVICE_ID_HASH].digest); + fix_hregs[FIX_HREG_DEVICE_ID_HASH].valid = true; + + platform_key_handle = get_unaligned_be32(buf + 24); + + return 0; +} + +/** + * @brief get pointer to hash register by specification + * @param spec specification of a hash register + * @return pointer to hash register or NULL if @a spec does not qualify a + * valid hash register; NULL else. + */ +static struct h_reg *get_hreg(uint8_t spec) +{ + uint8_t idx; + + idx = HREG_IDX(spec); + if (IS_FIX_HREG(spec)) { + if (idx < ARRAY_SIZE(fix_hregs)) + return fix_hregs + idx; + hre_err = HRE_E_INVALID_HREG; + } else if (IS_PCR_HREG(spec)) { + if (idx < ARRAY_SIZE(pcr_hregs)) + return pcr_hregs + idx; + hre_err = HRE_E_INVALID_HREG; + } else if (IS_VAR_HREG(spec)) { + if (idx < ARRAY_SIZE(var_hregs)) + return var_hregs + idx; + hre_err = HRE_E_INVALID_HREG; + } + return NULL; +} + +/** + * @brief get pointer of a hash register by specification and usage. + * @param spec specification of a hash register + * @param mode access mode (read or write or read/write) + * @return pointer to hash register if found and valid; NULL else. + * + * This func uses @a get_reg() to determine the hash register for a given spec. + * If a register is found it is validated according to the desired access mode. + * The value of automatic registers (PCR register and fixed registers) is + * loaded or computed on read access. + */ +static struct h_reg *access_hreg(uint8_t spec, enum access_mode mode) +{ + struct h_reg *result; + + result = get_hreg(spec); + if (!result) + return NULL; + + if (mode & HREG_WR) { + if (IS_FIX_HREG(spec)) { + hre_err = HRE_E_INVALID_HREG; + return NULL; + } + } + if (mode & HREG_RD) { + if (!result->valid) { + if (IS_PCR_HREG(spec)) { + hre_tpm_err = tpm_pcr_read(HREG_IDX(spec), + result->digest, 20); + result->valid = (hre_tpm_err == TPM_SUCCESS); + } else if (IS_FIX_HREG(spec)) { + switch (HREG_IDX(spec)) { + case FIX_HREG_DEVICE_ID_HASH: + read_common_data(); + break; + case FIX_HREG_VENDOR: + memcpy(result->digest, vendor, 20); + result->valid = true; + break; + } + } else { + result->valid = true; + } + } + if (!result->valid) { + hre_err = HRE_E_INVALID_HREG; + return NULL; + } + } + + return result; +} + +static void *compute_and(void *_dst, const void *_src, size_t n) +{ + uint8_t *dst = _dst; + const uint8_t *src = _src; + size_t i; + + for (i = n; i-- > 0; ) + *dst++ &= *src++; + + return _dst; +} + +static void *compute_or(void *_dst, const void *_src, size_t n) +{ + uint8_t *dst = _dst; + const uint8_t *src = _src; + size_t i; + + for (i = n; i-- > 0; ) + *dst++ |= *src++; + + return _dst; +} + +static void *compute_xor(void *_dst, const void *_src, size_t n) +{ + uint8_t *dst = _dst; + const uint8_t *src = _src; + size_t i; + + for (i = n; i-- > 0; ) + *dst++ ^= *src++; + + return _dst; +} + +static void *compute_extend(void *_dst, const void *_src, size_t n) +{ + uint8_t digest[20]; + sha1_context ctx; + + sha1_starts(&ctx); + sha1_update(&ctx, _dst, n); + sha1_update(&ctx, _src, n); + sha1_finish(&ctx, digest); + memcpy(_dst, digest, min(n, sizeof(digest))); + + return _dst; +} + +static int hre_op_loadkey(struct h_reg *src_reg, struct h_reg *dst_reg, + const void *key, size_t key_size) +{ + uint32_t parent_handle; + uint32_t key_handle; + + if (!src_reg || !dst_reg || !src_reg->valid || !dst_reg->valid) + return -1; + if (find_key(src_reg->digest, dst_reg->digest, &parent_handle)) + return -1; + hre_tpm_err = tpm_load_key2_oiap(parent_handle, key, key_size, + src_reg->digest, &key_handle); + if (hre_tpm_err) { + hre_err = HRE_E_TPM_FAILURE; + return -1; + } + + return 0; +} + +/** + * @brief executes the next opcode on the hash register engine. + * @param[in,out] ip pointer to the opcode (instruction pointer) + * @param[in,out] code_size (remaining) size of the code + * @return new instruction pointer on success, NULL on error. + */ +static const uint8_t *hre_execute_op(const uint8_t **ip, size_t *code_size) +{ + bool dst_modified = false; + uint32_t ins; + uint8_t opcode; + uint8_t src_spec; + uint8_t dst_spec; + uint16_t data_size; + struct h_reg *src_reg, *dst_reg; + uint8_t buf[20]; + const uint8_t *src_buf, *data; + uint8_t *ptr; + int i; + void * (*bin_func)(void *, const void *, size_t); + + if (*code_size < 4) + return NULL; + + ins = get_unaligned_be32(*ip); + opcode = **ip; + data = *ip + 4; + src_spec = (ins >> 18) & 0x3f; + dst_spec = (ins >> 12) & 0x3f; + data_size = (ins & 0x7ff); + + debug("HRE: ins=%08x (op=%02x, s=%02x, d=%02x, L=%d)\n", ins, + opcode, src_spec, dst_spec, data_size); + + if ((opcode & 0x80) && (data_size + 4) > *code_size) + return NULL; + + src_reg = access_hreg(src_spec, HREG_RD); + if (hre_err || hre_tpm_err) + return NULL; + dst_reg = access_hreg(dst_spec, (opcode & 0x40) ? HREG_RDWR : HREG_WR); + if (hre_err || hre_tpm_err) + return NULL; + + switch (opcode) { + case HRE_NOP: + goto end; + case HRE_CHECK0: + if (src_reg) { + for (i = 0; i < 20; ++i) { + if (src_reg->digest[i]) + return NULL; + } + } + break; + case HRE_LOAD: + bin_func = memcpy; + goto do_bin_func; + case HRE_XOR: + bin_func = compute_xor; + goto do_bin_func; + case HRE_AND: + bin_func = compute_and; + goto do_bin_func; + case HRE_OR: + bin_func = compute_or; + goto do_bin_func; + case HRE_EXTEND: + bin_func = compute_extend; +do_bin_func: + if (!dst_reg) + return NULL; + if (src_reg) { + src_buf = src_reg->digest; + } else { + if (!data_size) { + memset(buf, 0, 20); + src_buf = buf; + } else if (data_size == 1) { + memset(buf, *data, 20); + src_buf = buf; + } else if (data_size >= 20) { + src_buf = data; + } else { + src_buf = buf; + for (ptr = (uint8_t *)src_buf, i = 20; i > 0; + i -= data_size, ptr += data_size) + memcpy(ptr, data, + min_t(size_t, i, data_size)); + } + } + bin_func(dst_reg->digest, src_buf, 20); + dst_reg->valid = true; + dst_modified = true; + break; + case HRE_LOADKEY: + if (hre_op_loadkey(src_reg, dst_reg, data, data_size)) + return NULL; + break; + default: + return NULL; + } + + if (dst_reg && dst_modified && IS_PCR_HREG(dst_spec)) { + hre_tpm_err = tpm_extend(HREG_IDX(dst_spec), dst_reg->digest, + dst_reg->digest); + if (hre_tpm_err) { + hre_err = HRE_E_TPM_FAILURE; + return NULL; + } + } +end: + *ip += 4; + *code_size -= 4; + if (opcode & 0x80) { + *ip += data_size; + *code_size -= data_size; + } + + return *ip; +} + +/** + * @brief runs a program on the hash register engine. + * @param code pointer to the (HRE) code. + * @param code_size size of the code (in bytes). + * @return 0 on success, != 0 on failure. + */ +int hre_run_program(const uint8_t *code, size_t code_size) +{ + size_t code_left; + const uint8_t *ip = code; + + code_left = code_size; + hre_tpm_err = 0; + hre_err = HRE_E_OK; + while (code_left > 0) + if (!hre_execute_op(&ip, &code_left)) + return -1; + + return hre_err; +} + +int hre_verify_program(struct key_program *prg) +{ + uint32_t crc; + + crc = crc32(0, prg->code, prg->code_size); + + if (crc != prg->code_crc) { + printf("HRC crc mismatch: %08x != %08x\n", + crc, prg->code_crc); + return 1; + } + return 0; +} diff --git a/board/gdsys/a38x/hre.h b/board/gdsys/a38x/hre.h new file mode 100644 index 0000000000..84ce2794fa --- /dev/null +++ b/board/gdsys/a38x/hre.h @@ -0,0 +1,38 @@ +/* + * (C) Copyright 2013 + * Reinhard Pfau, Guntermann & Drunck GmbH, reinhard.pfau@gdsys.cc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __HRE_H +#define __HRE_H + +struct key_program { + uint32_t magic; + uint32_t code_crc; + uint32_t code_size; + uint8_t code[]; +}; + +struct h_reg { + bool valid; + uint8_t digest[20]; +}; + +/* CCDM specific contants */ +enum { + /* NV indices */ + NV_COMMON_DATA_INDEX = 0x40000001, + /* magics for key blob chains */ + MAGIC_KEY_PROGRAM = 0x68726500, + MAGIC_HMAC = 0x68616300, + MAGIC_END_OF_CHAIN = 0x00000000, + /* sizes */ + NV_COMMON_DATA_MIN_SIZE = 3 * sizeof(uint64_t) + 2 * sizeof(uint16_t), +}; + +int hre_verify_program(struct key_program *prg); +int hre_run_program(const uint8_t *code, size_t code_size); + +#endif /* __HRE_H */ diff --git a/board/gdsys/a38x/hydra.c b/board/gdsys/a38x/hydra.c new file mode 100644 index 0000000000..fa50ad2830 --- /dev/null +++ b/board/gdsys/a38x/hydra.c @@ -0,0 +1,138 @@ +#include <common.h> +#include <console.h> /* ctrlc */ +#include <asm/io.h> + +#include "hydra.h" + +enum { + HWVER_100 = 0, + HWVER_110 = 1, + HWVER_120 = 2, +}; + +static struct pci_device_id hydra_supported[] = { + { 0x6d5e, 0xcdc1 }, + {} +}; + +static struct ihs_fpga *fpga; + +struct ihs_fpga *get_fpga(void) +{ + return fpga; +} + +void print_hydra_version(uint index) +{ + u32 versions = readl(&fpga->versions); + u32 fpga_version = readl(&fpga->fpga_version); + + uint hardware_version = versions & 0xf; + + printf("FPGA%u: mapped to %p\n ", index, fpga); + + switch (hardware_version) { + case HWVER_100: + printf("HW-Ver 1.00\n"); + break; + + case HWVER_110: + printf("HW-Ver 1.10\n"); + break; + + case HWVER_120: + printf("HW-Ver 1.20\n"); + break; + + default: + printf("HW-Ver %d(not supported)\n", + hardware_version); + break; + } + + printf(" FPGA V %d.%02d\n", + fpga_version / 100, fpga_version % 100); +} + +void hydra_initialize(void) +{ + uint i; + pci_dev_t devno; + + /* Find and probe all the matching PCI devices */ + for (i = 0; (devno = pci_find_devices(hydra_supported, i)) >= 0; i++) { + u32 val; + + /* Try to enable I/O accesses and bus-mastering */ + val = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER; + pci_write_config_dword(devno, PCI_COMMAND, val); + + /* Make sure it worked */ + pci_read_config_dword(devno, PCI_COMMAND, &val); + if (!(val & PCI_COMMAND_MEMORY)) { + puts("Can't enable I/O memory\n"); + continue; + } + if (!(val & PCI_COMMAND_MASTER)) { + puts("Can't enable bus-mastering\n"); + continue; + } + + /* read FPGA details */ + fpga = pci_map_bar(devno, PCI_BASE_ADDRESS_0, + PCI_REGION_MEM); + + print_hydra_version(i); + } +} + +#define REFL_PATTERN (0xdededede) +#define REFL_PATTERN_INV (~REFL_PATTERN) + +int do_hydrate(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + uint k = 0; + void __iomem *pcie2_base = (void __iomem *)(MVEBU_REG_PCIE_BASE + + 0x4000); + + if (!fpga) + return -1; + + while (1) { + u32 res; + + writel(REFL_PATTERN, &fpga->reflection_low); + res = readl(&fpga->reflection_low); + if (res != REFL_PATTERN_INV) + printf("round %u: read %08x, expected %08x\n", + k, res, REFL_PATTERN_INV); + writel(REFL_PATTERN_INV, &fpga->reflection_low); + res = readl(&fpga->reflection_low); + if (res != REFL_PATTERN) + printf("round %u: read %08x, expected %08x\n", + k, res, REFL_PATTERN); + + res = readl(pcie2_base + 0x118) & 0x1f; + if (res) + printf("FrstErrPtr %u\n", res); + res = readl(pcie2_base + 0x104); + if (res) { + printf("Uncorrectable Error Status 0x%08x\n", res); + writel(res, pcie2_base + 0x104); + } + + if (!(++k % 10000)) + printf("round %u\n", k); + + if (ctrlc()) + break; + } + + return 0; +} + +U_BOOT_CMD( + hydrate, 1, 0, do_hydrate, + "hydra reflection test", + "hydra reflection test" +); diff --git a/board/gdsys/a38x/hydra.h b/board/gdsys/a38x/hydra.h new file mode 100644 index 0000000000..26562a560a --- /dev/null +++ b/board/gdsys/a38x/hydra.h @@ -0,0 +1,14 @@ +struct ihs_fpga { + u32 reflection_low; /* 0x0000 */ + u32 versions; /* 0x0004 */ + u32 fpga_version; /* 0x0008 */ + u32 fpga_features; /* 0x000c */ + u32 reserved0[4]; /* 0x0010 */ + u32 control; /* 0x0020 */ + u32 reserved1[375]; /* 0x0024 */ + u32 qsgmii_port_state[80]; /* 0x0600 */ +}; + +void print_hydra_version(uint index); +void hydra_initialize(void); +struct ihs_fpga *get_fpga(void); diff --git a/board/gdsys/a38x/ihs_phys.c b/board/gdsys/a38x/ihs_phys.c new file mode 100644 index 0000000000..494de18f86 --- /dev/null +++ b/board/gdsys/a38x/ihs_phys.c @@ -0,0 +1,355 @@ +#include <common.h> +#include <dm.h> +#include <miiphy.h> +#include <asm-generic/gpio.h> + +#include "ihs_phys.h" +#include "dt_helpers.h" + +enum { + PORTTYPE_MAIN_CAT, + PORTTYPE_TOP_CAT, + PORTTYPE_16C_16F, + PORTTYPE_UNKNOWN +}; + +static struct porttype { + bool phy_invert_in_pol; + bool phy_invert_out_pol; +} porttypes[] = { + { true, false }, + { false, true }, + { false, false }, +}; + +static void ihs_phy_config(struct phy_device *phydev, bool qinpn, bool qoutpn) +{ + u16 reg; + + phy_config(phydev); + + /* enable QSGMII autonegotiation with flow control */ + phy_write(phydev, MDIO_DEVAD_NONE, 22, 0x0004); + reg = phy_read(phydev, MDIO_DEVAD_NONE, 16); + reg |= (3 << 6); + phy_write(phydev, MDIO_DEVAD_NONE, 16, reg); + + /* + * invert QSGMII Q_INP/N and Q_OUTP/N if required + * and perform global reset + */ + reg = phy_read(phydev, MDIO_DEVAD_NONE, 26); + if (qinpn) + reg |= (1 << 13); + if (qoutpn) + reg |= (1 << 12); + reg |= (1 << 15); + phy_write(phydev, MDIO_DEVAD_NONE, 26, reg); + + /* advertise 1000BASE-T full-duplex only */ + phy_write(phydev, MDIO_DEVAD_NONE, 22, 0x0000); + reg = phy_read(phydev, MDIO_DEVAD_NONE, 4); + reg &= ~0x1e0; + phy_write(phydev, MDIO_DEVAD_NONE, 4, reg); + reg = phy_read(phydev, MDIO_DEVAD_NONE, 9); + reg = (reg & ~0x300) | 0x200; + phy_write(phydev, MDIO_DEVAD_NONE, 9, reg); + + /* copper power up */ + reg = phy_read(phydev, MDIO_DEVAD_NONE, 16); + reg &= ~0x0004; + phy_write(phydev, MDIO_DEVAD_NONE, 16, reg); +} + +uint calculate_octo_phy_mask(void) +{ + uint k; + uint octo_phy_mask = 0; + struct gpio_desc gpio = {}; + char gpio_name[64]; + static const char * const dev_name[] = {"pca9698@23", "pca9698@21", + "pca9698@24", "pca9698@25", + "pca9698@26"}; + + /* mark all octo phys that should be present */ + for (k = 0; k < 5; ++k) { + snprintf(gpio_name, 64, "cat-gpio-%u", k); + + if (request_gpio_by_name(&gpio, dev_name[k], 0x20, gpio_name)) + continue; + + /* check CAT flag */ + if (dm_gpio_get_value(&gpio)) + octo_phy_mask |= (1 << (k * 2)); + else + /* If CAT == 0, there's no second octo phy -> skip */ + continue; + + snprintf(gpio_name, 64, "second-octo-gpio-%u", k); + + if (request_gpio_by_name(&gpio, dev_name[k], 0x27, gpio_name)) { + /* default: second octo phy is present */ + octo_phy_mask |= (1 << (k * 2 + 1)); + continue; + } + + if (dm_gpio_get_value(&gpio) == 0) + octo_phy_mask |= (1 << (k * 2 + 1)); + } + + return octo_phy_mask; +} + +int register_miiphy_bus(uint k, struct mii_dev **bus) +{ + int retval; + struct mii_dev *mdiodev = mdio_alloc(); + char *name = bb_miiphy_buses[k].name; + + if (!mdiodev) + return -ENOMEM; + strncpy(mdiodev->name, + name, + MDIO_NAME_LEN); + mdiodev->read = bb_miiphy_read; + mdiodev->write = bb_miiphy_write; + + retval = mdio_register(mdiodev); + if (retval < 0) + return retval; + *bus = miiphy_get_dev_by_name(name); + + return 0; +} + +struct porttype *get_porttype(uint octo_phy_mask, uint k) +{ + uint octo_index = k * 4; + + if (!k) { + if (octo_phy_mask & 0x01) + return &porttypes[PORTTYPE_MAIN_CAT]; + else if (!(octo_phy_mask & 0x03)) + return &porttypes[PORTTYPE_16C_16F]; + } else { + if (octo_phy_mask & (1 << octo_index)) + return &porttypes[PORTTYPE_TOP_CAT]; + } + + return NULL; +} + +int init_single_phy(struct porttype *porttype, struct mii_dev *bus, + uint bus_idx, uint m, uint phy_idx) +{ + struct phy_device *phydev = phy_find_by_mask( + bus, 1 << (m * 8 + phy_idx), + PHY_INTERFACE_MODE_MII); + + printf(" %u", bus_idx * 32 + m * 8 + phy_idx); + + if (!phydev) + puts("!"); + else + ihs_phy_config(phydev, porttype->phy_invert_in_pol, + porttype->phy_invert_out_pol); + + return 0; +} + +int init_octo_phys(uint octo_phy_mask) +{ + uint bus_idx; + + /* there are up to four octo-phys on each mdio bus */ + for (bus_idx = 0; bus_idx < bb_miiphy_buses_num; ++bus_idx) { + uint m; + uint octo_index = bus_idx * 4; + struct mii_dev *bus = NULL; + struct porttype *porttype = NULL; + int ret; + + porttype = get_porttype(octo_phy_mask, bus_idx); + + if (!porttype) + continue; + + for (m = 0; m < 4; ++m) { + uint phy_idx; + + /** + * Register a bus device if there is at least one phy + * on the current bus + */ + if (!m && octo_phy_mask & (0xf << octo_index)) { + ret = register_miiphy_bus(bus_idx, &bus); + if (ret) + return ret; + } + + if (!(octo_phy_mask & BIT(octo_index + m))) + continue; + + for (phy_idx = 0; phy_idx < 8; ++phy_idx) + init_single_phy(porttype, bus, bus_idx, m, + phy_idx); + } + } + + return 0; +} + +/* + * MII GPIO bitbang implementation + * MDC MDIO bus + * 13 14 PHY1-4 + * 25 45 PHY5-8 + * 46 24 PHY9-10 + */ + +struct gpio_mii { + int index; + struct gpio_desc mdc_gpio; + struct gpio_desc mdio_gpio; + int mdc_num; + int mdio_num; + int mdio_value; +} gpio_mii_set[] = { + { 0, {}, {}, 13, 14, 1 }, + { 1, {}, {}, 25, 45, 1 }, + { 2, {}, {}, 46, 24, 1 }, +}; + +static int mii_mdio_init(struct bb_miiphy_bus *bus) +{ + struct gpio_mii *gpio_mii = bus->priv; + char name[32] = {}; + struct udevice *gpio_dev1 = NULL; + struct udevice *gpio_dev2 = NULL; + + if (uclass_get_device_by_name(UCLASS_GPIO, "gpio@18100", &gpio_dev1) || + uclass_get_device_by_name(UCLASS_GPIO, "gpio@18140", &gpio_dev2)) { + printf("Could not get GPIO device.\n"); + return 1; + } + + if (gpio_mii->mdc_num > 31) { + gpio_mii->mdc_gpio.dev = gpio_dev2; + gpio_mii->mdc_gpio.offset = gpio_mii->mdc_num - 32; + } else { + gpio_mii->mdc_gpio.dev = gpio_dev1; + gpio_mii->mdc_gpio.offset = gpio_mii->mdc_num; + } + gpio_mii->mdc_gpio.flags = 0; + snprintf(name, 32, "bb_miiphy_bus-%d-mdc", gpio_mii->index); + dm_gpio_request(&gpio_mii->mdc_gpio, name); + + if (gpio_mii->mdio_num > 31) { + gpio_mii->mdio_gpio.dev = gpio_dev2; + gpio_mii->mdio_gpio.offset = gpio_mii->mdio_num - 32; + } else { + gpio_mii->mdio_gpio.dev = gpio_dev1; + gpio_mii->mdio_gpio.offset = gpio_mii->mdio_num; + } + gpio_mii->mdio_gpio.flags = 0; + snprintf(name, 32, "bb_miiphy_bus-%d-mdio", gpio_mii->index); + dm_gpio_request(&gpio_mii->mdio_gpio, name); + + dm_gpio_set_dir_flags(&gpio_mii->mdc_gpio, GPIOD_IS_OUT); + dm_gpio_set_value(&gpio_mii->mdc_gpio, 1); + + return 0; +} + +static int mii_mdio_active(struct bb_miiphy_bus *bus) +{ + struct gpio_mii *gpio_mii = bus->priv; + + dm_gpio_set_value(&gpio_mii->mdc_gpio, gpio_mii->mdio_value); + + return 0; +} + +static int mii_mdio_tristate(struct bb_miiphy_bus *bus) +{ + struct gpio_mii *gpio_mii = bus->priv; + + dm_gpio_set_dir_flags(&gpio_mii->mdio_gpio, GPIOD_IS_IN); + + return 0; +} + +static int mii_set_mdio(struct bb_miiphy_bus *bus, int v) +{ + struct gpio_mii *gpio_mii = bus->priv; + + dm_gpio_set_dir_flags(&gpio_mii->mdio_gpio, GPIOD_IS_OUT); + dm_gpio_set_value(&gpio_mii->mdio_gpio, v); + gpio_mii->mdio_value = v; + + return 0; +} + +static int mii_get_mdio(struct bb_miiphy_bus *bus, int *v) +{ + struct gpio_mii *gpio_mii = bus->priv; + + dm_gpio_set_dir_flags(&gpio_mii->mdio_gpio, GPIOD_IS_IN); + *v = (dm_gpio_get_value(&gpio_mii->mdio_gpio)); + + return 0; +} + +static int mii_set_mdc(struct bb_miiphy_bus *bus, int v) +{ + struct gpio_mii *gpio_mii = bus->priv; + + dm_gpio_set_value(&gpio_mii->mdc_gpio, v); + + return 0; +} + +static int mii_delay(struct bb_miiphy_bus *bus) +{ + udelay(1); + + return 0; +} + +struct bb_miiphy_bus bb_miiphy_buses[] = { + { + .name = "ihs0", + .init = mii_mdio_init, + .mdio_active = mii_mdio_active, + .mdio_tristate = mii_mdio_tristate, + .set_mdio = mii_set_mdio, + .get_mdio = mii_get_mdio, + .set_mdc = mii_set_mdc, + .delay = mii_delay, + .priv = &gpio_mii_set[0], + }, + { + .name = "ihs1", + .init = mii_mdio_init, + .mdio_active = mii_mdio_active, + .mdio_tristate = mii_mdio_tristate, + .set_mdio = mii_set_mdio, + .get_mdio = mii_get_mdio, + .set_mdc = mii_set_mdc, + .delay = mii_delay, + .priv = &gpio_mii_set[1], + }, + { + .name = "ihs2", + .init = mii_mdio_init, + .mdio_active = mii_mdio_active, + .mdio_tristate = mii_mdio_tristate, + .set_mdio = mii_set_mdio, + .get_mdio = mii_get_mdio, + .set_mdc = mii_set_mdc, + .delay = mii_delay, + .priv = &gpio_mii_set[2], + }, +}; + +int bb_miiphy_buses_num = ARRAY_SIZE(bb_miiphy_buses); diff --git a/board/gdsys/a38x/ihs_phys.h b/board/gdsys/a38x/ihs_phys.h new file mode 100644 index 0000000000..c4bec4d46c --- /dev/null +++ b/board/gdsys/a38x/ihs_phys.h @@ -0,0 +1,2 @@ +uint calculate_octo_phy_mask(void); +int init_octo_phys(uint octo_phy_mask); diff --git a/board/gdsys/a38x/keyprogram.c b/board/gdsys/a38x/keyprogram.c new file mode 100644 index 0000000000..a4a6f1cca5 --- /dev/null +++ b/board/gdsys/a38x/keyprogram.c @@ -0,0 +1,158 @@ +/* + * (C) Copyright 2016 + * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <tpm.h> +#include <malloc.h> +#include <linux/ctype.h> +#include <asm/unaligned.h> + +#include "hre.h" + +int flush_keys(void) +{ + u16 key_count; + u8 buf[288]; + u8 *ptr; + u32 err; + uint i; + + /* fetch list of already loaded keys in the TPM */ + err = tpm_get_capability(TPM_CAP_HANDLE, TPM_RT_KEY, buf, sizeof(buf)); + if (err) + return -1; + key_count = get_unaligned_be16(buf); + ptr = buf + 2; + for (i = 0; i < key_count; ++i, ptr += 4) { + err = tpm_flush_specific(get_unaligned_be32(ptr), TPM_RT_KEY); + if (err && err != TPM_KEY_OWNER_CONTROL) + return err; + } + + return 0; +} + +int decode_hexstr(char *hexstr, u8 **result) +{ + int len = strlen(hexstr); + int bytes = len / 2; + int i; + u8 acc = 0; + + if (len % 2 == 1) + return 1; + + *result = (u8 *)malloc(bytes); + + for (i = 0; i < len; i++) { + char cur = tolower(hexstr[i]); + u8 val; + + if ((cur >= 'a' && cur <= 'f') || (cur >= '0' && cur <= '9')) { + val = cur - (cur > '9' ? 87 : 48); + + if (i % 2 == 0) + acc = 16 * val; + else + (*result)[i / 2] = acc + val; + } else { + free(*result); + return 1; + } + } + + return 0; +} + +int extract_subprogram(u8 **progdata, u32 expected_magic, + struct key_program **result) +{ + struct key_program *prog = *result; + u32 magic, code_crc, code_size; + + magic = get_unaligned_be32(*progdata); + code_crc = get_unaligned_be32(*progdata + 4); + code_size = get_unaligned_be32(*progdata + 8); + + *progdata += 12; + + if (magic != expected_magic) + return -1; + + *result = malloc(sizeof(struct key_program) + code_size); + + if (!*result) + return -1; + + prog->magic = magic; + prog->code_crc = code_crc; + prog->code_size = code_size; + memcpy(prog->code, *progdata, code_size); + + *progdata += code_size; + + if (hre_verify_program(prog)) { + free(prog); + return -1; + } + + return 0; +} + +struct key_program *parse_and_check_keyprog(u8 *progdata) +{ + struct key_program *result = NULL, *hmac = NULL; + + /* Part 1: Load key program */ + + if (extract_subprogram(&progdata, MAGIC_KEY_PROGRAM, &result)) + return NULL; + + /* Part 2: Load hmac program */ + + if (extract_subprogram(&progdata, MAGIC_HMAC, &hmac)) + return NULL; + + free(hmac); + + return result; +} + +int load_and_run_keyprog(void) +{ + char *cmd = NULL; + u8 *binprog = NULL; + char *hexprog; + struct key_program *prog; + + cmd = getenv("loadkeyprogram"); + + if (!cmd || run_command(cmd, 0)) + return 1; + + hexprog = getenv("keyprogram"); + + if (decode_hexstr(hexprog, &binprog)) + return 1; + + prog = parse_and_check_keyprog(binprog); + free(binprog); + + if (!prog) + return 1; + + if (hre_run_program(prog->code, prog->code_size)) { + free(prog); + return 1; + } + + printf("\nSD code ran successfully\n"); + + free(prog); + + return 0; +} diff --git a/board/gdsys/a38x/keyprogram.h b/board/gdsys/a38x/keyprogram.h new file mode 100644 index 0000000000..a5ea7d3137 --- /dev/null +++ b/board/gdsys/a38x/keyprogram.h @@ -0,0 +1,14 @@ +/* + * (C) Copyright 2016 + * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __KEYPROGRAM_H +#define __KEYPROGRAM_H + +int load_and_run_keyprog(void); +int flush_keys(void); + +#endif /* __KEYPROGRAM_H */ diff --git a/board/gdsys/a38x/kwbimage.cfg.in b/board/gdsys/a38x/kwbimage.cfg.in new file mode 100644 index 0000000000..72e67d75c3 --- /dev/null +++ b/board/gdsys/a38x/kwbimage.cfg.in @@ -0,0 +1,12 @@ +# +# Copyright (C) 2014 Stefan Roese <sr@denx.de> +# + +# Armada 38x uses version 1 image format +VERSION 1 + +# Boot Media configurations +#@BOOT_FROM + +# Binary Header (bin_hdr) with DDR3 training code +BINARY spl/u-boot-spl.bin 0000005b 00000068 diff --git a/board/gdsys/a38x/spl.c b/board/gdsys/a38x/spl.c new file mode 100644 index 0000000000..2d05a9c98a --- /dev/null +++ b/board/gdsys/a38x/spl.c @@ -0,0 +1,21 @@ +/* + * (C) Copyright 2016 + * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <config.h> +#include <asm/arch/cpu.h> + +void spl_board_init(void) +{ +#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH + u32 *bootrom_save = (u32 *)CONFIG_SPL_BOOTROM_SAVE; + u32 *regs = (u32 *)(*bootrom_save); + + printf("Returning to BootROM (return address %08x)...\n", regs[13]); + return_to_bootrom(); +#endif +} diff --git a/board/gdsys/mpc8308/sdram.c b/board/gdsys/mpc8308/sdram.c index 0fce8cfbab..5d2ec89b8c 100644 --- a/board/gdsys/mpc8308/sdram.c +++ b/board/gdsys/mpc8308/sdram.c @@ -66,17 +66,19 @@ static long fixed_sdram(void) return get_ram_size(CONFIG_SYS_DDR_SDRAM_BASE, msize); } -phys_size_t initdram(int board_type) +int dram_init(void) { immap_t *im = (immap_t *)CONFIG_SYS_IMMR; u32 msize; if ((in_be32(&im->sysconf.immrbar) & IMMRBAR_BASE_ADDR) != (u32)im) - return -1; + return -ENXIO; /* DDR SDRAM */ msize = fixed_sdram(); /* return total bus SDRAM size(bytes) -- DDR */ - return msize; + gd->ram_size = msize; + + return 0; } diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c index 2fc1144cda..0acf655c0e 100644 --- a/board/ge/bx50v3/bx50v3.c +++ b/board/ge/bx50v3/bx50v3.c @@ -103,8 +103,9 @@ static void setup_iomux_enet(void) /* Reset AR8033 PHY */ gpio_direction_output(IMX_GPIO_NR(1, 28), 0); - udelay(500); + mdelay(10); gpio_set_value(IMX_GPIO_NR(1, 28), 1); + mdelay(1); } static iomux_v3_cfg_t const usdhc2_pads[] = { @@ -306,7 +307,8 @@ static int mx6_rgmii_rework(struct phy_device *phydev) /* set debug port address: SerDes Test and System Mode Control */ phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); /* enable rgmii tx clock delay */ - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); + /* set the reserved bits to avoid board specific voltage peak issue*/ + phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x3D47); return 0; } diff --git a/board/hisilicon/hikey/hikey.c b/board/hisilicon/hikey/hikey.c index df3b5e717a..0f0eb3acb8 100644 --- a/board/hisilicon/hikey/hikey.c +++ b/board/hisilicon/hikey/hikey.c @@ -410,7 +410,7 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { /* * Reserve regions below from DT memory node (which gets generated @@ -442,6 +442,8 @@ void dram_init_banksize(void) gd->bd->bi_dram[5].start = 0x22000000; gd->bd->bi_dram[5].size = 0x1c000000; + + return 0; } void reset_cpu(ulong addr) diff --git a/board/ids/ids8313/ids8313.c b/board/ids/ids8313/ids8313.c index e7838dcd2a..4433e8c77e 100644 --- a/board/ids/ids8313/ids8313.c +++ b/board/ids/ids8313/ids8313.c @@ -119,14 +119,14 @@ static int setup_sdram(void) return msize; } -phys_size_t initdram(int board_type) +int dram_init(void) { immap_t *im = (immap_t *)CONFIG_SYS_IMMR; fsl_lbc_t *lbc = &im->im_lbc; u32 msize = 0; if ((in_be32(&im->sysconf.immrbar) & IMMRBAR_BASE_ADDR) != (u32)im) - return -1; + return -ENXIO; msize = setup_sdram(); @@ -134,7 +134,9 @@ phys_size_t initdram(int board_type) out_be32(&lbc->mrtpr, CONFIG_SYS_LBC_MRTPR); sync(); - return msize; + gd->ram_size = msize; + + return 0; } #if defined(CONFIG_OF_BOARD_SETUP) diff --git a/board/ifm/ac14xx/ac14xx.c b/board/ifm/ac14xx/ac14xx.c index 75bf1bb33c..348613736d 100644 --- a/board/ifm/ac14xx/ac14xx.c +++ b/board/ifm/ac14xx/ac14xx.c @@ -310,9 +310,12 @@ u32 sdram_init_seq[] = { /* EMPTY, optional, we don't do it */ }; -phys_size_t initdram(int board_type) +int dram_init(void) { - return fixed_sdram(NULL, sdram_init_seq, ARRAY_SIZE(sdram_init_seq)); + gd->ram_size = fixed_sdram(NULL, sdram_init_seq, + ARRAY_SIZE(sdram_init_seq)); + + return 0; } int misc_init_r(void) diff --git a/board/ifm/o2dnt2/o2dnt2.c b/board/ifm/o2dnt2/o2dnt2.c index 4fc6809ad6..7770806bd2 100644 --- a/board/ifm/o2dnt2/o2dnt2.c +++ b/board/ifm/o2dnt2/o2dnt2.c @@ -62,11 +62,11 @@ static void sdram_start(int hi_addr) #endif /* - * ATTENTION: Although partially referenced initdram does NOT make real use + * ATTENTION: Although partially referenced dram_init does NOT make real use * use of CONFIG_SYS_SDRAM_BASE. The code does not work if * CONFIG_SYS_SDRAM_BASE is something else than 0x00000000. */ -phys_size_t initdram(int board_type) +int dram_init(void) { struct mpc5xxx_mmap_ctl *mmap_ctl = (struct mpc5xxx_mmap_ctl *)CONFIG_SYS_MBAR; @@ -181,7 +181,9 @@ phys_size_t initdram(int board_type) (PVR_MAJ(pvr) == 1) && (PVR_MIN(pvr) == 4)) out_be32(&sdram->sdelay, 0x04); - return dramsize + dramsize2; + gd->ram_size = dramsize + dramsize2; + + return 0; } diff --git a/board/imgtec/boston/ddr.c b/board/imgtec/boston/ddr.c index ceffef61ef..3479b98b88 100644 --- a/board/imgtec/boston/ddr.c +++ b/board/imgtec/boston/ddr.c @@ -10,11 +10,16 @@ #include "boston-regs.h" -phys_size_t initdram(int board_type) +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) { u32 ddrconf0 = __raw_readl((uint32_t *)BOSTON_PLAT_DDRCONF0); - return (phys_size_t)(ddrconf0 & BOSTON_PLAT_DDRCONF0_SIZE) << 30; + gd->ram_size = (phys_size_t)(ddrconf0 & BOSTON_PLAT_DDRCONF0_SIZE) << + 30; + + return 0; } ulong board_get_usable_ram_top(ulong total_size) diff --git a/board/imgtec/malta/malta.c b/board/imgtec/malta/malta.c index 495504372a..de81aa01f0 100644 --- a/board/imgtec/malta/malta.c +++ b/board/imgtec/malta/malta.c @@ -19,6 +19,8 @@ #include "superio.h" +DECLARE_GLOBAL_DATA_PTR; + enum core_card { CORE_UNKNOWN, CORE_LV, @@ -83,9 +85,11 @@ static enum sys_con malta_sys_con(void) } } -phys_size_t initdram(int board_type) +int dram_init(void) { - return CONFIG_SYS_MEM_SIZE; + gd->ram_size = CONFIG_SYS_MEM_SIZE; + + return 0; } int checkboard(void) diff --git a/board/imgtec/xilfpga/xilfpga.c b/board/imgtec/xilfpga/xilfpga.c index 77a1952c93..841d61459d 100644 --- a/board/imgtec/xilfpga/xilfpga.c +++ b/board/imgtec/xilfpga/xilfpga.c @@ -11,10 +11,14 @@ #include <common.h> +DECLARE_GLOBAL_DATA_PTR; + /* initialize the DDR Controller and PHY */ -phys_size_t initdram(int board_type) +int dram_init(void) { /* MIG IP block is smart and doesn't need SW * to do any init */ - return CONFIG_SYS_SDRAM_SIZE; /* in bytes */ + gd->ram_size = CONFIG_SYS_SDRAM_SIZE; /* in bytes */ + + return 0; } diff --git a/board/inka4x0/inka4x0.c b/board/inka4x0/inka4x0.c index 0a32f0e1b9..88cae59e8f 100644 --- a/board/inka4x0/inka4x0.c +++ b/board/inka4x0/inka4x0.c @@ -36,6 +36,8 @@ #error "INKA4x0 SDRAM: invalid chip type specified!" #endif +DECLARE_GLOBAL_DATA_PTR; + #ifndef CONFIG_SYS_RAMBOOT static void sdram_start (int hi_addr) { @@ -72,12 +74,12 @@ static void sdram_start (int hi_addr) #endif /* - * ATTENTION: Although partially referenced initdram does NOT make real use + * ATTENTION: Although partially referenced dram_init does NOT make real use * use of CONFIG_SYS_SDRAM_BASE. The code does not work if CONFIG_SYS_SDRAM_BASE * is something else than 0x00000000. */ -phys_size_t initdram (int board_type) +int dram_init(void) { volatile struct mpc5xxx_mmap_ctl *mm = (struct mpc5xxx_mmap_ctl *) CONFIG_SYS_MBAR; @@ -139,7 +141,9 @@ phys_size_t initdram (int board_type) } #endif /* CONFIG_SYS_RAMBOOT */ - return dramsize; + gd->ram_size = dramsize; + + return 0; } int checkboard (void) diff --git a/board/intercontrol/digsy_mtc/digsy_mtc.c b/board/intercontrol/digsy_mtc/digsy_mtc.c index 05d673dc89..b8bc0459f8 100644 --- a/board/intercontrol/digsy_mtc/digsy_mtc.c +++ b/board/intercontrol/digsy_mtc/digsy_mtc.c @@ -74,12 +74,12 @@ static void sdram_start(int hi_addr) #endif /* - * ATTENTION: Although partially referenced initdram does NOT make real use + * ATTENTION: Although partially referenced dram_init does NOT make real use * use of CONFIG_SYS_SDRAM_BASE. The code does not work if * CONFIG_SYS_SDRAM_BASE is something other than 0x00000000. */ -phys_size_t initdram(int board_type) +int dram_init(void) { ulong dramsize = 0; ulong dramsize2 = 0; @@ -172,7 +172,9 @@ phys_size_t initdram(int board_type) (PVR_MAJ(pvr) == 1) && (PVR_MIN(pvr) == 4)) out_be32((void *)MPC5XXX_SDRAM_SDELAY, 0x04); - return dramsize + dramsize2; + gd->ram_size = dramsize + dramsize2; + + return 0; } int checkboard(void) diff --git a/board/ip04/Kconfig b/board/ip04/Kconfig deleted file mode 100644 index 670bf89922..0000000000 --- a/board/ip04/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_IP04 - -config SYS_BOARD - default "ip04" - -config SYS_CONFIG_NAME - default "ip04" - -endif diff --git a/board/ip04/MAINTAINERS b/board/ip04/MAINTAINERS deleted file mode 100644 index c37b0110f2..0000000000 --- a/board/ip04/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -IP04 BOARD -#M: Brent Kandetzki <brentk@teleco.com> -S: Orphan (since 2014-06) -F: board/ip04/ -F: include/configs/ip04.h -F: configs/ip04_defconfig diff --git a/board/ip04/Makefile b/board/ip04/Makefile deleted file mode 100644 index 44fa684729..0000000000 --- a/board/ip04/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) 2005-2010 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := ip04.o diff --git a/board/ip04/config.mk b/board/ip04/config.mk deleted file mode 100644 index ab0fbecab9..0000000000 --- a/board/ip04/config.mk +++ /dev/null @@ -1,12 +0,0 @@ -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -# Set some default LDR flags based on boot mode. -LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8 -LDR_FLAGS-BFIN_BOOT_UART := --port g --gpio 6 diff --git a/board/ip04/ip04.c b/board/ip04/ip04.c deleted file mode 100644 index c7bc33434e..0000000000 --- a/board/ip04/ip04.c +++ /dev/null @@ -1,29 +0,0 @@ -/* - * U-Boot - main board file - * - * Copyright (c) 2007 David Rowe, - * (c) 2006 Ivan Danov - * - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <net.h> -#include <netdev.h> - -int checkboard(void) -{ - printf("Board: IP04 IP-PBX\n"); - printf(" http://www.rowetel.com/ucasterisk/ip04.html\n"); - return 0; -} - -#ifdef CONFIG_DRIVER_DM9000 -int board_eth_init(bd_t *bis) -{ - return dm9000_initialize(bis); -} -#endif diff --git a/board/ipek01/ipek01.c b/board/ipek01/ipek01.c index 2e62355c48..133db8c6bd 100644 --- a/board/ipek01/ipek01.c +++ b/board/ipek01/ipek01.c @@ -75,12 +75,12 @@ static void sdram_start (int hi_addr) } /* - * ATTENTION: Although partially referenced initdram does NOT make real + * ATTENTION: Although partially referenced dram_init does NOT make real * use of CONFIG_SYS_SDRAM_BASE. The code does not work if * CONFIG_SYS_SDRAM_BASE is something else than 0x00000000. */ -phys_size_t initdram (int board_type) +int dram_init(void) { struct mpc5xxx_mmap_ctl *mmap_ctl = (struct mpc5xxx_mmap_ctl *)CONFIG_SYS_MBAR; @@ -135,7 +135,9 @@ phys_size_t initdram (int board_type) */ out_be32 (&sdram->sdelay, 0x04); - return dramsize + dramsize2; + gd->ram_size = dramsize + dramsize2; + + return 0; } int checkboard (void) diff --git a/board/jupiter/jupiter.c b/board/jupiter/jupiter.c index d56902bcd2..ea24eaa5c0 100644 --- a/board/jupiter/jupiter.c +++ b/board/jupiter/jupiter.c @@ -29,6 +29,8 @@ #define SDRAM_CONFIG2 0x88b70004 #endif +DECLARE_GLOBAL_DATA_PTR; + #ifndef CONFIG_SYS_RAMBOOT static void sdram_start (int hi_addr) { @@ -71,12 +73,12 @@ static void sdram_start (int hi_addr) #endif /* - * ATTENTION: Although partially referenced initdram does NOT make real use + * ATTENTION: Although partially referenced dram_init does NOT make real use * use of CONFIG_SYS_SDRAM_BASE. The code does not work if CONFIG_SYS_SDRAM_BASE * is something else than 0x00000000. */ -phys_size_t initdram (int board_type) +int dram_init(void) { ulong dramsize = 0; ulong dramsize2 = 0; @@ -194,7 +196,9 @@ phys_size_t initdram (int board_type) __asm__ volatile ("sync"); } - return dramsize + dramsize2; + gd->ram_size = dramsize + dramsize2; + + return 0; } int checkboard (void) diff --git a/board/keymile/km82xx/km82xx.c b/board/keymile/km82xx/km82xx.c index c2a7a5f995..51b4571d40 100644 --- a/board/keymile/km82xx/km82xx.c +++ b/board/keymile/km82xx/km82xx.c @@ -15,6 +15,8 @@ #include <i2c.h> #include "../common/common.h" +DECLARE_GLOBAL_DATA_PTR; + static uchar ivm_content[CONFIG_SYS_IVM_EEPROM_MAX_LEN]; /* @@ -289,7 +291,7 @@ static long probe_sdram(memctl8260_t *memctl) #endif /* CONFIG_SYS_SDRAM_LIST */ -phys_size_t initdram(int board_type) +int dram_init(void) { immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; memctl8260_t *memctl = &immap->im_memctl; @@ -305,7 +307,9 @@ phys_size_t initdram(int board_type) icache_enable(); - return psize; + gd->ram_size = psize; + + return 0; } int checkboard(void) diff --git a/board/keymile/km83xx/km83xx.c b/board/keymile/km83xx/km83xx.c index 154f97457b..8020c379fd 100644 --- a/board/keymile/km83xx/km83xx.c +++ b/board/keymile/km83xx/km83xx.c @@ -28,6 +28,8 @@ #include "../common/common.h" +DECLARE_GLOBAL_DATA_PTR; + static uchar ivm_content[CONFIG_SYS_IVM_EEPROM_MAX_LEN]; const qe_iop_conf_t qe_iop_conf_tab[] = { @@ -328,13 +330,13 @@ static int fixed_sdram(void) return msize; } -phys_size_t initdram(int board_type) +int dram_init(void) { immap_t *im = (immap_t *)CONFIG_SYS_IMMR; u32 msize = 0; if ((in_be32(&im->sysconf.immrbar) & IMMRBAR_BASE_ADDR) != (u32)im) - return -1; + return -ENXIO; out_be32(&im->sysconf.ddrlaw[0].bar, CONFIG_SYS_DDR_BASE & LAWBAR_BAR); @@ -348,7 +350,9 @@ phys_size_t initdram(int board_type) #endif /* return total bus SDRAM size(bytes) -- DDR */ - return msize * 1024 * 1024; + gd->ram_size = msize * 1024 * 1024; + + return 0; } int checkboard(void) diff --git a/board/keymile/kmp204x/ddr.c b/board/keymile/kmp204x/ddr.c index 77af184c82..6f82e15f82 100644 --- a/board/keymile/kmp204x/ddr.c +++ b/board/keymile/kmp204x/ddr.c @@ -14,6 +14,8 @@ #include <fsl_ddr_sdram.h> #include <fsl_ddr_dimm_params.h> +DECLARE_GLOBAL_DATA_PTR; + void fsl_ddr_board_options(memctl_options_t *popts, dimm_params_t *pdimm, unsigned int ctrl_num) @@ -48,7 +50,7 @@ void fsl_ddr_board_options(memctl_options_t *popts, popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR_ODT_75ohm; } -phys_size_t initdram(int board_type) +int dram_init(void) { phys_size_t dram_size = 0; @@ -60,5 +62,7 @@ phys_size_t initdram(int board_type) dram_size *= 0x100000; debug(" DDR: "); - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/lego/ev3/legoev3.c b/board/lego/ev3/legoev3.c index 7e1766c871..0ad33eaeae 100644 --- a/board/lego/ev3/legoev3.c +++ b/board/lego/ev3/legoev3.c @@ -145,9 +145,7 @@ int board_early_init_f(void) int board_init(void) { -#ifndef CONFIG_USE_IRQ irq_init(); -#endif /* arch number of the board */ /* LEGO didn't register for a unique number and uses da850evm */ diff --git a/board/liebherr/lwmon5/sdram.c b/board/liebherr/lwmon5/sdram.c index bcb344940b..4a65d74443 100644 --- a/board/liebherr/lwmon5/sdram.c +++ b/board/liebherr/lwmon5/sdram.c @@ -25,6 +25,8 @@ #include <asm/ppc440.h> #include <watchdog.h> +DECLARE_GLOBAL_DATA_PTR; + /* * This DDR2 setup code can dynamically setup the TLB entries for the DDR2 memory * region. Right now the cache should still be disabled in U-Boot because of the @@ -142,10 +144,10 @@ static void program_ecc(u32 start_address, /************************************************************************* * - * initdram -- 440EPx's DDR controller is a DENALI Core + * dram_init -- 440EPx's DDR controller is a DENALI Core * ************************************************************************/ -phys_size_t initdram (int board_type) +int dram_init(void) { /* CL=4 */ mtsdram(DDR0_02, 0x00000000); @@ -241,5 +243,7 @@ phys_size_t initdram (int board_type) */ set_mcsr(get_mcsr()); - return (CONFIG_SYS_MBYTES_SDRAM << 20); + gd->ram_size = CONFIG_SYS_MBYTES_SDRAM << 20; + + return 0; } diff --git a/board/micronas/vct/vct.c b/board/micronas/vct/vct.c index 0745ceeb7f..8bf8d5f4e8 100644 --- a/board/micronas/vct/vct.c +++ b/board/micronas/vct/vct.c @@ -28,6 +28,8 @@ #define BOARD_NAME_ADD " NOR" #endif +DECLARE_GLOBAL_DATA_PTR; + int board_early_init_f(void) { /* @@ -59,10 +61,12 @@ void _machine_restart(void) * SDRAM is already configured by the bootstrap code, only return the * auto-detected size here */ -phys_size_t initdram(int board_type) +int dram_init(void) { - return get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, + gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MBYTES_SDRAM << 20); + + return 0; } int checkboard(void) diff --git a/board/mini-box/picosam9g45/picosam9g45.c b/board/mini-box/picosam9g45/picosam9g45.c index 32ba9c6225..5eb2ad77ca 100644 --- a/board/mini-box/picosam9g45/picosam9g45.c +++ b/board/mini-box/picosam9g45/picosam9g45.c @@ -283,7 +283,7 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, @@ -291,6 +291,8 @@ void dram_init_banksize(void) gd->bd->bi_dram[1].start = PHYS_SDRAM_2; gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE); + + return 0; } #ifdef CONFIG_RESET_PHY_R diff --git a/board/motionpro/motionpro.c b/board/motionpro/motionpro.c index 7fa81b8677..7883a179e8 100644 --- a/board/motionpro/motionpro.c +++ b/board/motionpro/motionpro.c @@ -19,6 +19,8 @@ #include <status_led.h> #endif /* CONFIG_LED_STATUS */ +DECLARE_GLOBAL_DATA_PTR; + /* Kollmorgen DPR initialization data */ struct init_elem { unsigned long addr; @@ -116,7 +118,7 @@ static void sdram_start(int hi_addr) /* * Initalize SDRAM - configure SDRAM controller, detect memory size. */ -phys_size_t initdram(int board_type) +int dram_init(void) { ulong dramsize = 0; #ifndef CONFIG_SYS_RAMBOOT @@ -172,7 +174,9 @@ phys_size_t initdram(int board_type) #endif /* CONFIG_SYS_RAMBOOT */ /* return total ram size */ - return dramsize; + gd->ram_size = dramsize; + + return 0; } diff --git a/board/mpc8308_p1m/sdram.c b/board/mpc8308_p1m/sdram.c index da36f63fdd..05c477d389 100644 --- a/board/mpc8308_p1m/sdram.c +++ b/board/mpc8308_p1m/sdram.c @@ -61,7 +61,7 @@ static long fixed_sdram(void) return get_ram_size(CONFIG_SYS_DDR_SDRAM_BASE, msize); } -phys_size_t initdram(int board_type) +int dram_init(void) { immap_t *im = (immap_t *)CONFIG_SYS_IMMR; u32 msize; @@ -72,6 +72,8 @@ phys_size_t initdram(int board_type) /* DDR SDRAM */ msize = fixed_sdram(); - /* return total bus SDRAM size(bytes) -- DDR */ - return msize; + /* set total bus SDRAM size(bytes) -- DDR */ + gd->ram_size = msize; + + return 0; } diff --git a/board/mpl/mip405/mip405.c b/board/mpl/mip405/mip405.c index 8b9892b868..4d8671fe67 100644 --- a/board/mpl/mip405/mip405.c +++ b/board/mpl/mip405/mip405.c @@ -615,14 +615,14 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ /* ------------------------------------------------------------------------- */ /* - initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of + dram_init() reads EEPROM via I2c. EEPROM contains all of the necessary info for SDRAM controller configuration */ /* ------------------------------------------------------------------------- */ /* ------------------------------------------------------------------------- */ static int test_dram (unsigned long ramsize); -phys_size_t initdram (int board_type) +int dram_init(void) { unsigned long bank_reg[4], tmp, bank_size; @@ -655,7 +655,9 @@ phys_size_t initdram (int board_type) printf ("ECC "); test_dram (TotalSize * MEGA_BYTE); - return (TotalSize * MEGA_BYTE); + gd->ram_size = TotalSize * MEGA_BYTE; + + return 0; } /* ------------------------------------------------------------------------- */ diff --git a/board/mpl/pati/pati.c b/board/mpl/pati/pati.c index ddc21083d8..1288f743cc 100644 --- a/board/mpl/pati/pati.c +++ b/board/mpl/pati/pati.c @@ -55,6 +55,8 @@ asm (GEN_SYMNAME(name) " = " GEN_VALUE(value)) +DECLARE_GLOBAL_DATA_PTR; + /************************************************************************ * Early debug routines */ @@ -133,7 +135,7 @@ extern int mem_test (unsigned long start, unsigned long ramsize, int quiet); /* * Get RAM size. */ -phys_size_t initdram(int board_type) +int dram_init(void) { unsigned char board_rev; unsigned long reg; @@ -209,8 +211,10 @@ phys_size_t initdram(int board_type) /* we have a x32 bit bus to the SDRAM, so shift the addr with 2 */ lmr<<=2; in32(CONFIG_SYS_SDRAM_BASE + lmr); - /* ok, we're done, return SDRAM size */ - return ((0x400000 << sdram_table[i].sz)); /* log2 value of 4MByte */ + /* ok, we're done, set SDRAM size to log2 value of 4MByte*/ + gd->ram_size = 0x400000 << sdram_table[i].sz; + + return 0; } diff --git a/board/mpl/pip405/pip405.c b/board/mpl/pip405/pip405.c index 1bd2fbfc58..408518d648 100644 --- a/board/mpl/pip405/pip405.c +++ b/board/mpl/pip405/pip405.c @@ -605,14 +605,14 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ /* ------------------------------------------------------------------------- */ /* - initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of + dram_init() reads EEPROM via I2c. EEPROM contains all of the necessary info for SDRAM controller configuration */ /* ------------------------------------------------------------------------- */ /* ------------------------------------------------------------------------- */ static int test_dram (unsigned long ramsize); -phys_size_t initdram (int board_type) +int dram_init(void) { unsigned long bank_reg[4], tmp, bank_size; int i, ds; @@ -648,7 +648,9 @@ phys_size_t initdram (int board_type) (void) get_clocks(); if (gd->cpu_clk > 220000000) TotalSize /= 2; - return (TotalSize * 1024 * 1024); + gd->ram_size = TotalSize * 1024 * 1024; + + return 0; } /* ------------------------------------------------------------------------- */ diff --git a/board/mqmaker/miqi_rk3288/Kconfig b/board/mqmaker/miqi_rk3288/Kconfig new file mode 100644 index 0000000000..232a112090 --- /dev/null +++ b/board/mqmaker/miqi_rk3288/Kconfig @@ -0,0 +1,15 @@ +if TARGET_MIQI_RK3288 + +config SYS_BOARD + default "miqi_rk3288" + +config SYS_VENDOR + default "mqmaker" + +config SYS_CONFIG_NAME + default "miqi_rk3288" + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + +endif diff --git a/board/mqmaker/miqi_rk3288/MAINTAINERS b/board/mqmaker/miqi_rk3288/MAINTAINERS new file mode 100644 index 0000000000..053a5e6028 --- /dev/null +++ b/board/mqmaker/miqi_rk3288/MAINTAINERS @@ -0,0 +1,6 @@ +MIQI +M: Jernej Skrabec <jernej.skrabec@siol.net> +S: Maintained +F: board/mqmaker/miqi_rk3288 +F: include/configs/miqi_rk3288.h +F: configs/miqi-rk3288_defconfig diff --git a/board/mqmaker/miqi_rk3288/Makefile b/board/mqmaker/miqi_rk3288/Makefile new file mode 100644 index 0000000000..ec95affb39 --- /dev/null +++ b/board/mqmaker/miqi_rk3288/Makefile @@ -0,0 +1,7 @@ +# +# (C) Copyright 2016 Rockchip Electronics Co., Ltd +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += miqi-rk3288.o diff --git a/board/mqmaker/miqi_rk3288/miqi-rk3288.c b/board/mqmaker/miqi_rk3288/miqi-rk3288.c new file mode 100644 index 0000000000..a82f0ae283 --- /dev/null +++ b/board/mqmaker/miqi_rk3288/miqi-rk3288.c @@ -0,0 +1,15 @@ +/* + * (C) Copyright 2016 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <spl.h> + +void board_boot_order(u32 *spl_boot_list) +{ + /* eMMC prior to sdcard. */ + spl_boot_list[0] = BOOT_DEVICE_MMC2; + spl_boot_list[1] = BOOT_DEVICE_MMC1; +} diff --git a/board/munices/munices.c b/board/munices/munices.c index 8f292ea8e2..468eb3723e 100644 --- a/board/munices/munices.c +++ b/board/munices/munices.c @@ -11,6 +11,8 @@ #include "mt48lc16m16a2-75.h" +DECLARE_GLOBAL_DATA_PTR; + #ifndef CONFIG_SYS_RAMBOOT static void sdram_start (int hi_addr) { @@ -53,12 +55,12 @@ static void sdram_start (int hi_addr) #endif /* - * ATTENTION: Although partially referenced initdram does NOT make real use + * ATTENTION: Although partially referenced dram_init does NOT make real use * use of CONFIG_SYS_SDRAM_BASE. The code does not work if CONFIG_SYS_SDRAM_BASE * is something else than 0x00000000. */ -phys_size_t initdram (int board_type) +int dram_init(void) { ulong dramsize = 0; ulong dramsize2 = 0; @@ -125,7 +127,9 @@ phys_size_t initdram (int board_type) #endif /* CONFIG_SYS_RAMBOOT */ - return dramsize + dramsize2; + gd->ram_size = dramsize + dramsize2; + + return 0; } int checkboard (void) diff --git a/board/omicron/calimain/calimain.c b/board/omicron/calimain/calimain.c index 32f2b20183..80a142eaf8 100644 --- a/board/omicron/calimain/calimain.c +++ b/board/omicron/calimain/calimain.c @@ -100,9 +100,7 @@ int board_init(void) { int val; -#ifndef CONFIG_USE_IRQ irq_init(); -#endif /* address of boot parameters */ gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; diff --git a/board/openrisc/openrisc-generic/Kconfig b/board/openrisc/openrisc-generic/Kconfig deleted file mode 100644 index cd2a94f025..0000000000 --- a/board/openrisc/openrisc-generic/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_OPENRISC_GENERIC - -config SYS_BOARD - default "openrisc-generic" - -config SYS_VENDOR - default "openrisc" - -config SYS_CONFIG_NAME - default "openrisc-generic" - -endif diff --git a/board/openrisc/openrisc-generic/MAINTAINERS b/board/openrisc/openrisc-generic/MAINTAINERS deleted file mode 100644 index c8dbc742e2..0000000000 --- a/board/openrisc/openrisc-generic/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -OPENRISC-GENERIC BOARD -M: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> -S: Maintained -F: board/openrisc/openrisc-generic/ -F: include/configs/openrisc-generic.h -F: configs/openrisc-generic_defconfig diff --git a/board/openrisc/openrisc-generic/Makefile b/board/openrisc/openrisc-generic/Makefile deleted file mode 100644 index 342bc80450..0000000000 --- a/board/openrisc/openrisc-generic/Makefile +++ /dev/null @@ -1,8 +0,0 @@ -# -# (C) Copyright 2001-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := openrisc-generic.o diff --git a/board/openrisc/openrisc-generic/config.mk b/board/openrisc/openrisc-generic/config.mk deleted file mode 100644 index dd6595f757..0000000000 --- a/board/openrisc/openrisc-generic/config.mk +++ /dev/null @@ -1,11 +0,0 @@ -# -# (C) Copyright 2011, Julius Baxter <julius@opencores.org> -# -# SPDX-License-Identifier: GPL-2.0+ -# - -PLATFORM_CPPFLAGS += -mhard-mul -mhard-div - -ifeq ($(debug),1) -PLATFORM_CPPFLAGS += -DDEBUG -endif diff --git a/board/openrisc/openrisc-generic/openrisc-generic.c b/board/openrisc/openrisc-generic/openrisc-generic.c deleted file mode 100644 index 4f82600bbb..0000000000 --- a/board/openrisc/openrisc-generic/openrisc-generic.c +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Based on nios2-generic.c: - * (C) Copyright 2005, Psyent Corporation <www.psyent.com> - * Scott McNutt <smcnutt@psyent.com> - * (C) Copyright 2010, Thomas Chou <thomas@wytron.com.tw> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <netdev.h> - -int board_early_init_f(void) -{ - return 0; -} - -int checkboard(void) -{ - printf("BOARD: %s\n", CONFIG_BOARD_NAME); - return 0; -} - -phys_size_t initdram(int board_type) -{ - return 0; -} - -#ifdef CONFIG_CMD_NET -int board_eth_init(bd_t *bis) -{ - int rc = 0; - -#ifdef CONFIG_ETHOC - rc += ethoc_initialize(0, CONFIG_SYS_ETHOC_BASE); -#endif - return rc; -} -#endif diff --git a/board/openrisc/openrisc-generic/or1ksim.cfg b/board/openrisc/openrisc-generic/or1ksim.cfg deleted file mode 100644 index 2bd8642932..0000000000 --- a/board/openrisc/openrisc-generic/or1ksim.cfg +++ /dev/null @@ -1,871 +0,0 @@ -/* sim.cfg -- Simulator configuration script file - Copyright (C) 2001-2002, Marko Mlinar, markom@opencores.org - -This file is part of OpenRISC 1000 Architectural Simulator. -It contains the default configuration and help about configuring -the simulator. - - * SPDX-License-Identifier: GPL-2.0+ - */ - - -/* INTRODUCTION - - The ork1sim has various parameters, that are set in configuration files - like this one. The user can switch between configurations at startup by - specifying the required configuration file with the -f <filename.cfg> option. - If no configuration file is specified or1ksim searches for the default - configuration file sim.cfg. First it searches for './sim.cfg'. If this - file is not found, it searches for '~/or1k/sim.cfg'. If this file is - not found too, it reverts to the built-in default configuration. - - NOTE: Users should not rely on the built-in configuration, since the - default configuration may differ between version. - Rather create a configuration file that sets all critical values. - - This file may contain (standard C) comments only - no // support. - - Configure files may be be included, using: - include "file_name_to_include" - - Like normal configuration files, the included file is divided into - sections. Each section is described in detail also. - - Some section have subsections. One example of such a subsection is: - - device <index> - instance specific parameters... - enddevice - - which creates a device instance. -*/ - - -/* MEMORY SECTION - - This section specifies how the memory is generated and the blocks - it consists of. - - type = random/unknown/pattern - Specifies the initial memory values. - 'random' generates random memory using seed 'random_seed'. - 'pattern' fills memory with 'pattern'. - 'unknown' does not specify how memory should be generated, - leaving the memory in a undefined state. This is the fastest - option. - - random_seed = <value> - random seed for randomizer, used if type = 'random'. - - pattern = <value> - pattern to fill memory, used if type = 'pattern'. - - nmemories = <value> - number of memory instances connected - - baseaddr = <hex_value> - memory start address - - size = <hex_value> - memory size - - name = "<string>" - memory block name - - ce = <value> - chip enable index of the memory instance - - mc = <value> - memory controller this memory is connected to - - delayr = <value> - cycles, required for read access, -1 if instance does not support reading - - delayw = <value> - cycles, required for write access, -1 if instance does not support writing - - log = "<filename>" - filename, where to log memory accesses to, no log, if log command is not specified -*/ - - -section memory - pattern = 0x00 - type = unknown /* Fastest */ - - name = "FLASH" - ce = 0 - mc = 0 - baseaddr = 0xf0000000 - size = 0x01000000 - delayr = 1 - delayw = -1 -end - -section memory - pattern = 0x00 - type = unknown /* Fastest */ - - name = "RAM" - ce = 1 - mc = 0 - baseaddr = 0x00000000 - size = 0x02000000 - delayr = 1 - delayw = 1 -end - -section memory - pattern = 0x00 - type = unknown /* Fastest */ - - name = "SRAM" - mc = 0 - ce = 2 - baseaddr = 0xa4000000 - size = 0x00100000 - delayr = 1 - delayw = 2 -end - - -/* IMMU SECTION - - This section configures the Instruction Memory Manangement Unit - - enabled = 0/1 - '0': disabled - '1': enabled - (NOTE: UPR bit is set) - - nsets = <value> - number of ITLB sets; must be power of two - - nways = <value> - number of ITLB ways - - pagesize = <value> - instruction page size; must be power of two - - entrysize = <value> - instruction entry size in bytes - - ustates = <value> - number of ITLB usage states (2, 3, 4 etc., max is 4) - - hitdelay = <value> - number of cycles immu hit costs - - missdelay = <value> - number of cycles immu miss costs -*/ - -section immu - enabled = 1 - nsets = 64 - nways = 1 - pagesize = 8192 - hitdelay = 0 - missdelay = 0 -end - - -/* DMMU SECTION - - This section configures the Data Memory Manangement Unit - - enabled = 0/1 - '0': disabled - '1': enabled - (NOTE: UPR bit is set) - - nsets = <value> - number of DTLB sets; must be power of two - - nways = <value> - number of DTLB ways - - pagesize = <value> - data page size; must be power of two - - entrysize = <value> - data entry size in bytes - - ustates = <value> - number of DTLB usage states (2, 3, 4 etc., max is 4) - - hitdelay = <value> - number of cycles dmmu hit costs - - missdelay = <value> - number of cycles dmmu miss costs -*/ - -section dmmu - enabled = 1 - nsets = 64 - nways = 1 - pagesize = 8192 - hitdelay = 0 - missdelay = 0 -end - - -/* IC SECTION - - This section configures the Instruction Cache - - enabled = 0/1 - '0': disabled - '1': enabled - (NOTE: UPR bit is set) - - nsets = <value> - number of IC sets; must be power of two - - nways = <value> - number of IC ways - - blocksize = <value> - IC block size in bytes; must be power of two - - ustates = <value> - number of IC usage states (2, 3, 4 etc., max is 4) - - hitdelay = <value> - number of cycles ic hit costs - - missdelay = <value> - number of cycles ic miss costs -*/ - -section ic - enabled = 1 - nsets = 512 - nways = 1 - blocksize = 16 - hitdelay = 1 - missdelay = 1 -end - - -/* DC SECTION - - This section configures the Data Cache - - enabled = 0/1 - '0': disabled - '1': enabled - (NOTE: UPR bit is set) - - nsets = <value> - number of DC sets; must be power of two - - nways = <value> - number of DC ways - - blocksize = <value> - DC block size in bytes; must be power of two - - ustates = <value> - number of DC usage states (2, 3, 4 etc., max is 4) - - load_hitdelay = <value> - number of cycles dc load hit costs - - load_missdelay = <value> - number of cycles dc load miss costs - - store_hitdelay = <value> - number of cycles dc load hit costs - - store_missdelay = <value> - number of cycles dc load miss costs -*/ - -section dc - enabled = 1 - nsets = 512 - nways = 1 - blocksize = 16 - load_hitdelay = 1 - load_missdelay = 1 - store_hitdelay = 1 - store_missdelay = 1 -end - - -/* SIM SECTION - - This section specifies how or1ksim should behave. - - verbose = 0/1 - '0': don't print extra messages - '1': print extra messages - - debug = 0-9 - 0 : no debug messages - 1-9: debug message level. - higher numbers produce more messages - - profile = 0/1 - '0': don't generate profiling file 'sim.profile' - '1': don't generate profiling file 'sim.profile' - - prof_fn = "<filename>" - optional filename for the profiling file. - valid only if 'profile' is set - - mprofile = 0/1 - '0': don't generate memory profiling file 'sim.mprofile' - '1': generate memory profiling file 'sim.mprofile' - - mprof_fn = "<filename>" - optional filename for the memory profiling file. - valid only if 'mprofile' is set - - history = 0/1 - '0': don't track execution flow - '1': track execution flow - Execution flow can be tracked for the simulator's - 'hist' command. Useful for back-trace debugging. - - iprompt = 0/1 - '0': start in <not interactive prompt> (so what do we start in ???) - '1': start in interactive prompt. - - exe_log = 0/1 - '0': don't generate execution log. - '1': generate execution log. - - exe_log = default/hardware/simple/software - type of execution log, default is used when not specified - - exe_log_start = <value> - index of first instruction to start logging, default = 0 - - exe_log_end = <value> - index of last instruction to end logging; not limited, if omitted - - exe_log_marker = <value> - <value> specifies number of instructions before horizontal marker is - printed; if zero, markers are disabled (default) - - exe_log_fn = "<filename>" - filename for the exection log file. - valid only if 'exe_log' is set - - clkcycle = <value>[ps|ns|us|ms] - specifies time measurement for one cycle -*/ - -section sim - verbose = 1 - debug = 0 - profile = 0 - history = 0 - - clkcycle = 10ns -end - - -/* SECTION VAPI - - This section configures the Verification API, used for Advanced - Core Verification. - - enabled = 0/1 - '0': disbable VAPI server - '1': enable/start VAPI server - - server_port = <value> - TCP/IP port to start VAPI server on - - log_enabled = 0/1 - '0': disable VAPI requests logging - '1': enable VAPI requests logging - - hide_device_id = 0/1 - '0': don't log device id (for compatability with old version) - '1': log device id - - - vapi_fn = <filename> - filename for the log file. - valid only if log_enabled is set -*/ - -section VAPI - enabled = 0 - server_port = 9998 - log_enabled = 0 - vapi_log_fn = "vapi.log" -end - - -/* CPU SECTION - - This section specifies various CPU parameters. - - ver = <value> - rev = <value> - specifies version and revision of the CPU used - - upr = <value> - changes the upr register - - sr = <value> - sets the initial Supervision Register value - supervisor mode (SM) and fixed one (FO) set = 0x8001 - exception prefix high (EPH, vectors@0xf0000000) = 0x4000 - together, (SM | FO | EPH) = 0xc001 - superscalar = 0/1 - '0': CPU is scalar - '1': CPU is superscalar - (modify cpu/or32/execute.c to tune superscalar model) - - hazards = 0/1 - '0': don't track data hazards in superscalar CPU - '1': track data hazards in superscalar CPU - If tracked, data hazards can be displayed using the - simulator's 'r' command. - - dependstats = 0/1 - '0': don't calculate inter-instruction dependencies. - '1': calculate inter-instruction dependencies. - If calculated, inter-instruction dependencies can be - displayed using the simulator's 'stat' command. - - sbuf_len = <value> - length of store buffer (<= 256), 0 = disabled -*/ - -section cpu - ver = 0x12 - cfg = 0x00 - rev = 0x01 - sr = 0x8001 /*SPR_SR_FO | SPR_SR_SM | SPR_SR_EPH */ - /* upr = */ - superscalar = 0 - hazards = 0 - dependstats = 0 - sbuf_len = 0 -end - - -/* PM SECTION - - This section specifies Power Management parameters - - enabled = 0/1 - '0': disable power management - '1': enable power management -*/ - -section pm - enabled = 0 -end - - -/* BPB SECTION - - This section specifies how branch prediction should behave. - - enabled = 0/1 - '0': disable branch prediction - '1': enable branch prediction - - btic = 0/1 - '0': disable branch target instruction cache model - '1': enable branch target instruction cache model - - sbp_bf_fwd = 0/1 - Static branch prediction for 'l.bf' - '0': don't use forward prediction - '1': use forward prediction - - sbp_bnf_fwd = 0/1 - Static branch prediction for 'l.bnf' - '0': don't use forward prediction - '1': use forward prediction - - hitdelay = <value> - number of cycles bpb hit costs - - missdelay = <value> - number of cycles bpb miss costs -*/ - -section bpb - enabled = 0 - btic = 0 - sbp_bf_fwd = 0 - sbp_bnf_fwd = 0 - hitdelay = 0 - missdelay = 0 -end - - -/* DEBUG SECTION - - This sections specifies how the debug unit should behave. - - enabled = 0/1 - '0': disable debug unit - '1': enable debug unit - - gdb_enabled = 0/1 - '0': don't start gdb server - '1': start gdb server at port 'server_port' - - server_port = <value> - TCP/IP port to start gdb server on - valid only if gdb_enabled is set - - vapi_id = <hex_value> - Used to create "fake" vapi log file containing the JTAG proxy messages. -*/ -section debug - enabled = 0 -/* gdb_enabled = 0 */ -/* server_port = 9999*/ - rsp_enabled = 1 - rsp_port = 50001 -end - - -/* MC SECTION - - This section configures the memory controller - - enabled = 0/1 - '0': disable memory controller - '1': enable memory controller - - baseaddr = <hex_value> - address of first MC register - - POC = <hex_value> - Power On Configuration register - - index = <value> - Index of this memory controller amongst all the memory controllers -*/ - -section mc - enabled = 0 - baseaddr = 0x93000000 - POC = 0x00000008 /* Power on configuration register */ - index = 0 -end - - -/* UART SECTION - - This section configures the UARTs - - enabled = <0|1> - Enable/disable the peripheral. By default if it is enabled. - - baseaddr = <hex_value> - address of first UART register for this device - - - channel = <channeltype>:<args> - - The channel parameter indicates the source of received UART characters - and the sink for transmitted UART characters. - - The <channeltype> can be either "file", "xterm", "tcp", "fd", or "tty" - (without quotes). - - A) To send/receive characters from a pair of files, use a file - channel: - - channel=file:<rxfile>,<txfile> - - B) To create an interactive terminal window, use an xterm channel: - - channel=xterm:[<xterm_arg>]* - - C) To create a bidirectional tcp socket which one could, for example, - access via telnet, use a tcp channel: - - channel=tcp:<port number> - - D) To cause the UART to read/write from existing numeric file - descriptors, use an fd channel: - - channel=fd:<rx file descriptor num>,<tx file descriptor num> - - E) To connect the UART to a physical serial port, create a tty - channel: - - channel=tty:device=/dev/ttyS0,baud=9600 - - irq = <value> - irq number for this device - - 16550 = 0/1 - '0': this device is a UART16450 - '1': this device is a UART16550 - - jitter = <value> - in msecs... time to block, -1 to disable it - - vapi_id = <hex_value> - VAPI id of this instance -*/ - -section uart - enabled = 1 - baseaddr = 0x90000000 - irq = 2 - /* channel = "file:uart0.rx,uart0.tx" */ - /* channel = "tcp:10084" */ - channel = "xterm:" - jitter = -1 /* async behaviour */ - 16550 = 1 -end - - -/* DMA SECTION - - This section configures the DMAs - - enabled = <0|1> - Enable/disable the peripheral. By default if it is enabled. - - baseaddr = <hex_value> - address of first DMA register for this device - - irq = <value> - irq number for this device - - vapi_id = <hex_value> - VAPI id of this instance -*/ - -section dma - enabled = 1 - baseaddr = 0x9a000000 - irq = 11 -end - - -/* ETHERNET SECTION - - This section configures the ETHERNETs - - enabled = <0|1> - Enable/disable the peripheral. By default if it is enabled. - - baseaddr = <hex_value> - address of first ethernet register for this device - - dma = <value> - which controller is this ethernet "connected" to - - irq = <value> - ethernet mac IRQ level - - rtx_type = <value> - use 0 - file interface, 1 - socket interface - - rx_channel = <value> - DMA channel used for RX - - tx_channel = <value> - DMA channel used for TX - - rxfile = "<filename>" - filename, where to read data from - - txfile = "<filename>" - filename, where to write data to - - sockif = "<ifacename>" - interface name of ethernet socket - - vapi_id = <hex_value> - VAPI id of this instance -*/ - -section ethernet - enabled = 1 - baseaddr = 0x92000000 - /* dma = 0 */ - irq = 4 - rtx_type = "tap" - tap_dev = "tap0" - /* tx_channel = 0 */ - /* rx_channel = 1 */ - rxfile = "eth0.rx" - txfile = "eth0.tx" - sockif = "eth0" -end - - -/* GPIO SECTION - - This section configures the GPIOs - - enabled = <0|1> - Enable/disable the peripheral. By default if it is enabled. - - baseaddr = <hex_value> - address of first GPIO register for this device - - irq = <value> - irq number for this device - - base_vapi_id = <hex_value> - first VAPI id of this instance - GPIO uses 8 consecutive VAPI IDs -*/ - -section gpio - enabled = 0 - baseaddr = 0x91000000 - irq = 3 - base_vapi_id = 0x0200 -end - -/* VGA SECTION - - This section configures the VGA/LCD controller - - enabled = <0|1> - Enable/disable the peripheral. By default if it is enabled. - - baseaddr = <hex_value> - address of first VGA register - - irq = <value> - irq number for this device - - refresh_rate = <value> - number of cycles between screen dumps - - filename = "<filename>" - template name for generated names (e.g. "primary" produces "primary0023.bmp") -*/ - -section vga - enabled = 0 - baseaddr = 0x97100000 - irq = 8 - refresh_rate = 100000 - filename = "primary" -end - - -/* TICK TIMER SECTION - - This section configures tick timer - - enabled = 0/1 - whether tick timer is enabled -*/ - -section pic - enabled = 1 - edge_trigger = 1 -end - -/* FB SECTION - - This section configures the frame buffer - - enabled = <0|1> - Enable/disable the peripheral. By default if it is enabled. - - baseaddr = <hex_value> - base address of frame buffer - - paladdr = <hex_value> - base address of first palette entry - - refresh_rate = <value> - number of cycles between screen dumps - - filename = "<filename>" - template name for generated names (e.g. "primary" produces "primary0023.bmp") -*/ - -section fb - enabled = 0 - baseaddr = 0x97000000 - refresh_rate = 1000000 - filename = "primary" -end - - -/* KBD SECTION - - This section configures the PS/2 compatible keyboard - - baseaddr = <hex_value> - base address of the keyboard device - - rxfile = "<filename>" - filename, where to read data from -*/ - -section kbd - enabled = 0 - irq = 5 - baseaddr = 0x94000000 - rxfile = "kbd.rx" -end - - -/* ATA SECTION - - This section configures the ATA/ATAPI host controller - - baseaddr = <hex_value> - address of first ATA register - - enabled = <0|1> - Enable/disable the peripheral. By default if it is enabled. - - irq = <value> - irq number for this device - - debug = <value> - debug level for ata models. - 0: no debug messages - 1: verbose messages - 3: normal messages (more messages than verbose) - 5: debug messages (normal debug messages) - 7: flow control messages (debug statemachine flows) - 9: low priority message (display everything the code does) - - dev_type0/1 = <value> - ata device 0 type - 0: NO_CONNeCT: none (not connected) - 1: FILE : simulated harddisk - 2: LOCAL : local system harddisk - - dev_file0/1 = "<filename>" - filename for simulated ATA device - valid only if dev_type0 == 1 - - dev_size0/1 = <value> - size of simulated hard-disk (in MBytes) - valid only if dev_type0 == 1 - - dev_packet0/1 = <value> - 0: simulated ATA device does NOT implement PACKET command feature set - 1: simulated ATA device does implement PACKET command feature set - - FIXME: irq number -*/ - -section ata - enabled = 0 - baseaddr = 0x9e000000 - irq = 15 - -end diff --git a/board/pb1x00/pb1x00.c b/board/pb1x00/pb1x00.c index eb92914a79..1c0540a989 100644 --- a/board/pb1x00/pb1x00.c +++ b/board/pb1x00/pb1x00.c @@ -11,11 +11,15 @@ #include <asm/mipsregs.h> #include <asm/io.h> -phys_size_t initdram(int board_type) +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) { /* Sdram is setup by assembler code */ /* If memory could be changed, we should return the true value here */ - return 64*1024*1024; + gd->ram_size = 64 * 1024 * 1024; + + return 0; } #define BCSR_PCMCIA_PC0DRVEN 0x0010 diff --git a/board/pdm360ng/pdm360ng.c b/board/pdm360ng/pdm360ng.c index d91d427c6b..9db31d3312 100644 --- a/board/pdm360ng/pdm360ng.c +++ b/board/pdm360ng/pdm360ng.c @@ -48,7 +48,7 @@ sdram_conf_t mddrc_config[] = { }, }; -phys_size_t initdram (int board_type) +int dram_init(void) { int i; u32 msize = 0; @@ -95,7 +95,9 @@ phys_size_t initdram (int board_type) break; } - return msize; + gd->ram_size = msize; + + return 0; } static int set_lcd_brightness(char *); diff --git a/board/phytec/pcm030/pcm030.c b/board/phytec/pcm030/pcm030.c index 8a9de0d963..983559e81e 100644 --- a/board/phytec/pcm030/pcm030.c +++ b/board/phytec/pcm030/pcm030.c @@ -18,6 +18,8 @@ #include "mt46v32m16-75.h" +DECLARE_GLOBAL_DATA_PTR; + #ifndef CONFIG_SYS_RAMBOOT static void sdram_start(int hi_addr) { @@ -67,13 +69,13 @@ static void sdram_start(int hi_addr) #endif /* - * ATTENTION: Although partially referenced initdram does NOT make + * ATTENTION: Although partially referenced dram_init does NOT make * real use of CONFIG_SYS_SDRAM_BASE. The code does not * work if CONFIG_SYS_SDRAM_BASE * is something else than 0x00000000. */ -phys_size_t initdram(int board_type) +int dram_init(void) { volatile struct mpc5xxx_mmap_ctl *mm = (struct mpc5xxx_mmap_ctl *)CONFIG_SYS_MBAR; @@ -143,7 +145,9 @@ phys_size_t initdram(int board_type) #endif /* CONFIG_SYS_RAMBOOT */ - return dramsize + dramsize2; + gd->ram_size = dramsize + dramsize2; + + return 0; } int checkboard(void) diff --git a/board/pr1/Kconfig b/board/pr1/Kconfig deleted file mode 100644 index fb04648716..0000000000 --- a/board/pr1/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_PR1 - -config SYS_BOARD - default "pr1" - -config SYS_CONFIG_NAME - default "pr1" - -endif diff --git a/board/pr1/MAINTAINERS b/board/pr1/MAINTAINERS deleted file mode 100644 index 23fdbc7a76..0000000000 --- a/board/pr1/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -PR1 BOARD -M: Dimitar Penev <dpn@switchfin.org> -S: Maintained -F: board/pr1/ -F: include/configs/pr1.h -F: configs/pr1_defconfig diff --git a/board/pr1/Makefile b/board/pr1/Makefile deleted file mode 100644 index 8caa3601f4..0000000000 --- a/board/pr1/Makefile +++ /dev/null @@ -1,14 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) Switchfin Org. <dpn@switchfin.org> -# -# Copyright (c) 2005-2007 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := pr1.o diff --git a/board/pr1/pr1.c b/board/pr1/pr1.c deleted file mode 100644 index 3fffabdefb..0000000000 --- a/board/pr1/pr1.c +++ /dev/null @@ -1,30 +0,0 @@ -/* - * U-Boot - main board file - * - * Copyright (c) Switchfin Org. <dpn@switchfin.org> - * - * Copyright (c) 2005-2008 Analog Devices Inc. - * - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <net.h> -#include <netdev.h> - -int checkboard(void) -{ - printf("Board: Switchvoice PR1 Appliance\n"); - printf(" Support: http://www.switchvoice.com/\n"); - return 0; -} - -#ifdef CONFIG_BFIN_MAC -int board_eth_init(bd_t *bis) -{ - return bfin_EMAC_initialize(bis); -} -#endif diff --git a/board/qemu-mips/qemu-mips.c b/board/qemu-mips/qemu-mips.c index 563044eb0c..583acc2e44 100644 --- a/board/qemu-mips/qemu-mips.c +++ b/board/qemu-mips/qemu-mips.c @@ -11,11 +11,15 @@ #include <asm/io.h> #include <netdev.h> -phys_size_t initdram(int board_type) +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) { /* Sdram is setup by assembler code */ /* If memory could be changed, we should return the true value here */ - return MEM_SIZE*1024*1024; + gd->ram_size = MEM_SIZE * 1024 * 1024; + + return 0; } int checkboard(void) diff --git a/board/qualcomm/dragonboard410c/dragonboard410c.c b/board/qualcomm/dragonboard410c/dragonboard410c.c index 818ae04dfd..e923ddc2e2 100644 --- a/board/qualcomm/dragonboard410c/dragonboard410c.c +++ b/board/qualcomm/dragonboard410c/dragonboard410c.c @@ -19,10 +19,12 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + + return 0; } diff --git a/board/radxa/rock/Kconfig b/board/radxa/rock/Kconfig new file mode 100644 index 0000000000..855b9b6954 --- /dev/null +++ b/board/radxa/rock/Kconfig @@ -0,0 +1,15 @@ +if TARGET_ROCK + +config SYS_BOARD + default "rock" + +config SYS_VENDOR + default "radxa" + +config SYS_CONFIG_NAME + default "rock" + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + +endif diff --git a/board/radxa/rock/MAINTAINERS b/board/radxa/rock/MAINTAINERS new file mode 100644 index 0000000000..c5f59c0a6f --- /dev/null +++ b/board/radxa/rock/MAINTAINERS @@ -0,0 +1,6 @@ +RADXA_ROCK +M: Heiko Stuebner <heiko@sntech.de> +S: Maintained +F: board/radxa/rock +F: include/configs/rock.h +F: configs/rock_defconfig diff --git a/board/radxa/rock/Makefile b/board/radxa/rock/Makefile new file mode 100644 index 0000000000..fe94b60c35 --- /dev/null +++ b/board/radxa/rock/Makefile @@ -0,0 +1,7 @@ +# +# (C) Copyright 2015 Heiko Stuebner +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += rock.o diff --git a/board/radxa/rock/rock.c b/board/radxa/rock/rock.c new file mode 100644 index 0000000000..5119e95455 --- /dev/null +++ b/board/radxa/rock/rock.c @@ -0,0 +1,7 @@ +/* + * (C) Copyright 2015 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> diff --git a/board/rockchip/evb_rk3328/evb-rk3328.c b/board/rockchip/evb_rk3328/evb-rk3328.c index 7e70f381c9..a7895cb251 100644 --- a/board/rockchip/evb_rk3328/evb-rk3328.c +++ b/board/rockchip/evb_rk3328/evb-rk3328.c @@ -22,11 +22,13 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { /* Reserve 0x200000 for ATF bl31 */ gd->bd->bi_dram[0].start = 0x200000; gd->bd->bi_dram[0].size = 0x7e000000; + + return 0; } int usb_gadget_handle_interrupts(void) diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c index c437f1be0b..362fa0bc6e 100644 --- a/board/rockchip/evb_rk3399/evb-rk3399.c +++ b/board/rockchip/evb_rk3399/evb-rk3399.c @@ -67,9 +67,11 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { /* Reserve 0x200000 for ATF bl31 */ gd->bd->bi_dram[0].start = 0x200000; gd->bd->bi_dram[0].size = 0x7e000000; + + return 0; } diff --git a/board/ronetix/pm9261/pm9261.c b/board/ronetix/pm9261/pm9261.c index e2cb94ee13..79073d8aaa 100644 --- a/board/ronetix/pm9261/pm9261.c +++ b/board/ronetix/pm9261/pm9261.c @@ -264,10 +264,12 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM; gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; + + return 0; } #ifdef CONFIG_RESET_PHY_R diff --git a/board/ronetix/pm9263/pm9263.c b/board/ronetix/pm9263/pm9263.c index e9f9b67b77..accf16f151 100644 --- a/board/ronetix/pm9263/pm9263.c +++ b/board/ronetix/pm9263/pm9263.c @@ -360,10 +360,12 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM; gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; + + return 0; } #ifdef CONFIG_RESET_PHY_R diff --git a/board/ronetix/pm9g45/pm9g45.c b/board/ronetix/pm9g45/pm9g45.c index c2707e0015..c1225800a9 100644 --- a/board/ronetix/pm9g45/pm9g45.c +++ b/board/ronetix/pm9g45/pm9g45.c @@ -144,10 +144,12 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM; gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; + + return 0; } #ifdef CONFIG_RESET_PHY_R diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c index 881d080522..405ed3b923 100644 --- a/board/samsung/arndale/arndale.c +++ b/board/samsung/arndale/arndale.c @@ -55,7 +55,7 @@ int power_init_board(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { int i; u32 addr, size; @@ -67,6 +67,8 @@ void dram_init_banksize(void) gd->bd->bi_dram[i].start = addr; gd->bd->bi_dram[i].size = size; } + + return 0; } #ifdef CONFIG_GENERIC_MMC diff --git a/board/samsung/common/Makefile b/board/samsung/common/Makefile index ef1a8f318f..fa85f7dcd2 100644 --- a/board/samsung/common/Makefile +++ b/board/samsung/common/Makefile @@ -5,7 +5,6 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_SOFT_I2C_MULTI_BUS) += multi_i2c.o obj-$(CONFIG_USB_GADGET_DOWNLOAD) += gadget.o obj-$(CONFIG_MISC_COMMON) += misc.o diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c index ba928e0fa7..49e4db2de9 100644 --- a/board/samsung/common/board.c +++ b/board/samsung/common/board.c @@ -108,7 +108,7 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { unsigned int i; unsigned long addr, size; @@ -120,6 +120,8 @@ void dram_init_banksize(void) gd->bd->bi_dram[i].start = addr; gd->bd->bi_dram[i].size = size; } + + return 0; } static int board_uart_init(void) diff --git a/board/samsung/common/multi_i2c.c b/board/samsung/common/multi_i2c.c deleted file mode 100644 index 71c32c0b6e..0000000000 --- a/board/samsung/common/multi_i2c.c +++ /dev/null @@ -1,59 +0,0 @@ -/* - * Copyright (C) 2012 Samsung Electronics - * Lukasz Majewski <l.majewski@samsung.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <i2c.h> - -#ifndef CONFIG_SOFT_I2C_I2C10_SCL -#define CONFIG_SOFT_I2C_I2C10_SCL 0 -#endif - -#ifndef CONFIG_SOFT_I2C_I2C10_SDA -#define CONFIG_SOFT_I2C_I2C10_SDA 0 -#endif - -/* Handle multiple I2C buses instances */ -int get_multi_scl_pin(void) -{ - unsigned int bus = i2c_get_bus_num(); - - switch (bus) { - case I2C_0: - return CONFIG_SOFT_I2C_I2C5_SCL; - case I2C_1: - return CONFIG_SOFT_I2C_I2C9_SCL; - case I2C_2: - return CONFIG_SOFT_I2C_I2C10_SCL; - default: - printf("I2C_%d not supported!\n", bus); - }; - - return 0; -} - -int get_multi_sda_pin(void) -{ - unsigned int bus = i2c_get_bus_num(); - - switch (bus) { - case I2C_0: - return CONFIG_SOFT_I2C_I2C5_SDA; - case I2C_1: - return CONFIG_SOFT_I2C_I2C9_SDA; - case I2C_2: - return CONFIG_SOFT_I2C_I2C10_SDA; - default: - printf("I2C_%d not supported!\n", bus); - }; - - return 0; -} - -int multi_i2c_init(void) -{ - return 0; -} diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c index 9c48d71a67..35ed398df6 100644 --- a/board/samsung/goni/goni.c +++ b/board/samsung/goni/goni.c @@ -52,7 +52,7 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; @@ -60,6 +60,8 @@ void dram_init_banksize(void) gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; gd->bd->bi_dram[2].start = PHYS_SDRAM_3; gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE; + + return 0; } #ifdef CONFIG_DISPLAY_BOARDINFO diff --git a/board/samsung/smdkc100/smdkc100.c b/board/samsung/smdkc100/smdkc100.c index 66b6a9801f..79e127d99a 100644 --- a/board/samsung/smdkc100/smdkc100.c +++ b/board/samsung/smdkc100/smdkc100.c @@ -51,10 +51,12 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + + return 0; } #ifdef CONFIG_DISPLAY_BOARDINFO diff --git a/board/samsung/smdkv310/smdkv310.c b/board/samsung/smdkv310/smdkv310.c index fc0e8d252b..c730ac082b 100644 --- a/board/samsung/smdkv310/smdkv310.c +++ b/board/samsung/smdkv310/smdkv310.c @@ -52,7 +52,7 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, @@ -66,6 +66,8 @@ void dram_init_banksize(void) gd->bd->bi_dram[3].start = PHYS_SDRAM_4; gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE); + + return 0; } int board_eth_init(bd_t *bis) diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c index 7200c2ee0b..00059a1317 100644 --- a/board/samsung/trats/trats.c +++ b/board/samsung/trats/trats.c @@ -23,6 +23,7 @@ #include <power/max8997_muic.h> #include <power/battery.h> #include <power/max17042_fg.h> +#include <power/pmic.h> #include <libtizen.h> #include <usb.h> #include <usb_mass_storage.h> @@ -51,26 +52,6 @@ int exynos_init(void) return 0; } -void i2c_init_board(void) -{ -#ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */ - int err; - - /* I2C_5 -> PMIC */ - err = exynos_pinmux_config(PERIPH_ID_I2C5, PINMUX_FLAG_NONE); - if (err) { - debug("I2C%d not configured\n", (I2C_5)); - return; - } - - /* I2C_8 -> FG */ - gpio_request(EXYNOS4_GPIO_Y40, "i2c_clk"); - gpio_request(EXYNOS4_GPIO_Y41, "i2c_data"); - gpio_direction_output(EXYNOS4_GPIO_Y40, 1); - gpio_direction_output(EXYNOS4_GPIO_Y41, 1); -#endif -} - #ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */ static void trats_low_power_mode(void) { @@ -129,156 +110,6 @@ static void trats_low_power_mode(void) writel(0x0, &clk->gate_ip_image); /* IMAGE */ writel(0x0, &clk->gate_ip_gps); /* GPS */ } - -static int pmic_init_max8997(void) -{ - struct pmic *p = pmic_get("MAX8997_PMIC"); - int i = 0, ret = 0; - u32 val; - - if (pmic_probe(p)) - return -1; - - /* BUCK1 VARM: 1.2V */ - val = (1200000 - 650000) / 25000; - ret |= pmic_reg_write(p, MAX8997_REG_BUCK1DVS1, val); - val = ENBUCK | ACTIVE_DISCHARGE; /* DVS OFF */ - ret |= pmic_reg_write(p, MAX8997_REG_BUCK1CTRL, val); - - /* BUCK2 VINT: 1.1V */ - val = (1100000 - 650000) / 25000; - ret |= pmic_reg_write(p, MAX8997_REG_BUCK2DVS1, val); - val = ENBUCK | ACTIVE_DISCHARGE; /* DVS OFF */ - ret |= pmic_reg_write(p, MAX8997_REG_BUCK2CTRL, val); - - - /* BUCK3 G3D: 1.1V - OFF */ - ret |= pmic_reg_read(p, MAX8997_REG_BUCK3CTRL, &val); - val &= ~ENBUCK; - ret |= pmic_reg_write(p, MAX8997_REG_BUCK3CTRL, val); - - val = (1100000 - 750000) / 50000; - ret |= pmic_reg_write(p, MAX8997_REG_BUCK3DVS, val); - - /* BUCK4 CAMISP: 1.2V - OFF */ - ret |= pmic_reg_read(p, MAX8997_REG_BUCK4CTRL, &val); - val &= ~ENBUCK; - ret |= pmic_reg_write(p, MAX8997_REG_BUCK4CTRL, val); - - val = (1200000 - 650000) / 25000; - ret |= pmic_reg_write(p, MAX8997_REG_BUCK4DVS, val); - - /* BUCK5 VMEM: 1.2V */ - val = (1200000 - 650000) / 25000; - for (i = 0; i < 8; i++) - ret |= pmic_reg_write(p, MAX8997_REG_BUCK5DVS1 + i, val); - - val = ENBUCK | ACTIVE_DISCHARGE; /* DVS OFF */ - ret |= pmic_reg_write(p, MAX8997_REG_BUCK5CTRL, val); - - /* BUCK6 CAM AF: 2.8V */ - /* No Voltage Setting Register */ - /* GNSLCT 3.0X */ - val = GNSLCT; - ret |= pmic_reg_write(p, MAX8997_REG_BUCK6CTRL, val); - - /* BUCK7 VCC_SUB: 2.0V */ - val = (2000000 - 750000) / 50000; - ret |= pmic_reg_write(p, MAX8997_REG_BUCK7DVS, val); - - /* LDO1 VADC: 3.3V */ - val = max8997_reg_ldo(3300000) | DIS_LDO; /* OFF */ - ret |= pmic_reg_write(p, MAX8997_REG_LDO1CTRL, val); - - /* LDO1 Disable active discharging */ - ret |= pmic_reg_read(p, MAX8997_REG_LDO1CONFIG, &val); - val &= ~LDO_ADE; - ret |= pmic_reg_write(p, MAX8997_REG_LDO1CONFIG, val); - - /* LDO2 VALIVE: 1.1V */ - val = max8997_reg_ldo(1100000) | EN_LDO; - ret |= pmic_reg_write(p, MAX8997_REG_LDO2CTRL, val); - - /* LDO3 VUSB/MIPI: 1.1V */ - val = max8997_reg_ldo(1100000) | DIS_LDO; /* OFF */ - ret |= pmic_reg_write(p, MAX8997_REG_LDO3CTRL, val); - - /* LDO4 VMIPI: 1.8V */ - val = max8997_reg_ldo(1800000) | DIS_LDO; /* OFF */ - ret |= pmic_reg_write(p, MAX8997_REG_LDO4CTRL, val); - - /* LDO5 VHSIC: 1.2V */ - val = max8997_reg_ldo(1200000) | DIS_LDO; /* OFF */ - ret |= pmic_reg_write(p, MAX8997_REG_LDO5CTRL, val); - - /* LDO6 VCC_1.8V_PDA: 1.8V */ - val = max8997_reg_ldo(1800000) | EN_LDO; - ret |= pmic_reg_write(p, MAX8997_REG_LDO6CTRL, val); - - /* LDO7 CAM_ISP: 1.8V */ - val = max8997_reg_ldo(1800000) | DIS_LDO; /* OFF */ - ret |= pmic_reg_write(p, MAX8997_REG_LDO7CTRL, val); - - /* LDO8 VDAC/VUSB: 3.3V */ - val = max8997_reg_ldo(3300000) | DIS_LDO; /* OFF */ - ret |= pmic_reg_write(p, MAX8997_REG_LDO8CTRL, val); - - /* LDO9 VCC_2.8V_PDA: 2.8V */ - val = max8997_reg_ldo(2800000) | EN_LDO; - ret |= pmic_reg_write(p, MAX8997_REG_LDO9CTRL, val); - - /* LDO10 VPLL: 1.1V */ - val = max8997_reg_ldo(1100000) | EN_LDO; - ret |= pmic_reg_write(p, MAX8997_REG_LDO10CTRL, val); - - /* LDO11 TOUCH: 2.8V */ - val = max8997_reg_ldo(2800000) | DIS_LDO; /* OFF */ - ret |= pmic_reg_write(p, MAX8997_REG_LDO11CTRL, val); - - /* LDO12 VTCAM: 1.8V */ - val = max8997_reg_ldo(1800000) | DIS_LDO; /* OFF */ - ret |= pmic_reg_write(p, MAX8997_REG_LDO12CTRL, val); - - /* LDO13 VCC_3.0_LCD: 3.0V */ - val = max8997_reg_ldo(3000000) | DIS_LDO; /* OFF */ - ret |= pmic_reg_write(p, MAX8997_REG_LDO13CTRL, val); - - /* LDO14 MOTOR: 3.0V */ - val = max8997_reg_ldo(3000000) | DIS_LDO; /* OFF */ - ret |= pmic_reg_write(p, MAX8997_REG_LDO14CTRL, val); - - /* LDO15 LED_A: 2.8V */ - val = max8997_reg_ldo(2800000) | DIS_LDO; /* OFF */ - ret |= pmic_reg_write(p, MAX8997_REG_LDO15CTRL, val); - - /* LDO16 CAM_SENSOR: 1.8V */ - val = max8997_reg_ldo(1800000) | DIS_LDO; /* OFF */ - ret |= pmic_reg_write(p, MAX8997_REG_LDO16CTRL, val); - - /* LDO17 VTF: 2.8V */ - val = max8997_reg_ldo(2800000) | DIS_LDO; /* OFF */ - ret |= pmic_reg_write(p, MAX8997_REG_LDO17CTRL, val); - - /* LDO18 TOUCH_LED 3.3V */ - val = max8997_reg_ldo(3300000) | DIS_LDO; /* OFF */ - ret |= pmic_reg_write(p, MAX8997_REG_LDO18CTRL, val); - - /* LDO21 VDDQ: 1.2V */ - val = max8997_reg_ldo(1200000) | EN_LDO; - ret |= pmic_reg_write(p, MAX8997_REG_LDO21CTRL, val); - - /* SAFEOUT for both 1 and 2: 4.9V, Active discharge, Enable */ - val = (SAFEOUT_4_90V << 0) | (SAFEOUT_4_90V << 2) | - ACTDISSAFEO1 | ACTDISSAFEO2 | ENSAFEOUT1 | ENSAFEOUT2; - ret |= pmic_reg_write(p, MAX8997_REG_SAFEOUTCTRL, val); - - if (ret) { - puts("MAX8997 PMIC setting error!\n"); - return -1; - } - - return 0; -} #endif int exynos_power_init(void) @@ -295,9 +126,7 @@ int exynos_power_init(void) * The FUEL_GAUGE is marked as I2C9 on the schematic, but connected * to logical I2C adapter 1 */ - ret = pmic_init(I2C_5); - ret |= pmic_init_max8997(); - ret |= power_fg_init(I2C_9); + ret = power_fg_init(I2C_9); ret |= power_muic_init(I2C_5); ret |= power_bat_init(0); if (ret) @@ -391,39 +220,59 @@ static void check_hw_revision(void) #ifdef CONFIG_USB_GADGET static int s5pc210_phy_control(int on) { -#ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */ - int ret = 0; - u32 val = 0; - struct pmic *p = pmic_get("MAX8997_PMIC"); - if (!p) - return -ENODEV; + struct udevice *dev; + int reg, ret; - if (pmic_probe(p)) - return -1; + ret = pmic_get("max8997-pmic", &dev); + if (ret) + return ret; if (on) { - ret |= pmic_set_output(p, MAX8997_REG_SAFEOUTCTRL, - ENSAFEOUT1, LDO_ON); - ret |= pmic_reg_read(p, MAX8997_REG_LDO3CTRL, &val); - ret |= pmic_reg_write(p, MAX8997_REG_LDO3CTRL, EN_LDO | val); - - ret |= pmic_reg_read(p, MAX8997_REG_LDO8CTRL, &val); - ret |= pmic_reg_write(p, MAX8997_REG_LDO8CTRL, EN_LDO | val); + reg = pmic_reg_read(dev, MAX8997_REG_SAFEOUTCTRL); + reg |= ENSAFEOUT1; + ret = pmic_reg_write(dev, MAX8997_REG_SAFEOUTCTRL, reg); + if (ret) { + puts("MAX8997 setting error!\n"); + return ret; + } + reg = pmic_reg_read(dev, MAX8997_REG_LDO3CTRL); + reg |= EN_LDO; + ret = pmic_reg_write(dev, MAX8997_REG_LDO3CTRL, reg); + if (ret) { + puts("MAX8997 setting error!\n"); + return ret; + } + reg = pmic_reg_read(dev, MAX8997_REG_LDO8CTRL); + reg |= EN_LDO; + ret = pmic_reg_write(dev, MAX8997_REG_LDO8CTRL, reg); + if (ret) { + puts("MAX8997 setting error!\n"); + return ret; + } } else { - ret |= pmic_reg_read(p, MAX8997_REG_LDO8CTRL, &val); - ret |= pmic_reg_write(p, MAX8997_REG_LDO8CTRL, DIS_LDO | val); - - ret |= pmic_reg_read(p, MAX8997_REG_LDO3CTRL, &val); - ret |= pmic_reg_write(p, MAX8997_REG_LDO3CTRL, DIS_LDO | val); - ret |= pmic_set_output(p, MAX8997_REG_SAFEOUTCTRL, - ENSAFEOUT1, LDO_OFF); - } + reg = pmic_reg_read(dev, MAX8997_REG_LDO8CTRL); + reg &= DIS_LDO; + ret = pmic_reg_write(dev, MAX8997_REG_LDO8CTRL, reg); + if (ret) { + puts("MAX8997 setting error!\n"); + return ret; + } + reg = pmic_reg_read(dev, MAX8997_REG_LDO3CTRL); + reg &= DIS_LDO; + ret = pmic_reg_write(dev, MAX8997_REG_LDO3CTRL, reg); + if (ret) { + puts("MAX8997 setting error!\n"); + return ret; + } + reg = pmic_reg_read(dev, MAX8997_REG_SAFEOUTCTRL); + reg &= ~ENSAFEOUT1; + ret = pmic_reg_write(dev, MAX8997_REG_SAFEOUTCTRL, reg); + if (ret) { + puts("MAX8997 setting error!\n"); + return ret; + } - if (ret) { - puts("MAX8997 LDO setting error!\n"); - return -1; } -#endif return 0; } diff --git a/board/samsung/trats2/trats2.c b/board/samsung/trats2/trats2.c index 150503ec15..f9acbd3571 100644 --- a/board/samsung/trats2/trats2.c +++ b/board/samsung/trats2/trats2.c @@ -100,50 +100,6 @@ static void board_external_gpio_init(void) gpio_set_pull(EXYNOS4X12_GPIO_X37, S5P_GPIO_PULL_NONE); /* HDMI_HPD */ } -#ifdef CONFIG_SYS_I2C_INIT_BOARD -static void board_init_i2c(void) -{ - int err; - - /* I2C_7 */ - err = exynos_pinmux_config(PERIPH_ID_I2C7, PINMUX_FLAG_NONE); - if (err) { - debug("I2C%d not configured\n", (I2C_7)); - return; - } - - /* I2C_8 */ - gpio_request(EXYNOS4X12_GPIO_F14, "i2c8_clk"); - gpio_request(EXYNOS4X12_GPIO_F15, "i2c8_data"); - gpio_direction_output(EXYNOS4X12_GPIO_F14, 1); - gpio_direction_output(EXYNOS4X12_GPIO_F15, 1); - - /* I2C_9 */ - gpio_request(EXYNOS4X12_GPIO_M21, "i2c9_clk"); - gpio_request(EXYNOS4X12_GPIO_M20, "i2c9_data"); - gpio_direction_output(EXYNOS4X12_GPIO_M21, 1); - gpio_direction_output(EXYNOS4X12_GPIO_M20, 1); -} -#endif - -#ifdef CONFIG_SYS_I2C_SOFT -int get_soft_i2c_scl_pin(void) -{ - if (I2C_ADAP_HWNR) - return EXYNOS4X12_GPIO_M21; /* I2C9 */ - else - return EXYNOS4X12_GPIO_F14; /* I2C8 */ -} - -int get_soft_i2c_sda_pin(void) -{ - if (I2C_ADAP_HWNR) - return EXYNOS4X12_GPIO_M20; /* I2C9 */ - else - return EXYNOS4X12_GPIO_F15; /* I2C8 */ -} -#endif - int exynos_early_init_f(void) { board_external_gpio_init(); @@ -179,11 +135,6 @@ int exynos_power_init(void) struct power_battery *pb; struct pmic *p_chrg, *p_muic, *p_fg, *p_bat; -#ifdef CONFIG_SYS_I2C_INIT_BOARD - board_init_i2c(); -#endif - pmic_init(I2C_7); /* I2C adapter 7 - bus name s3c24x0_7 */ - pmic_init_max77686(); pmic_init_max77693(I2C_10); /* I2C adapter 10 - bus name soft1 */ power_muic_init(I2C_10); /* I2C adapter 10 - bus name soft1 */ power_fg_init(I2C_9); /* I2C adapter 9 - bus name soft0 */ @@ -331,61 +282,6 @@ int g_dnl_board_usb_cable_connected(void) } #endif -#ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */ -static int pmic_init_max77686(void) -{ - struct pmic *p = pmic_get("MAX77686_PMIC"); - - if (pmic_probe(p)) - return -1; - - /* BUCK/LDO Output Voltage */ - max77686_set_ldo_voltage(p, 21, 2800000); /* LDO21 VTF_2.8V */ - max77686_set_ldo_voltage(p, 23, 3300000); /* LDO23 TSP_AVDD_3.3V*/ - max77686_set_ldo_voltage(p, 24, 1800000); /* LDO24 TSP_VDD_1.8V */ - - /* BUCK/LDO Output Mode */ - max77686_set_buck_mode(p, 1, OPMODE_STANDBY); /* BUCK1 VMIF_1.1V_AP */ - max77686_set_buck_mode(p, 2, OPMODE_ON); /* BUCK2 VARM_1.0V_AP */ - max77686_set_buck_mode(p, 3, OPMODE_ON); /* BUCK3 VINT_1.0V_AP */ - max77686_set_buck_mode(p, 4, OPMODE_ON); /* BUCK4 VG3D_1.0V_AP */ - max77686_set_buck_mode(p, 5, OPMODE_ON); /* BUCK5 VMEM_1.2V_AP */ - max77686_set_buck_mode(p, 6, OPMODE_ON); /* BUCK6 VCC_SUB_1.35V*/ - max77686_set_buck_mode(p, 7, OPMODE_ON); /* BUCK7 VCC_SUB_2.0V */ - max77686_set_buck_mode(p, 8, OPMODE_OFF); /* VMEM_VDDF_2.85V */ - max77686_set_buck_mode(p, 9, OPMODE_OFF); /* CAM_ISP_CORE_1.2V*/ - - max77686_set_ldo_mode(p, 1, OPMODE_LPM); /* LDO1 VALIVE_1.0V_AP*/ - max77686_set_ldo_mode(p, 2, OPMODE_STANDBY); /* LDO2 VM1M2_1.2V_AP */ - max77686_set_ldo_mode(p, 3, OPMODE_LPM); /* LDO3 VCC_1.8V_AP */ - max77686_set_ldo_mode(p, 4, OPMODE_LPM); /* LDO4 VCC_2.8V_AP */ - max77686_set_ldo_mode(p, 5, OPMODE_OFF); /* LDO5_VCC_1.8V_IO */ - max77686_set_ldo_mode(p, 6, OPMODE_STANDBY); /* LDO6 VMPLL_1.0V_AP */ - max77686_set_ldo_mode(p, 7, OPMODE_STANDBY); /* LDO7 VPLL_1.0V_AP */ - max77686_set_ldo_mode(p, 8, OPMODE_LPM); /* LDO8 VMIPI_1.0V_AP */ - max77686_set_ldo_mode(p, 9, OPMODE_OFF); /* CAM_ISP_MIPI_1.2*/ - max77686_set_ldo_mode(p, 10, OPMODE_LPM); /* LDO10 VMIPI_1.8V_AP*/ - max77686_set_ldo_mode(p, 11, OPMODE_STANDBY); /* LDO11 VABB1_1.8V_AP*/ - max77686_set_ldo_mode(p, 12, OPMODE_LPM); /* LDO12 VUOTG_3.0V_AP*/ - max77686_set_ldo_mode(p, 13, OPMODE_OFF); /* LDO13 VC2C_1.8V_AP */ - max77686_set_ldo_mode(p, 14, OPMODE_STANDBY); /* VABB02_1.8V_AP */ - max77686_set_ldo_mode(p, 15, OPMODE_STANDBY); /* LDO15 VHSIC_1.0V_AP*/ - max77686_set_ldo_mode(p, 16, OPMODE_STANDBY); /* LDO16 VHSIC_1.8V_AP*/ - max77686_set_ldo_mode(p, 17, OPMODE_OFF); /* CAM_SENSOR_CORE_1.2*/ - max77686_set_ldo_mode(p, 18, OPMODE_OFF); /* CAM_ISP_SEN_IO_1.8V*/ - max77686_set_ldo_mode(p, 19, OPMODE_OFF); /* LDO19 VT_CAM_1.8V */ - max77686_set_ldo_mode(p, 20, OPMODE_ON); /* LDO20 VDDQ_PRE_1.8V*/ - max77686_set_ldo_mode(p, 21, OPMODE_OFF); /* LDO21 VTF_2.8V */ - max77686_set_ldo_mode(p, 22, OPMODE_OFF); /* LDO22 VMEM_VDD_2.8V*/ - max77686_set_ldo_mode(p, 23, OPMODE_OFF); /* LDO23 TSP_AVDD_3.3V*/ - max77686_set_ldo_mode(p, 24, OPMODE_OFF); /* LDO24 TSP_VDD_1.8V */ - max77686_set_ldo_mode(p, 25, OPMODE_OFF); /* LDO25 VCC_3.3V_LCD */ - max77686_set_ldo_mode(p, 26, OPMODE_OFF); /*LDO26 VCC_3.0V_MOTOR*/ - - return 0; -} -#endif - /* * LCD */ diff --git a/board/sbc8349/sbc8349.c b/board/sbc8349/sbc8349.c index 72786d2ace..a3395ed680 100644 --- a/board/sbc8349/sbc8349.c +++ b/board/sbc8349/sbc8349.c @@ -19,6 +19,8 @@ #include <libfdt.h> #endif +DECLARE_GLOBAL_DATA_PTR; + int fixed_sdram(void); void sdram_init(void); @@ -35,7 +37,7 @@ int board_early_init_f (void) #define ns2clk(ns) (ns / (1000000000 / CONFIG_8349_CLKIN) + 1) -phys_size_t initdram (int board_type) +int dram_init(void) { volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; u32 msize = 0; @@ -61,8 +63,10 @@ phys_size_t initdram (int board_type) */ ddr_enable_ecc(msize * 1024 * 1024); #endif - /* return total bus SDRAM size(bytes) -- DDR */ - return (msize * 1024 * 1024); + /* set total bus SDRAM size(bytes) -- DDR */ + gd->ram_size = msize * 1024 * 1024; + + return 0; } #if !defined(CONFIG_SPD_EEPROM) diff --git a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c index 6bdf1a28e9..08ced102b6 100644 --- a/board/sbc8641d/sbc8641d.c +++ b/board/sbc8641d/sbc8641d.c @@ -23,6 +23,8 @@ #include <libfdt.h> #include <fdt_support.h> +DECLARE_GLOBAL_DATA_PTR; + long int fixed_sdram (void); int board_early_init_f (void) @@ -37,7 +39,7 @@ int checkboard (void) return 0; } -phys_size_t initdram (int board_type) +int dram_init(void) { long dram_size = 0; @@ -48,7 +50,9 @@ phys_size_t initdram (int board_type) #endif debug (" DDR: "); - return dram_size; + gd->ram_size = dram_size; + + return 0; } #if defined(CONFIG_SYS_DRAM_TEST) diff --git a/board/spear/common/spr_misc.c b/board/spear/common/spr_misc.c index bc92cd6f49..d6a84dba60 100644 --- a/board/spear/common/spr_misc.c +++ b/board/spear/common/spr_misc.c @@ -33,10 +33,12 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = gd->ram_size; + + return 0; } int board_early_init_f() diff --git a/board/st/stih410-b2260/board.c b/board/st/stih410-b2260/board.c index 0c06bcaa61..92b0695593 100644 --- a/board/st/stih410-b2260/board.c +++ b/board/st/stih410-b2260/board.c @@ -16,11 +16,21 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + + return 0; +} + +#ifndef CONFIG_SYS_DCACHE_OFF +void enable_caches(void) +{ + /* Enable D-cache. I-cache is already enabled in start.S */ + dcache_enable(); } +#endif int board_init(void) { diff --git a/board/st/stv0991/stv0991.c b/board/st/stv0991/stv0991.c index add1ce1a79..6a19730069 100644 --- a/board/st/stv0991/stv0991.c +++ b/board/st/stv0991/stv0991.c @@ -93,10 +93,12 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + + return 0; } #ifdef CONFIG_CMD_NET diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 37b42521a4..a667c9e5c5 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -3,6 +3,7 @@ if ARCH_SUNXI config IDENT_STRING default " Allwinner Technology" +# FIXME: Should not redefine these Kconfig symbols config PRE_CONSOLE_BUFFER default y @@ -19,6 +20,7 @@ config SPL_LIBGENERIC_SUPPORT default y config SPL_MMC_SUPPORT + depends on SPL && GENERIC_MMC default y config SPL_POWER_SUPPORT @@ -27,6 +29,17 @@ config SPL_POWER_SUPPORT config SPL_SERIAL_SUPPORT default y +config SUNXI_HIGH_SRAM + bool + default n + ---help--- + Older Allwinner SoCs have their mask boot ROM mapped just below 4GB, + with the first SRAM region being located at address 0. + Some newer SoCs map the boot ROM at address 0 instead and move the + SRAM to 64KB, just behind the mask ROM. + Chips using the latter setup are supposed to select this option to + adjust the addresses accordingly. + # Note only one of these may be selected at a time! But hidden choices are # not supported by Kconfig config SUNXI_GEN_SUN4I @@ -43,6 +56,11 @@ config SUNXI_GEN_SUN6I watchdog, etc. +config MACH_SUNXI_H3_H5 + bool + select SUNXI_GEN_SUN6I + select SUPPORT_SPL + choice prompt "Sunxi SoC Variant" optional @@ -50,12 +68,14 @@ choice config MACH_SUN4I bool "sun4i (Allwinner A10)" select CPU_V7 + select ARM_CORTEX_CPU_IS_UP select SUNXI_GEN_SUN4I select SUPPORT_SPL config MACH_SUN5I bool "sun5i (Allwinner A13)" select CPU_V7 + select ARM_CORTEX_CPU_IS_UP select SUNXI_GEN_SUN4I select SUPPORT_SPL @@ -111,13 +131,13 @@ config MACH_SUN8I_H3 select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT select ARCH_SUPPORT_PSCI - select SUNXI_GEN_SUN6I - select SUPPORT_SPL + select MACH_SUNXI_H3_H5 select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT config MACH_SUN9I bool "sun9i (Allwinner A80)" select CPU_V7 + select SUNXI_HIGH_SRAM select SUNXI_GEN_SUN6I select SUPPORT_SPL @@ -125,14 +145,21 @@ config MACH_SUN50I bool "sun50i (Allwinner A64)" select ARM64 select SUNXI_GEN_SUN6I + select SUNXI_HIGH_SRAM select SUPPORT_SPL +config MACH_SUN50I_H5 + bool "sun50i (Allwinner H5)" + select ARM64 + select MACH_SUNXI_H3_H5 + select SUNXI_HIGH_SRAM + endchoice # The sun8i SoCs share a lot, this helps to avoid a lot of "if A23 || A33" config MACH_SUN8I bool - default y if MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUN8I_H3 || MACH_SUN8I_A83T + default y if MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUNXI_H3_H5 || MACH_SUN8I_A83T config RESERVE_ALLWINNER_BOOT0_HEADER bool "reserve space for Allwinner boot0 header" @@ -320,7 +347,7 @@ config OLD_SUNXI_KERNEL_COMPAT config MMC0_CD_PIN string "Card detect pin for mmc0" - default "PF6" if MACH_SUN8I_A83T || MACH_SUN8I_H3 || MACH_SUN50I + default "PF6" if MACH_SUN8I_A83T || MACH_SUNXI_H3_H5 || MACH_SUN50I default "" ---help--- Set the card detect pin for mmc0, leave empty to not use cd. This @@ -485,7 +512,7 @@ config AXP_GPIO config VIDEO bool "Enable graphical uboot console on HDMI, LCD or VGA" - depends on !MACH_SUN8I_A83T && !MACH_SUN8I_H3 && !MACH_SUN9I && !MACH_SUN50I + depends on !MACH_SUN8I_A83T && !MACH_SUNXI_H3_H5 && !MACH_SUN9I && !MACH_SUN50I default y ---help--- Say Y here to add support for using a cfb console on the HDMI, LCD diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 2321b8b08f..91ca6eaf7a 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -242,6 +242,11 @@ M: Icenowy Zheng <icenowy@aosc.xyz> S: Maintained F: configs/orangepi_zero_defconfig +ORANGEPI PC 2 BOARD +M: Andre Przywara <andre.przywara@arm.com> +S: Maintained +F: configs/orangepi_pc2_defconfig + R16 EVB PARROT BOARD M: Quentin Schulz <quentin.schulz@free-electrons.com> S: Maintained @@ -264,6 +269,12 @@ M: VishnuPatekar <vishnupatekar0510@gmail.com> S: Maintained F: configs/Sinovoip_BPI_M3_defconfig +SUNCHIP CX-A99 BOARD +M: Rask Ingemann Lambertsen <rask@formelder.dk> +S: Maintained +F: configs/Sunchip_CX-A99_defconfig +W: https://linux-sunxi.org/Sunchip_CX-A99 + WEXLER-TAB7200 BOARD M: Aleksei Mamlin <mamlinav@gmail.com> S: Maintained diff --git a/board/sunxi/README.nand b/board/sunxi/README.nand new file mode 100644 index 0000000000..a5d4ff0e90 --- /dev/null +++ b/board/sunxi/README.nand @@ -0,0 +1,54 @@ +Allwinner NAND flashing +======================= + +A lot of Allwinner devices, especially the older ones (pre-H3 era), +comes with a NAND. NANDs storages are a pretty weak choice when it +comes to the reliability, and it comes with a number of flaws like +read and write disturbs, data retention issues, bloks becoming +unusable, etc. + +In order to mitigate that, various strategies have been found to be +able to recover from those issues like ECC, hardware randomization, +and of course, redundancy for the critical parts. + +This is obviously something that we will take into account when +creating our images. However, the BROM will use a quite weird pattern +when accessing the NAND, and will access only at most 4kB per page, +which means that we also have to split that binary accross several +pages. + +In order to accomodate that, we create a tool that will generate an +SPL image that is ready to be programmed directly embedding the ECCs, +randomized, and with the necessary bits needed to reduce the number of +bitflips. The U-Boot build system, when configured for the NAND will +also generate the image sunxi-spl-with-ecc.bin that will have been +generated by that tool. + +In order to flash your U-Boot image onto a board, assuming that the +board is in FEL mode, you'll need the sunxi-tools that you can find at +this repository: https://github.com/linux-sunxi/sunxi-tools + +Then, you'll need to first load an SPL to initialise the RAM: +sunxi-fel spl spl/sunxi-spl.bin + +Load the binaries we'll flash into RAM: +sunxi-fel write 0x4a000000 u-boot-dtb.bin +sunxi-fel write 0x43000000 spl/sunxi-spl-with-ecc.bin + +And execute U-Boot +sunxi-fel exe 0x4a000000 + +On your board, you'll now have all the needed binaries into RAM, so +you only need to erase the NAND... + +nand erase.chip + +Then write the SPL and its backup: + +nand write.raw.noverify 0x43000000 0 40 +nand write.raw.noverify 0x43000000 0x400000 40 + +And finally write the U-Boot binary: +nand write 0x4a000000 0x800000 0xc0000 + +You can now reboot and enjoy your NAND.
\ No newline at end of file diff --git a/board/sunxi/board.c b/board/sunxi/board.c index 53656383d5..b9660128e5 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -100,14 +100,14 @@ int board_init(void) * we avoid the risk of writing to it. */ asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r"(freq)); - if (freq != CONFIG_TIMER_CLK_FREQ) { + if (freq != COUNTER_FREQUENCY) { debug("arch timer frequency is %d Hz, should be %d, fixing ...\n", - freq, CONFIG_TIMER_CLK_FREQ); + freq, COUNTER_FREQUENCY); #ifdef CONFIG_NON_SECURE printf("arch timer frequency is wrong, but cannot adjust it\n"); #else asm volatile("mcr p15, 0, %0, c14, c0, 0" - : : "r"(CONFIG_TIMER_CLK_FREQ)); + : : "r"(COUNTER_FREQUENCY)); #endif } } diff --git a/board/synopsys/axs10x/Kconfig b/board/synopsys/axs10x/Kconfig index c60b6a2047..dd1305adc7 100644 --- a/board/synopsys/axs10x/Kconfig +++ b/board/synopsys/axs10x/Kconfig @@ -1,4 +1,4 @@ -if TARGET_AXS10X +if TARGET_AXS101 || TARGET_AXS103 config SYS_BOARD default "axs10x" diff --git a/board/synopsys/axs10x/axs10x.c b/board/synopsys/axs10x/axs10x.c index a5e774b2cf..e6b69da3da 100644 --- a/board/synopsys/axs10x/axs10x.c +++ b/board/synopsys/axs10x/axs10x.c @@ -7,6 +7,7 @@ #include <common.h> #include <dwmmc.h> #include <malloc.h> +#include <asm/arcregs.h> #include "axs10x.h" DECLARE_GLOBAL_DATA_PTR; @@ -61,16 +62,32 @@ void smp_kick_all_cpus(void) { /* CPU start CREG */ #define AXC003_CREG_CPU_START 0xF0001400 - /* Bits positions in CPU start CREG */ #define BITS_START 0 -#define BITS_POLARITY 8 +#define BITS_START_MODE 4 #define BITS_CORE_SEL 9 -#define BITS_MULTICORE 12 -#define CMD (1 << BITS_MULTICORE) | (1 << BITS_CORE_SEL) | \ - (1 << BITS_POLARITY) | (1 << BITS_START) +/* + * In axs103 v1.1 START bits semantics has changed quite a bit. + * We used to have a generic START bit for all cores selected by CORE_SEL mask. + * But now we don't touch CORE_SEL at all because we have a dedicated START bit + * for each core: + * bit 0: Core 0 (master) + * bit 1: Core 1 (slave) + */ +#define BITS_START_CORE1 1 + +#define ARCVER_HS38_3_0 0x53 + + int core_family = read_aux_reg(ARC_AUX_IDENTITY) & 0xff; + int cmd = readl((void __iomem *)AXC003_CREG_CPU_START); - writel(CMD, (void __iomem *)AXC003_CREG_CPU_START); + if (core_family < ARCVER_HS38_3_0) { + cmd |= (1 << BITS_CORE_SEL) | (1 << BITS_START); + cmd &= ~(1 << BITS_START_MODE); + } else { + cmd |= (1 << BITS_START_CORE1); + } + writel(cmd, (void __iomem *)AXC003_CREG_CPU_START); } #endif diff --git a/board/sysam/amcore/amcore.c b/board/sysam/amcore/amcore.c index 77b5000de6..3bfe511a98 100644 --- a/board/sysam/amcore/amcore.c +++ b/board/sysam/amcore/amcore.c @@ -14,6 +14,8 @@ #include <dm.h> #include <dm/platform_data/serial_coldfire.h> +DECLARE_GLOBAL_DATA_PTR; + void init_lcd(void) { /* setup for possible K0108 lcd connected on the parallel port */ @@ -38,7 +40,7 @@ int checkboard(void) } /* - * in initdram we are here executing from flash + * in dram_init we are here executing from flash * case 1: * is with no ACR/flash cache enabled * nop = 40ns (scope measured) @@ -49,7 +51,7 @@ void fudelay(int usec) asm volatile ("nop"); } -phys_size_t initdram(int board_type) +int dram_init(void) { u32 dramsize, RC; @@ -99,7 +101,10 @@ phys_size_t initdram(int board_type) out_be32(&dc->dacr0, 0x0000b344); out_be32((u32 *)0x00000c00, 0xbeaddeed); - return get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_SDRAM_SIZE); + gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, + CONFIG_SYS_SDRAM_SIZE); + + return 0; } static struct coldfire_serial_platdata mcf5307_serial_plat = { diff --git a/board/tcm-bf518/Kconfig b/board/tcm-bf518/Kconfig deleted file mode 100644 index 558c2fe495..0000000000 --- a/board/tcm-bf518/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_TCM_BF518 - -config SYS_BOARD - default "tcm-bf518" - -config SYS_CONFIG_NAME - default "tcm-bf518" - -endif diff --git a/board/tcm-bf518/MAINTAINERS b/board/tcm-bf518/MAINTAINERS deleted file mode 100644 index 169012269f..0000000000 --- a/board/tcm-bf518/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -TCM-BF518 BOARD -#M: Bluetechnix Tinyboards <bluetechnix@blackfin.uclinux.org> -S: Orphan (since 2014-03) -F: board/tcm-bf518/ -F: include/configs/tcm-bf518.h -F: configs/tcm-bf518_defconfig diff --git a/board/tcm-bf518/Makefile b/board/tcm-bf518/Makefile deleted file mode 100644 index 1ce8f64a08..0000000000 --- a/board/tcm-bf518/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := tcm-bf518.o diff --git a/board/tcm-bf518/tcm-bf518.c b/board/tcm-bf518/tcm-bf518.c deleted file mode 100644 index 7923eae5d5..0000000000 --- a/board/tcm-bf518/tcm-bf518.c +++ /dev/null @@ -1,37 +0,0 @@ -/* - * U-Boot - main board file - * - * Copyright (c) 2008-2009 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <config.h> -#include <net.h> -#include <netdev.h> -#include <asm/blackfin.h> -#include <asm/mach-common/bits/otp.h> -#include <asm/sdh.h> - -int checkboard(void) -{ - printf("Board: Bluetechnix TCM-BF518 board\n"); - printf(" Support: http://www.bluetechnix.com/\n"); - printf(" http://blackfin.uclinux.org/\n"); - return 0; -} - -#if defined(CONFIG_BFIN_MAC) -int board_eth_init(bd_t *bis) -{ - return bfin_EMAC_initialize(bis); -} -#endif - -#ifdef CONFIG_BFIN_SDH -int board_mmc_init(bd_t *bis) -{ - return bfin_mmc_init(bis); -} -#endif diff --git a/board/tcm-bf537/Kconfig b/board/tcm-bf537/Kconfig deleted file mode 100644 index e0127c641e..0000000000 --- a/board/tcm-bf537/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -if TARGET_TCM_BF537 - -config SYS_BOARD - default "tcm-bf537" - -config SYS_CONFIG_NAME - default "tcm-bf537" - -endif diff --git a/board/tcm-bf537/MAINTAINERS b/board/tcm-bf537/MAINTAINERS deleted file mode 100644 index 1cd48451df..0000000000 --- a/board/tcm-bf537/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -TCM-BF537 BOARD -#M: Bluetechnix Tinyboards <bluetechnix@blackfin.uclinux.org> -S: Orphan (since 2014-03) -F: board/tcm-bf537/ -F: include/configs/tcm-bf537.h -F: configs/tcm-bf537_defconfig diff --git a/board/tcm-bf537/Makefile b/board/tcm-bf537/Makefile deleted file mode 100644 index 0fe25e80dc..0000000000 --- a/board/tcm-bf537/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -# -# U-Boot - Makefile -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := tcm-bf537.o gpio_cfi_flash.o diff --git a/board/tcm-bf537/config.mk b/board/tcm-bf537/config.mk deleted file mode 100644 index 7f9138b09b..0000000000 --- a/board/tcm-bf537/config.mk +++ /dev/null @@ -1,11 +0,0 @@ -# -# Copyright (c) 2005-2008 Analog Device Inc. -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -# Set some default LDR flags based on boot mode. -LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8 diff --git a/board/tcm-bf537/gpio_cfi_flash.c b/board/tcm-bf537/gpio_cfi_flash.c deleted file mode 100644 index c4fef9f5e7..0000000000 --- a/board/tcm-bf537/gpio_cfi_flash.c +++ /dev/null @@ -1,3 +0,0 @@ -#define GPIO_PIN_1 GPIO_PF4 -#define GPIO_PIN_2 GPIO_PF5 -#include "../cm-bf537e/gpio_cfi_flash.c" diff --git a/board/tcm-bf537/tcm-bf537.c b/board/tcm-bf537/tcm-bf537.c deleted file mode 100644 index 19df51adab..0000000000 --- a/board/tcm-bf537/tcm-bf537.c +++ /dev/null @@ -1,44 +0,0 @@ -/* - * U-Boot - main board file - * - * Copyright (c) 2005-2009 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <config.h> -#include <command.h> -#include <net.h> -#include <netdev.h> -#include <asm/blackfin.h> -#include "../cm-bf537e/gpio_cfi_flash.h" - -DECLARE_GLOBAL_DATA_PTR; - -int checkboard(void) -{ - printf("Board: Bluetechnix TCM-BF537 board\n"); - printf(" Support: http://www.bluetechnix.at/\n"); - return 0; -} - -#ifndef CONFIG_BFIN_MAC -# define bfin_EMAC_initialize(x) 1 -#endif -#ifndef CONFIG_SMC911X -# define smc911x_initialize(n, x) 1 -#endif -int board_eth_init(bd_t *bis) -{ - /* return ok if at least 1 eth device works */ - return bfin_EMAC_initialize(bis) & - smc911x_initialize(0, CONFIG_SMC911X_BASE); -} - -int misc_init_r(void) -{ - gpio_cfi_flash_init(); - - return 0; -} diff --git a/board/theadorable/theadorable.c b/board/theadorable/theadorable.c index d621682d07..9b56620e65 100644 --- a/board/theadorable/theadorable.c +++ b/board/theadorable/theadorable.c @@ -115,6 +115,13 @@ MV_BIN_SERDES_CFG theadorable_serdes_cfg[] = { }, }; +/* + * Define a board-specific detection pulse-width array for the SerDes PCIe + * interfaces. If not defined in the board code, the default of currently 2 + * is used. Values from 0...3 are possible (2 bits). + */ +u8 serdes_pex_pulse_width[4] = { 0, 2, 2, 2 }; + MV_DRAM_MODES *ddr3_get_static_ddr_mode(void) { /* Only one mode supported for this board */ @@ -287,3 +294,44 @@ int board_late_init(void) return 0; } #endif + +#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_PCI) +int do_pcie_test(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + pci_dev_t bdf; + u16 ven_id, dev_id; + + if (argc != 3) + return cmd_usage(cmdtp); + + ven_id = simple_strtoul(argv[1], NULL, 16); + dev_id = simple_strtoul(argv[2], NULL, 16); + + printf("Checking for PCIe device: VendorID 0x%04x, DeviceId 0x%04x\n", + ven_id, dev_id); + + /* + * Check if the PCIe device is detected (somtimes its not available + * on the PCIe bus) + */ + bdf = pci_find_device(ven_id, dev_id, 0); + if (bdf == -1) { + /* PCIe device not found! */ + printf("Failed to find PCIe device\n"); + } else { + /* PCIe device found! */ + printf("PCIe device found, resetting board...\n"); + + /* default handling: SOFT reset */ + do_reset(NULL, 0, 0, NULL); + } + + return 0; +} + +U_BOOT_CMD( + pcie, 3, 0, do_pcie_test, + "Test for presence of a PCIe device", + "<VendorID> <DeviceID>" +); +#endif diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c index 8eaf3e9a5c..3e842d3187 100644 --- a/board/ti/am335x/board.c +++ b/board/ti/am335x/board.c @@ -651,6 +651,21 @@ int board_late_init(void) #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG char *name = NULL; + if (board_is_bone_lt()) { + /* BeagleBoard.org BeagleBone Black Wireless: */ + if (!strncmp(board_ti_get_rev(), "BWA", 3)) { + name = "BBBW"; + } + /* SeeedStudio BeagleBone Green Wireless */ + if (!strncmp(board_ti_get_rev(), "GW1", 3)) { + name = "BBGW"; + } + /* BeagleBoard.org BeagleBone Blue */ + if (!strncmp(board_ti_get_rev(), "BLA", 3)) { + name = "BBBL"; + } + } + if (board_is_bbg1()) name = "BBG1"; set_board_info_env(name); diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c index df9039c769..1cfc08bc9c 100644 --- a/board/ti/am57xx/board.c +++ b/board/ti/am57xx/board.c @@ -50,9 +50,23 @@ DECLARE_GLOBAL_DATA_PTR; +#define GPIO_ETH_LCD GPIO_TO_PIN(2, 22) /* GPIO 7_11 */ #define GPIO_DDR_VTT_EN 203 +/* Touch screen controller to identify the LCD */ +#define OSD_TS_FT_BUS_ADDRESS 0 +#define OSD_TS_FT_CHIP_ADDRESS 0x38 +#define OSD_TS_FT_REG_ID 0xA3 +/* + * Touchscreen IDs for various OSD panels + * Ref: http://www.osddisplays.com/TI/OSD101T2587-53TS_A.1.pdf + */ +/* Used on newer osd101t2587 Panels */ +#define OSD_TS_FT_ID_5x46 0x54 +/* Used on older osd101t2045 Panels */ +#define OSD_TS_FT_ID_5606 0x08 + #define SYSINFO_BOARD_NAME_MAX_LEN 45 #define TPS65903X_PRIMARY_SECONDARY_PAD2 0xFB @@ -449,6 +463,21 @@ void hw_data_init(void) *ctrl = &dra7xx_ctrl; } +bool am571x_idk_needs_lcd(void) +{ + bool needs_lcd; + + gpio_request(GPIO_ETH_LCD, "nLCD_Detect"); + if (gpio_get_value(GPIO_ETH_LCD)) + needs_lcd = false; + else + needs_lcd = true; + + gpio_free(GPIO_ETH_LCD); + + return needs_lcd; +} + int board_init(void) { gpmc_init(); @@ -457,6 +486,62 @@ int board_init(void) return 0; } +void am57x_idk_lcd_detect(void) +{ + int r = -ENODEV; + char *idk_lcd = "no"; + uint8_t buf = 0; + + /* Only valid for IDKs */ + if (board_is_x15() || board_is_am572x_evm()) + return; + + /* Only AM571x IDK has gpio control detect.. so check that */ + if (board_is_am571x_idk() && !am571x_idk_needs_lcd()) + goto out; + + r = i2c_set_bus_num(OSD_TS_FT_BUS_ADDRESS); + if (r) { + printf("%s: Failed to set bus address to %d: %d\n", + __func__, OSD_TS_FT_BUS_ADDRESS, r); + goto out; + } + r = i2c_probe(OSD_TS_FT_CHIP_ADDRESS); + if (r) { + /* AM572x IDK has no explicit settings for optional LCD kit */ + if (board_is_am571x_idk()) { + printf("%s: Touch screen detect failed: %d!\n", + __func__, r); + } + goto out; + } + + /* Read FT ID */ + r = i2c_read(OSD_TS_FT_CHIP_ADDRESS, OSD_TS_FT_REG_ID, 1, &buf, 1); + if (r) { + printf("%s: Touch screen ID read %d:0x%02x[0x%02x] failed:%d\n", + __func__, OSD_TS_FT_BUS_ADDRESS, OSD_TS_FT_CHIP_ADDRESS, + OSD_TS_FT_REG_ID, r); + goto out; + } + + switch (buf) { + case OSD_TS_FT_ID_5606: + idk_lcd = "osd101t2045"; + break; + case OSD_TS_FT_ID_5x46: + idk_lcd = "osd101t2587"; + break; + default: + printf("%s: Unidentifed Touch screen ID 0x%02x\n", + __func__, buf); + /* we will let default be "no lcd" */ + } +out: + setenv("idk_lcd", idk_lcd); + return; +} + int board_late_init(void) { setup_board_eeprom_env(); @@ -489,6 +574,12 @@ int board_late_init(void) omap_die_id_serial(); + am57x_idk_lcd_detect(); + +#if !defined(CONFIG_SPL_BUILD) + board_ti_set_ethaddr(2); +#endif + return 0; } @@ -551,6 +642,17 @@ void recalibrate_iodelay(void) do_set_mux32((*ctrl)->control_padconf_core_base, pconf, pconf_sz); } + if (board_is_am571x_idk()) { + if (am571x_idk_needs_lcd()) { + pconf = core_padconf_array_vout_am571x_idk; + pconf_sz = ARRAY_SIZE(core_padconf_array_vout_am571x_idk); + } else { + pconf = core_padconf_array_icss1eth_am571x_idk; + pconf_sz = ARRAY_SIZE(core_padconf_array_icss1eth_am571x_idk); + } + do_set_mux32((*ctrl)->control_padconf_core_base, pconf, pconf_sz); + } + /* Setup IOdelay configuration */ ret = do_set_iodelay((*ctrl)->iodelay_config_base, iod, iod_sz); err: diff --git a/board/ti/am57xx/mux_data.h b/board/ti/am57xx/mux_data.h index 2f5243ee7a..aff274c74f 100644 --- a/board/ti/am57xx/mux_data.h +++ b/board/ti/am57xx/mux_data.h @@ -212,7 +212,7 @@ const struct pad_conf_entry core_padconf_array_essential_x15[] = { {MCASP5_FSX, (M3 | PIN_OUTPUT_PULLDOWN)}, /* mcasp5_fsx.uart9_txd */ {MCASP5_AXR0, (M3 | PIN_INPUT_PULLDOWN)}, /* mcasp5_axr0.uart9_ctsn */ {MCASP5_AXR1, (M3 | PIN_OUTPUT_PULLUP)}, /* mcasp5_axr1.uart9_rtsn */ - {MMC1_CLK, (M0 | PIN_OUTPUT_PULLUP)}, /* mmc1_clk.mmc1_clk */ + {MMC1_CLK, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_clk.mmc1_clk */ {MMC1_CMD, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_cmd.mmc1_cmd */ {MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat0.mmc1_dat0 */ {MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat1.mmc1_dat1 */ @@ -221,7 +221,7 @@ const struct pad_conf_entry core_padconf_array_essential_x15[] = { {MMC1_SDCD, (M14 | PIN_INPUT_PULLUP)}, /* mmc1_sdcd.gpio6_27 */ {GPIO6_10, (M10 | PIN_OUTPUT_PULLDOWN)}, /* gpio6_10.ehrpwm2A */ {GPIO6_11, (M0 | PIN_INPUT_PULLUP)}, /* gpio6_11.gpio6_11 */ - {MMC3_CLK, (M0 | PIN_OUTPUT_PULLUP | MANUAL_MODE)}, /* mmc3_clk.mmc3_clk */ + {MMC3_CLK, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_clk.mmc3_clk */ {MMC3_CMD, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_cmd.mmc3_cmd */ {MMC3_DAT0, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_dat0.mmc3_dat0 */ {MMC3_DAT1, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_dat1.mmc3_dat1 */ @@ -549,13 +549,6 @@ const struct pad_conf_entry core_padconf_array_essential_am571x_idk[] = { {VIN2A_D0, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d0.pr1_uart0_rxd */ {VIN2A_D1, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d1.pr1_uart0_txd */ {VIN2A_D2, (M10 | PIN_INPUT_PULLDOWN)}, /* vin2a_d2.eCAP1_in_PWM1_out */ - {VIN2A_D3, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d3.pr1_mi1_col */ - {VIN2A_D4, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d4.pr1_mii1_txd1 */ - {VIN2A_D5, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d5.pr1_mii1_txd0 */ - {VIN2A_D6, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d6.pr1_mii_mt1_clk */ - {VIN2A_D7, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d7.pr1_mii1_txen */ - {VIN2A_D8, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d8.pr1_mii1_txd3 */ - {VIN2A_D9, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d9.pr1_mii1_txd2 */ {VIN2A_D10, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d10.pr1_mdio_mdclk */ {VIN2A_D11, (M11 | PIN_INPUT_PULLUP)}, /* vin2a_d11.pr1_mdio_data */ {VIN2A_D12, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d12.rgmii1_txc */ @@ -570,35 +563,7 @@ const struct pad_conf_entry core_padconf_array_essential_am571x_idk[] = { {VIN2A_D21, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d21.rgmii1_rxd2 */ {VIN2A_D22, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d22.rgmii1_rxd1 */ {VIN2A_D23, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d23.rgmii1_rxd0 */ - {VOUT1_CLK, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_clk.vout1_clk */ - {VOUT1_DE, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_de.vout1_de */ {VOUT1_FLD, (M14 | PIN_INPUT_PULLUP)}, /* vout1_fld.gpio4_21 */ - {VOUT1_HSYNC, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_hsync.vout1_hsync */ - {VOUT1_VSYNC, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_vsync.vout1_vsync */ - {VOUT1_D0, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d0.vout1_d0 */ - {VOUT1_D1, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d1.vout1_d1 */ - {VOUT1_D2, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d2.vout1_d2 */ - {VOUT1_D3, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d3.vout1_d3 */ - {VOUT1_D4, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d4.vout1_d4 */ - {VOUT1_D5, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d5.vout1_d5 */ - {VOUT1_D6, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d6.vout1_d6 */ - {VOUT1_D7, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d7.vout1_d7 */ - {VOUT1_D8, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d8.vout1_d8 */ - {VOUT1_D9, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d9.vout1_d9 */ - {VOUT1_D10, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d10.vout1_d10 */ - {VOUT1_D11, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d11.vout1_d11 */ - {VOUT1_D12, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d12.vout1_d12 */ - {VOUT1_D13, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d13.vout1_d13 */ - {VOUT1_D14, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d14.vout1_d14 */ - {VOUT1_D15, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d15.vout1_d15 */ - {VOUT1_D16, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d16.vout1_d16 */ - {VOUT1_D17, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d17.vout1_d17 */ - {VOUT1_D18, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d18.vout1_d18 */ - {VOUT1_D19, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d19.vout1_d19 */ - {VOUT1_D20, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d20.vout1_d20 */ - {VOUT1_D21, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d21.vout1_d21 */ - {VOUT1_D22, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d22.vout1_d22 */ - {VOUT1_D23, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d23.vout1_d23 */ {MDIO_MCLK, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mdio_mclk.mdio_mclk */ {MDIO_D, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mdio_d.mdio_d */ {RMII_MHZ_50_CLK, (M13 | PIN_INPUT_PULLDOWN)}, /* RMII_MHZ_50_CLK.pr2_pru1_gpo2 */ @@ -621,46 +586,46 @@ const struct pad_conf_entry core_padconf_array_essential_am571x_idk[] = { {GPIO6_14, (M14 | PIN_INPUT_PULLUP)}, /* gpio6_14.gpio6_14 */ {GPIO6_15, (M14 | PIN_INPUT_PULLUP)}, /* gpio6_15.gpio6_15 */ {GPIO6_16, (M14 | PIN_INPUT_PULLDOWN)}, /* gpio6_16.gpio6_16 */ - {XREF_CLK0, (M11 | PIN_INPUT_PULLDOWN)}, /* xref_clk0.pr2_mii1_col */ - {XREF_CLK1, (M11 | PIN_INPUT_PULLDOWN)}, /* xref_clk1.pr2_mii1_crs */ + {XREF_CLK0, (M11 | PIN_INPUT)}, /* xref_clk0.pr2_mii1_col */ + {XREF_CLK1, (M11 | PIN_INPUT_PULLUP)}, /* xref_clk1.pr2_mii1_crs */ {XREF_CLK2, (M14 | PIN_INPUT_PULLDOWN)}, /* xref_clk2.gpio6_19 */ {XREF_CLK3, (M15 | PIN_INPUT_PULLDOWN)}, /* xref_clk3.Driveroff */ {MCASP1_ACLKX, (M11 | PIN_INPUT_PULLDOWN)}, /* mcasp1_aclkx.pr2_mdio_mdclk */ {MCASP1_FSX, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_fsx.pr2_mdio_data */ {MCASP1_ACLKR, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_aclkr.gpio5_0 */ {MCASP1_FSR, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_fsr.gpio5_1 */ - {MCASP1_AXR0, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr0.pr2_mii0_rxer */ - {MCASP1_AXR1, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr1.pr2_mii_mt0_clk */ + {MCASP1_AXR0, (M11 | PIN_INPUT_PULLUP)}, /* mcasp1_axr0.pr2_mii0_rxer */ + {MCASP1_AXR1, (M11 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr1.pr2_mii_mt0_clk */ {MCASP1_AXR2, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr2.gpio5_4 */ {MCASP1_AXR3, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_axr3.gpio5_5 */ {MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr4.gpio5_6 */ {MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr5.gpio5_7 */ {MCASP1_AXR6, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_axr6.gpio5_8 */ {MCASP1_AXR7, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_axr7.gpio5_9 */ - {MCASP1_AXR8, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr8.pr2_mii0_txen */ - {MCASP1_AXR9, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr9.pr2_mii0_txd3 */ - {MCASP1_AXR10, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr10.pr2_mii0_txd2 */ - {MCASP1_AXR11, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr11.pr2_mii0_txd1 */ - {MCASP1_AXR12, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr12.pr2_mii0_txd0 */ - {MCASP1_AXR13, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr13.pr2_mii_mr0_clk */ - {MCASP1_AXR14, (M11 | PIN_INPUT_PULLDOWN | SLEWCONTROL)}, /* mcasp1_axr14.pr2_mii0_rxdv */ - {MCASP1_AXR15, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr15.pr2_mii0_rxd3 */ - {MCASP2_ACLKX, (M11 | PIN_INPUT_SLEW)}, /* mcasp2_aclkx.pr2_mii0_rxd2 */ - {MCASP2_FSX, (M11 | PIN_INPUT_SLEW)}, /* mcasp2_fsx.pr2_mii0_rxd1 */ + {MCASP1_AXR8, (M11 | PIN_OUTPUT)}, /* mcasp1_axr8.pr2_mii0_txen */ + {MCASP1_AXR9, (M11 | PIN_OUTPUT)}, /* mcasp1_axr9.pr2_mii0_txd3 */ + {MCASP1_AXR10, (M11 | PIN_OUTPUT)}, /* mcasp1_axr10.pr2_mii0_txd2 */ + {MCASP1_AXR11, (M11 | PIN_OUTPUT)}, /* mcasp1_axr11.pr2_mii0_txd1 */ + {MCASP1_AXR12, (M11 | PIN_OUTPUT)}, /* mcasp1_axr12.pr2_mii0_txd0 */ + {MCASP1_AXR13, (M11 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr13.pr2_mii_mr0_clk */ + {MCASP1_AXR14, (M11 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr14.pr2_mii0_rxdv */ + {MCASP1_AXR15, (M11 | PIN_INPUT)}, /* mcasp1_axr15.pr2_mii0_rxd3 */ + {MCASP2_ACLKX, (M11 | PIN_INPUT)}, /* mcasp2_aclkx.pr2_mii0_rxd2 */ + {MCASP2_FSX, (M11 | PIN_INPUT)}, /* mcasp2_fsx.pr2_mii0_rxd1 */ {MCASP2_ACLKR, (M15 | PIN_INPUT_PULLDOWN)}, /* mcasp2_aclkr.Driveroff */ {MCASP2_FSR, (M15 | PIN_INPUT_PULLDOWN)}, /* mcasp2_fsr.Driveroff */ {MCASP2_AXR0, (M15 | PIN_INPUT_PULLDOWN)}, /* mcasp2_axr0.Driveroff */ {MCASP2_AXR1, (M15 | PIN_INPUT_PULLDOWN)}, /* mcasp2_axr1.Driveroff */ - {MCASP2_AXR2, (M11 | PIN_INPUT_SLEW)}, /* mcasp2_axr2.pr2_mii0_rxd0 */ - {MCASP2_AXR3, (M11 | PIN_INPUT_PULLDOWN | SLEWCONTROL)}, /* mcasp2_axr3.pr2_mii0_rxlink */ + {MCASP2_AXR2, (M11 | PIN_INPUT)}, /* mcasp2_axr2.pr2_mii0_rxd0 */ + {MCASP2_AXR3, (M11 | PIN_INPUT)}, /* mcasp2_axr3.pr2_mii0_rxlink */ {MCASP2_AXR4, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp2_axr4.gpio1_4 */ {MCASP2_AXR5, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp2_axr5.gpio6_7 */ {MCASP2_AXR6, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp2_axr6.gpio2_29 */ {MCASP2_AXR7, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp2_axr7.gpio1_5 */ - {MCASP3_ACLKX, (M11 | PIN_INPUT_PULLDOWN)}, /* mcasp3_aclkx.pr2_mii0_crs */ - {MCASP3_FSX, (M11 | PIN_INPUT_SLEW)}, /* mcasp3_fsx.pr2_mii0_col */ - {MCASP3_AXR0, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp3_axr0.pr2_mii1_rxer */ - {MCASP3_AXR1, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp3_axr1.pr2_mii1_rxlink */ + {MCASP3_ACLKX, (M11 | PIN_INPUT_PULLUP)}, /* mcasp3_aclkx.pr2_mii0_crs */ + {MCASP3_FSX, (M11 | PIN_INPUT)}, /* mcasp3_fsx.pr2_mii0_col */ + {MCASP3_AXR0, (M11 | PIN_INPUT_PULLUP)}, /* mcasp3_axr0.pr2_mii1_rxer */ + {MCASP3_AXR1, (M11 | PIN_INPUT)}, /* mcasp3_axr1.pr2_mii1_rxlink */ {MCASP4_ACLKX, (M2 | PIN_INPUT_PULLDOWN)}, /* mcasp4_aclkx.spi3_sclk */ {MCASP4_FSX, (M2 | PIN_INPUT_PULLDOWN)}, /* mcasp4_fsx.spi3_d1 */ {MCASP4_AXR0, (M15 | PIN_INPUT_PULLDOWN)}, /* mcasp4_axr0.Driveroff */ @@ -677,18 +642,18 @@ const struct pad_conf_entry core_padconf_array_essential_am571x_idk[] = { {MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat3.mmc1_dat3 */ {MMC1_SDCD, (M14 | PIN_INPUT_PULLUP)}, /* mmc1_sdcd.gpio6_27 */ {MMC1_SDWP, (M0 | PIN_OUTPUT)}, /* mmc1_sdwp.mmc1_sdwp */ - {GPIO6_10, (M11 | PIN_INPUT_PULLUP)}, /* gpio6_10.pr2_mii_mt1_clk */ - {GPIO6_11, (M11 | PIN_INPUT_PULLUP)}, /* gpio6_11.pr2_mii1_txen */ - {MMC3_CLK, (M11 | PIN_INPUT_PULLUP)}, /* mmc3_clk.pr2_mii1_txd3 */ - {MMC3_CMD, (M11 | PIN_INPUT_PULLUP)}, /* mmc3_cmd.pr2_mii1_txd2 */ - {MMC3_DAT0, (M11 | PIN_INPUT_PULLUP)}, /* mmc3_dat0.pr2_mii1_txd1 */ - {MMC3_DAT1, (M11 | PIN_INPUT_PULLUP)}, /* mmc3_dat1.pr2_mii1_txd0 */ - {MMC3_DAT2, (M11 | PIN_INPUT_PULLUP)}, /* mmc3_dat2.pr2_mii_mr1_clk */ + {GPIO6_10, (M11 | PIN_INPUT_PULLDOWN)}, /* gpio6_10.pr2_mii_mt1_clk */ + {GPIO6_11, (M11 | PIN_OUTPUT)}, /* gpio6_11.pr2_mii1_txen */ + {MMC3_CLK, (M11 | PIN_OUTPUT)}, /* mmc3_clk.pr2_mii1_txd3 */ + {MMC3_CMD, (M11 | PIN_OUTPUT)}, /* mmc3_cmd.pr2_mii1_txd2 */ + {MMC3_DAT0, (M11 | PIN_OUTPUT)}, /* mmc3_dat0.pr2_mii1_txd1 */ + {MMC3_DAT1, (M11 | PIN_OUTPUT)}, /* mmc3_dat1.pr2_mii1_txd0 */ + {MMC3_DAT2, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat2.pr2_mii_mr1_clk */ {MMC3_DAT3, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat3.pr2_mii1_rxdv */ - {MMC3_DAT4, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat4.pr2_mii1_rxd3 */ - {MMC3_DAT5, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat5.pr2_mii1_rxd2 */ - {MMC3_DAT6, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat6.pr2_mii1_rxd1 */ - {MMC3_DAT7, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat7.pr2_mii1_rxd0 */ + {MMC3_DAT4, (M11 | PIN_INPUT)}, /* mmc3_dat4.pr2_mii1_rxd3 */ + {MMC3_DAT5, (M11 | PIN_INPUT)}, /* mmc3_dat5.pr2_mii1_rxd2 */ + {MMC3_DAT6, (M11 | PIN_INPUT)}, /* mmc3_dat6.pr2_mii1_rxd1 */ + {MMC3_DAT7, (M11 | PIN_INPUT)}, /* mmc3_dat7.pr2_mii1_rxd0 */ {SPI1_SCLK, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_sclk.gpio7_7 */ {SPI1_D1, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_d1.gpio7_8 */ {SPI1_D0, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_d0.gpio7_9 */ @@ -727,6 +692,75 @@ const struct pad_conf_entry core_padconf_array_essential_am571x_idk[] = { {RSTOUTN, (M0 | PIN_OUTPUT_PULLDOWN)}, /* rstoutn.rstoutn */ }; +const struct pad_conf_entry core_padconf_array_icss1eth_am571x_idk[] = { + /* PR1 MII0 */ + {VOUT1_D8, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d8.pr1_mii_mt0_clk */ + {VOUT1_D9, (M13 | PIN_OUTPUT)}, /* vout1_d9.pr1_mii0_txd3 */ + {VOUT1_D10, (M13 | PIN_OUTPUT)}, /* vout1_d10.pr1_mii0_txd2 */ + {VOUT1_D11, (M13 | PIN_OUTPUT)}, /* vout1_d11.pr1_mii0_txen */ + {VOUT1_D12, (M13 | PIN_OUTPUT)}, /* vout1_d12.pr1_mii0_txd1 */ + {VOUT1_D13, (M13 | PIN_OUTPUT)}, /* vout1_d13.pr1_mii0_txd0 */ + {VOUT1_D14, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d14.pr1_mii_mr0_clk */ + {VOUT1_D15, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d15.pr1_mii0_rxdv */ + {VOUT1_D16, (M12 | PIN_INPUT)}, /* vout1_d16.pr1_mii0_rxd3 */ + {VOUT1_D17, (M12 | PIN_INPUT)}, /* vout1_d17.pr1_mii0_rxd2 */ + {VOUT1_D18, (M12 | PIN_INPUT)}, /* vout1_d18.pr1_mii0_rxd1 */ + {VOUT1_D19, (M12 | PIN_INPUT)}, /* vout1_d19.pr1_mii0_rxd0 */ + {VOUT1_D20, (M12 | PIN_INPUT_PULLUP)}, /* vout1_d20.pr1_mii0_rxer */ + {VOUT1_D21, (M12 | PIN_INPUT)}, /* vout1_d21.pr1_mii0_rxlink */ + {VOUT1_D22, (M12 | PIN_INPUT)}, /* vout1_d22.pr1_mii0_col */ + {VOUT1_D23, (M12 | PIN_INPUT_PULLUP)}, /* vout1_d23.pr1_mii0_crs */ + + /* PR1 MII1 */ + {VIN2A_D3, (M12 | PIN_INPUT)}, /* vin2a_d3.pr1_mi1_col */ + {VIN2A_D4, (M13 | PIN_OUTPUT)}, /* vin2a_d4.pr1_mii1_txd1 */ + {VIN2A_D5, (M13 | PIN_OUTPUT)}, /* vin2a_d5.pr1_mii1_txd0 */ + {VIN2A_D6, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d6.pr1_mii_mt1_clk */ + {VIN2A_D7, (M11 | PIN_OUTPUT)}, /* vin2a_d7.pr1_mii1_txen */ + {VIN2A_D8, (M11 | PIN_OUTPUT)}, /* vin2a_d8.pr1_mii1_txd3 */ + {VIN2A_D9, (M11 | PIN_OUTPUT)}, /* vin2a_d9.pr1_mii1_txd2 */ + {VOUT1_VSYNC, (M12 | PIN_INPUT_PULLUP)}, /* vout1_vsync.pr1_mii1_rxer */ + {VOUT1_D0, (M12 | PIN_INPUT)}, /* vout1_d0.pr1_mii1_rxlink */ + {VOUT1_D1, (M12 | PIN_INPUT_PULLUP)}, /* vout1_d1.pr1_mii1_crs */ + {VOUT1_D2, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d2.pr1_mii_mr1_clk */ + {VOUT1_D3, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d3.pr1_mii1_rxdv */ + {VOUT1_D4, (M12 | PIN_INPUT)}, /* vout1_d4.pr1_mii1_rxd3 */ + {VOUT1_D5, (M12 | PIN_INPUT)}, /* vout1_d5.pr1_mii1_rxd2 */ + {VOUT1_D6, (M12 | PIN_INPUT)}, /* vout1_d6.pr1_mii1_rxd1 */ + {VOUT1_D7, (M12 | PIN_INPUT)}, /* vout1_d7.pr1_mii1_rxd0 */ +}; + +const struct pad_conf_entry core_padconf_array_vout_am571x_idk[] = { + {VOUT1_CLK, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_clk.vout1_clk */ + {VOUT1_DE, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_de.vout1_de */ + {VOUT1_HSYNC, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_hsync.vout1_hsync */ + {VOUT1_VSYNC, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_vsync.vout1_vsync */ + {VOUT1_D0, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d0.vout1_d0 */ + {VOUT1_D1, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d1.vout1_d1 */ + {VOUT1_D2, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d2.vout1_d2 */ + {VOUT1_D3, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d3.vout1_d3 */ + {VOUT1_D4, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d4.vout1_d4 */ + {VOUT1_D5, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d5.vout1_d5 */ + {VOUT1_D6, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d6.vout1_d6 */ + {VOUT1_D7, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d7.vout1_d7 */ + {VOUT1_D8, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d8.vout1_d8 */ + {VOUT1_D9, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d9.vout1_d9 */ + {VOUT1_D10, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d10.vout1_d10 */ + {VOUT1_D11, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d11.vout1_d11 */ + {VOUT1_D12, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d12.vout1_d12 */ + {VOUT1_D13, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d13.vout1_d13 */ + {VOUT1_D14, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d14.vout1_d14 */ + {VOUT1_D15, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d15.vout1_d15 */ + {VOUT1_D16, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d16.vout1_d16 */ + {VOUT1_D17, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d17.vout1_d17 */ + {VOUT1_D18, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d18.vout1_d18 */ + {VOUT1_D19, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d19.vout1_d19 */ + {VOUT1_D20, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d20.vout1_d20 */ + {VOUT1_D21, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d21.vout1_d21 */ + {VOUT1_D22, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d22.vout1_d22 */ + {VOUT1_D23, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d23.vout1_d23 */ +}; + const struct pad_conf_entry early_padconf[] = { {UART2_CTSN, (M2 | PIN_INPUT_SLEW)}, /* uart2_ctsn.uart3_rxd */ {UART2_RTSN, (M1 | PIN_INPUT_SLEW)}, /* uart2_rtsn.uart3_txd */ diff --git a/board/ti/common/Kconfig b/board/ti/common/Kconfig index adf73abc93..15b5ccf741 100644 --- a/board/ti/common/Kconfig +++ b/board/ti/common/Kconfig @@ -3,3 +3,13 @@ config TI_I2C_BOARD_DETECT help Support for detection board information on Texas Instrument's Evaluation Boards which have I2C based EEPROM detection + +config EEPROM_BUS_ADDRESS + int "Board EEPROM's I2C bus address" + range 0 8 + default 0 + +config EEPROM_CHIP_ADDRESS + hex "Board EEPROM's I2C chip address" + range 0 0xff + default 0x50 diff --git a/board/ti/common/board_detect.c b/board/ti/common/board_detect.c index a5dba94e5e..c55e24e321 100644 --- a/board/ti/common/board_detect.c +++ b/board/ti/common/board_detect.c @@ -314,3 +314,65 @@ void __maybe_unused set_board_info_env(char *name) else setenv("board_serial", unknown); } + +static u64 mac_to_u64(u8 mac[6]) +{ + int i; + u64 addr = 0; + + for (i = 0; i < 6; i++) { + addr <<= 8; + addr |= mac[i]; + } + + return addr; +} + +static void u64_to_mac(u64 addr, u8 mac[6]) +{ + mac[5] = addr; + mac[4] = addr >> 8; + mac[3] = addr >> 16; + mac[2] = addr >> 24; + mac[1] = addr >> 32; + mac[0] = addr >> 40; +} + +void board_ti_set_ethaddr(int index) +{ + uint8_t mac_addr[6]; + int i; + u64 mac1, mac2; + u8 mac_addr1[6], mac_addr2[6]; + int num_macs; + /* + * Export any Ethernet MAC addresses from EEPROM. + * The 2 MAC addresses in EEPROM define the address range. + */ + board_ti_get_eth_mac_addr(0, mac_addr1); + board_ti_get_eth_mac_addr(1, mac_addr2); + + if (is_valid_ethaddr(mac_addr1) && is_valid_ethaddr(mac_addr2)) { + mac1 = mac_to_u64(mac_addr1); + mac2 = mac_to_u64(mac_addr2); + + /* must contain an address range */ + num_macs = mac2 - mac1 + 1; + if (num_macs <= 0) + return; + + if (num_macs > 50) { + printf("%s: Too many MAC addresses: %d. Limiting to 50\n", + __func__, num_macs); + num_macs = 50; + } + + for (i = 0; i < num_macs; i++) { + u64_to_mac(mac1 + i, mac_addr); + if (is_valid_ethaddr(mac_addr)) { + eth_setenv_enetaddr_by_index("eth", i + index, + mac_addr); + } + } + } +} diff --git a/board/ti/common/board_detect.h b/board/ti/common/board_detect.h index 343fcb463e..88b0a59f81 100644 --- a/board/ti/common/board_detect.h +++ b/board/ti/common/board_detect.h @@ -98,7 +98,7 @@ struct ti_common_eeprom { }; #define TI_EEPROM_DATA ((struct ti_common_eeprom *)\ - OMAP_SRAM_SCRATCH_BOARD_EEPROM_START) + TI_SRAM_SCRATCH_BOARD_EEPROM_START) /** * ti_i2c_eeprom_am_get() - Consolidated eeprom data collection for AM* TI EVMs @@ -193,4 +193,16 @@ u64 board_ti_get_emif2_size(void); */ void set_board_info_env(char *name); +/** + * board_ti_set_ethaddr- Sets the ethaddr environment from EEPROM + * @index: The first eth<index>addr environment variable to set + * + * EEPROM should be already read before calling this function. + * The EEPROM contains 2 MAC addresses which define the MAC address + * range (i.e. first and last MAC address). + * This function sets the ethaddr environment variable for all + * the available MAC addresses starting from eth<index>addr. + */ +void board_ti_set_ethaddr(int index); + #endif /* __BOARD_DETECT_H */ diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c index de6fc19cb0..ae2d59da43 100644 --- a/board/ti/dra7xx/evm.c +++ b/board/ti/dra7xx/evm.c @@ -498,7 +498,7 @@ int board_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { u64 ram_size; @@ -510,6 +510,8 @@ void dram_init_banksize(void) gd->bd->bi_dram[1].start = 0x200000000; gd->bd->bi_dram[1].size = ram_size - CONFIG_MAX_MEM_MAPPED; } + + return 0; } int board_late_init(void) diff --git a/board/ti/ks2_evm/Kconfig b/board/ti/ks2_evm/Kconfig index c0568ec50c..9477f5336b 100644 --- a/board/ti/ks2_evm/Kconfig +++ b/board/ti/ks2_evm/Kconfig @@ -49,3 +49,5 @@ config SYS_CONFIG_NAME default "k2g_evm" endif + +source "board/ti/common/Kconfig" diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c index 372fc35a5c..79e110ef48 100644 --- a/board/ti/ks2_evm/board_k2g.c +++ b/board/ti/ks2_evm/board_k2g.c @@ -12,6 +12,7 @@ #include <asm/arch/psc_defs.h> #include <asm/arch/mmc_host_def.h> #include "mux-k2g.h" +#include "../common/board_detect.h" #define SYS_CLK 24000000 @@ -149,6 +150,24 @@ int board_early_init_f(void) } #endif +#ifdef CONFIG_BOARD_LATE_INIT +int board_late_init(void) +{ +#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_TI_I2C_BOARD_DETECT) + int rc; + + rc = ti_i2c_eeprom_am_get(CONFIG_EEPROM_BUS_ADDRESS, + CONFIG_EEPROM_CHIP_ADDRESS); + if (rc) + printf("ti_i2c_eeprom_init failed %d\n", rc); + + board_ti_set_ethaddr(1); +#endif + + return 0; +} +#endif + #ifdef CONFIG_SPL_BUILD void spl_init_keystone_plls(void) { diff --git a/board/toradex/apalis-tk1/Kconfig b/board/toradex/apalis-tk1/Kconfig new file mode 100644 index 0000000000..05407ad2d5 --- /dev/null +++ b/board/toradex/apalis-tk1/Kconfig @@ -0,0 +1,30 @@ +if TARGET_APALIS_TK1 + +config SYS_BOARD + default "apalis-tk1" + +config SYS_VENDOR + default "toradex" + +config SYS_CONFIG_NAME + default "apalis-tk1" + +config TDX_CFG_BLOCK + default y + +config TDX_HAVE_MMC + default y + +config TDX_CFG_BLOCK_DEV + default "0" + +config TDX_CFG_BLOCK_PART + default "1" + +# Toradex config block in eMMC, at the end of 1st "boot sector" +config TDX_CFG_BLOCK_OFFSET + default "-512" + +source "board/toradex/common/Kconfig" + +endif diff --git a/board/toradex/apalis-tk1/MAINTAINERS b/board/toradex/apalis-tk1/MAINTAINERS new file mode 100644 index 0000000000..3c908e1192 --- /dev/null +++ b/board/toradex/apalis-tk1/MAINTAINERS @@ -0,0 +1,7 @@ +Apalis TK1 +M: Marcel Ziswiler <marcel.ziswiler@toradex.com> +S: Maintained +F: board/toradex/apalis-tk1/ +F: include/configs/apalis-tk1.h +F: configs/apalis-tk1_defconfig +F: arch/arm/dts/tegra124-apalis.dtb diff --git a/board/toradex/apalis-tk1/Makefile b/board/toradex/apalis-tk1/Makefile new file mode 100644 index 0000000000..9ef06dd61d --- /dev/null +++ b/board/toradex/apalis-tk1/Makefile @@ -0,0 +1,5 @@ +# Copyright (c) 2016 Toradex, Inc. +# SPDX-License-Identifier: GPL-2.0+ + +obj-y += as3722_init.o +obj-y += apalis-tk1.o diff --git a/board/toradex/apalis-tk1/apalis-tk1.c b/board/toradex/apalis-tk1/apalis-tk1.c new file mode 100644 index 0000000000..c7e519c19b --- /dev/null +++ b/board/toradex/apalis-tk1/apalis-tk1.c @@ -0,0 +1,175 @@ +/* + * Copyright (c) 2016 Toradex, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/arch-tegra/ap.h> +#include <asm/gpio.h> +#include <asm/io.h> +#include <asm/arch/gpio.h> +#include <asm/arch/pinmux.h> +#include <power/as3722.h> + +#include "../common/tdx-common.h" +#include "pinmux-config-apalis-tk1.h" + +#define LAN_RESET_N TEGRA_GPIO(S, 2) + +int arch_misc_init(void) +{ + if (readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BOOTTYPE) == + NVBOOTTYPE_RECOVERY) + printf("USB recovery mode\n"); + + return 0; +} + +int checkboard(void) +{ + puts("Model: Toradex Apalis TK1 2GB\n"); + + return 0; +} + +#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) +int ft_board_setup(void *blob, bd_t *bd) +{ + return ft_common_board_setup(blob, bd); +} +#endif + +/* + * Routine: pinmux_init + * Description: Do individual peripheral pinmux configs + */ +void pinmux_init(void) +{ + pinmux_clear_tristate_input_clamping(); + + gpio_config_table(apalis_tk1_gpio_inits, + ARRAY_SIZE(apalis_tk1_gpio_inits)); + + pinmux_config_pingrp_table(apalis_tk1_pingrps, + ARRAY_SIZE(apalis_tk1_pingrps)); + + pinmux_config_drvgrp_table(apalis_tk1_drvgrps, + ARRAY_SIZE(apalis_tk1_drvgrps)); +} + +#ifdef CONFIG_PCI_TEGRA +int tegra_pcie_board_init(void) +{ + struct udevice *pmic; + int err; + + err = as3722_init(&pmic); + if (err) { + error("failed to initialize AS3722 PMIC: %d\n", err); + return err; + } + + err = as3722_sd_enable(pmic, 4); + if (err < 0) { + error("failed to enable SD4: %d\n", err); + return err; + } + + err = as3722_sd_set_voltage(pmic, 4, 0x24); + if (err < 0) { + error("failed to set SD4 voltage: %d\n", err); + return err; + } + + err = as3722_gpio_configure(pmic, 1, AS3722_GPIO_OUTPUT_VDDH | + AS3722_GPIO_INVERT); + if (err < 0) { + error("failed to configure GPIO#1 as output: %d\n", err); + return err; + } + + err = as3722_gpio_direction_output(pmic, 2, 1); + if (err < 0) { + error("failed to set GPIO#2 high: %d\n", err); + return err; + } + + /* Reset I210 Gigabit Ethernet Controller */ + gpio_request(LAN_RESET_N, "LAN_RESET_N"); + gpio_direction_output(LAN_RESET_N, 0); + + /* + * Make sure we don't get any back feeding from LAN_WAKE_N resp. + * DEV_OFF_N + */ + gpio_request(TEGRA_GPIO(O, 5), "LAN_WAKE_N"); + gpio_direction_output(TEGRA_GPIO(O, 5), 0); + + gpio_request(TEGRA_GPIO(O, 6), "LAN_DEV_OFF_N"); + gpio_direction_output(TEGRA_GPIO(O, 6), 0); + + /* Make sure LDO9 and LDO10 are initially enabled @ 0V */ + err = as3722_ldo_enable(pmic, 9); + if (err < 0) { + error("failed to enable LDO9: %d\n", err); + return err; + } + err = as3722_ldo_enable(pmic, 10); + if (err < 0) { + error("failed to enable LDO10: %d\n", err); + return err; + } + err = as3722_ldo_set_voltage(pmic, 9, 0x80); + if (err < 0) { + error("failed to set LDO9 voltage: %d\n", err); + return err; + } + err = as3722_ldo_set_voltage(pmic, 10, 0x80); + if (err < 0) { + error("failed to set LDO10 voltage: %d\n", err); + return err; + } + + mdelay(100); + + /* Make sure controller gets enabled by disabling DEV_OFF_N */ + gpio_set_value(TEGRA_GPIO(O, 6), 1); + + /* Enable LDO9 and LDO10 for +V3.3_ETH on patched prototypes */ + err = as3722_ldo_set_voltage(pmic, 9, 0xff); + if (err < 0) { + error("failed to set LDO9 voltage: %d\n", err); + return err; + } + err = as3722_ldo_set_voltage(pmic, 10, 0xff); + if (err < 0) { + error("failed to set LDO10 voltage: %d\n", err); + return err; + } + + mdelay(100); + gpio_set_value(LAN_RESET_N, 1); + +#ifdef APALIS_TK1_PCIE_EVALBOARD_INIT +#define PEX_PERST_N TEGRA_GPIO(DD, 1) /* Apalis GPIO7 */ +#define RESET_MOCI_CTRL TEGRA_GPIO(U, 4) + + /* Reset PLX PEX 8605 PCIe Switch plus PCIe devices on Apalis Evaluation + Board */ + gpio_request(PEX_PERST_N, "PEX_PERST_N"); + gpio_request(RESET_MOCI_CTRL, "RESET_MOCI_CTRL"); + gpio_direction_output(PEX_PERST_N, 0); + gpio_direction_output(RESET_MOCI_CTRL, 0); + /* Must be asserted for 100 ms after power and clocks are stable */ + mdelay(100); + gpio_set_value(PEX_PERST_N, 1); + /* Err_5: PEX_REFCLK_OUTpx/nx Clock Outputs is not Guaranteed Until + 900 us After PEX_PERST# De-assertion */ + mdelay(1); + gpio_set_value(RESET_MOCI_CTRL, 1); +#endif /* APALIS_T30_PCIE_EVALBOARD_INIT */ + + return 0; +} +#endif /* CONFIG_PCI_TEGRA */ diff --git a/board/toradex/apalis-tk1/as3722_init.c b/board/toradex/apalis-tk1/as3722_init.c new file mode 100644 index 0000000000..4917034e1a --- /dev/null +++ b/board/toradex/apalis-tk1/as3722_init.c @@ -0,0 +1,117 @@ +/* + * Copyright (c) 2012-2016 Toradex, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch-tegra/tegra_i2c.h> +#include "as3722_init.h" + +/* AS3722-PMIC-specific early init code - get CPU rails up, etc */ + +void tegra_i2c_ll_write_addr(uint addr, uint config) +{ + struct i2c_ctlr *reg = (struct i2c_ctlr *)TEGRA_DVC_BASE; + + writel(addr, ®->cmd_addr0); + writel(config, ®->cnfg); +} + +void tegra_i2c_ll_write_data(uint data, uint config) +{ + struct i2c_ctlr *reg = (struct i2c_ctlr *)TEGRA_DVC_BASE; + + writel(data, ®->cmd_data1); + writel(config, ®->cnfg); +} + +void pmic_enable_cpu_vdd(void) +{ + debug("%s entry\n", __func__); + +#ifdef AS3722_SD1VOLTAGE_DATA + /* Set up VDD_CORE, for boards where OTP is incorrect*/ + debug("%s: Setting VDD_CORE via AS3722 reg 1\n", __func__); + /* Configure VDD_CORE via the AS3722 PMIC on the PWR I2C bus */ + tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); + tegra_i2c_ll_write_data(AS3722_SD1VOLTAGE_DATA, I2C_SEND_2_BYTES); + /* + * Don't write SDCONTROL - it's already 0x7F, i.e. all SDs enabled. + * tegra_i2c_ll_write_data(AS3722_SD1CONTROL_DATA, I2C_SEND_2_BYTES); + */ + udelay(10 * 1000); +#endif + + debug("%s: Setting VDD_CPU to 1.0V via AS3722 reg 0/4D\n", __func__); + /* + * Bring up VDD_CPU via the AS3722 PMIC on the PWR I2C bus. + * First set VDD to 1.0V, then enable the VDD regulator. + */ + tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); + tegra_i2c_ll_write_data(AS3722_SD0VOLTAGE_DATA, I2C_SEND_2_BYTES); + /* + * Don't write SDCONTROL - it's already 0x7F, i.e. all SDs enabled. + * tegra_i2c_ll_write_data(AS3722_SD0CONTROL_DATA, I2C_SEND_2_BYTES); + */ + udelay(10 * 1000); + + debug("%s: Setting VDD_GPU to 1.0V via AS3722 reg 6/4D\n", __func__); + /* + * Bring up VDD_GPU via the AS3722 PMIC on the PWR I2C bus. + * First set VDD to 1.0V, then enable the VDD regulator. + */ + tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); + tegra_i2c_ll_write_data(AS3722_SD6VOLTAGE_DATA, I2C_SEND_2_BYTES); + /* + * Don't write SDCONTROL - it's already 0x7F, i.e. all SDs enabled. + * tegra_i2c_ll_write_data(AS3722_SD6CONTROL_DATA, I2C_SEND_2_BYTES); + */ + udelay(10 * 1000); + + debug("%s: Set VPP_FUSE to 1.2V via AS3722 reg 0x12/4E\n", __func__); + /* + * Bring up VPP_FUSE via the AS3722 PMIC on the PWR I2C bus. + * First set VDD to 1.2V, then enable the VDD regulator. + */ + tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); + tegra_i2c_ll_write_data(AS3722_LDO2VOLTAGE_DATA, I2C_SEND_2_BYTES); + /* + * Don't write LDCONTROL - it's already 0xFF, i.e. all LDOs enabled. + * tegra_i2c_ll_write_data(AS3722_LDO2CONTROL_DATA, I2C_SEND_2_BYTES); + */ + udelay(10 * 1000); + + debug("%s: Set VDD_SDMMC1 to 3.3V via AS3722 reg 0x11/4E\n", __func__); + /* + * Bring up VDD_SDMMC1 via the AS3722 PMIC on the PWR I2C bus. + * First set it to value closest to 3.3V, then enable the regulator + * + * NOTE: We do this early because doing it later seems to hose the CPU + * power rail/partition startup. Need to debug. + */ + tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); + tegra_i2c_ll_write_data(AS3722_LDO1VOLTAGE_DATA, I2C_SEND_2_BYTES); + /* + * Don't write LDCONTROL - it's already 0xFF, i.e. all LDOs enabled. + * tegra_i2c_ll_write_data(AS3722_LDO1CONTROL_DATA, I2C_SEND_2_BYTES); + */ + udelay(10 * 1000); + + debug("%s: Set VDD_SDMMC3 to 3.3V via AS3722 reg 0x16/4E\n", __func__); + /* + * Bring up VDD_SDMMC3 via the AS3722 PMIC on the PWR I2C bus. + * First set it to bypass 3.3V straight thru, then enable the regulator + * + * NOTE: We do this early because doing it later seems to hose the CPU + * power rail/partition startup. Need to debug. + */ + tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); + tegra_i2c_ll_write_data(AS3722_LDO6VOLTAGE_DATA, I2C_SEND_2_BYTES); + /* + * Don't write LDCONTROL - it's already 0xFF, i.e. all LDOs enabled. + * tegra_i2c_ll_write_data(AS3722_LDO6CONTROL_DATA, I2C_SEND_2_BYTES); + */ + udelay(10 * 1000); +} diff --git a/board/toradex/apalis-tk1/as3722_init.h b/board/toradex/apalis-tk1/as3722_init.h new file mode 100644 index 0000000000..64898a3770 --- /dev/null +++ b/board/toradex/apalis-tk1/as3722_init.h @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2012-2016 Toradex, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* AS3722-PMIC-specific early init regs */ + +#define AS3722_I2C_ADDR 0x80 + +#define AS3722_SD0VOLTAGE_REG 0x00 /* CPU */ +#define AS3722_SD1VOLTAGE_REG 0x01 /* CORE, already set by OTP */ +#define AS3722_SD6VOLTAGE_REG 0x06 /* GPU */ +#define AS3722_SDCONTROL_REG 0x4D + +#define AS3722_LDO1VOLTAGE_REG 0x11 /* VDD_SDMMC1 */ +#define AS3722_LDO2VOLTAGE_REG 0x12 /* VPP_FUSE */ +#define AS3722_LDO6VOLTAGE_REG 0x16 /* VDD_SDMMC3 */ +#define AS3722_LDCONTROL_REG 0x4E + +#define AS3722_SD0VOLTAGE_DATA (0x3C00 | AS3722_SD0VOLTAGE_REG) +#define AS3722_SD0CONTROL_DATA (0x0100 | AS3722_SDCONTROL_REG) + +#define AS3722_SD1VOLTAGE_DATA (0x3200 | AS3722_SD1VOLTAGE_REG) +#define AS3722_SD1CONTROL_DATA (0x0200 | AS3722_SDCONTROL_REG) + +#define AS3722_SD6CONTROL_DATA (0x4000 | AS3722_SDCONTROL_REG) +#define AS3722_SD6VOLTAGE_DATA (0x2800 | AS3722_SD6VOLTAGE_REG) + +#define AS3722_LDO1CONTROL_DATA (0x0200 | AS3722_LDCONTROL_REG) +#define AS3722_LDO1VOLTAGE_DATA (0x7F00 | AS3722_LDO1VOLTAGE_REG) + +#define AS3722_LDO2CONTROL_DATA (0x0400 | AS3722_LDCONTROL_REG) +#define AS3722_LDO2VOLTAGE_DATA (0x1000 | AS3722_LDO2VOLTAGE_REG) + +#define AS3722_LDO6CONTROL_DATA (0x4000 | AS3722_LDCONTROL_REG) +#define AS3722_LDO6VOLTAGE_DATA (0x3F00 | AS3722_LDO6VOLTAGE_REG) + +#define I2C_SEND_2_BYTES 0x0A02 + +void pmic_enable_cpu_vdd(void); diff --git a/board/toradex/apalis-tk1/pinmux-config-apalis-tk1.h b/board/toradex/apalis-tk1/pinmux-config-apalis-tk1.h new file mode 100644 index 0000000000..5ed0da3d73 --- /dev/null +++ b/board/toradex/apalis-tk1/pinmux-config-apalis-tk1.h @@ -0,0 +1,287 @@ +/* + * Copyright (c) 2016, Toradex, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _PINMUX_CONFIG_APALIS_TK1_H_ +#define _PINMUX_CONFIG_APALIS_TK1_H_ + +#define GPIO_INIT(_port, _gpio, _init) \ + { \ + .gpio = TEGRA_GPIO(_port, _gpio), \ + .init = TEGRA_GPIO_INIT_##_init, \ + } + +static const struct tegra_gpio_config apalis_tk1_gpio_inits[] = { + /* port, pin, init_val */ + GPIO_INIT(A, 1, IN), + GPIO_INIT(B, 1, IN), + GPIO_INIT(C, 0, OUT0), + GPIO_INIT(I, 5, IN), + GPIO_INIT(I, 6, IN), + GPIO_INIT(J, 0, IN), + GPIO_INIT(J, 2, IN), + GPIO_INIT(K, 2, IN), + GPIO_INIT(K, 7, IN), + GPIO_INIT(N, 2, OUT1), + GPIO_INIT(N, 4, OUT1), + GPIO_INIT(N, 5, OUT1), + GPIO_INIT(N, 7, IN), + GPIO_INIT(O, 5, IN), + GPIO_INIT(Q, 0, OUT0), /* Shift_CTRL_OE[0] */ + GPIO_INIT(Q, 1, OUT0), /* Shift_CTRL_OE[1] */ + GPIO_INIT(Q, 2, OUT0), /* Shift_CTRL_OE[2] */ + GPIO_INIT(Q, 4, OUT0), /* Shift_CTRL_OE[4] */ + GPIO_INIT(Q, 5, OUT1), /* Shift_CTRL_Dir_Out[0] */ + GPIO_INIT(Q, 6, OUT1), /* Shift_CTRL_Dir_Out[1] */ + GPIO_INIT(Q, 7, OUT1), /* Shift_CTRL_Dir_Out[2] */ + GPIO_INIT(R, 0, OUT0), /* Shift_CTRL_Dir_In[0] */ + GPIO_INIT(R, 1, OUT0), /* Shift_CTRL_Dir_In[1] */ + GPIO_INIT(R, 2, OUT0), /* Shift_CTRL_OE[3] */ + GPIO_INIT(S, 3, OUT0), /* Shift_CTRL_Dir_In[2] */ + GPIO_INIT(U, 4, OUT1), + GPIO_INIT(W, 3, IN), + GPIO_INIT(W, 5, IN), + GPIO_INIT(BB, 0, IN), + GPIO_INIT(BB, 3, OUT0), + GPIO_INIT(BB, 4, IN), + GPIO_INIT(BB, 5, OUT1), + GPIO_INIT(BB, 6, OUT0), + GPIO_INIT(CC, 5, IN), + GPIO_INIT(DD, 3, IN), + GPIO_INIT(EE, 3, IN), + GPIO_INIT(EE, 5, IN), + GPIO_INIT(FF, 1, IN), +}; + +#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _rcv_sel) \ + { \ + .pingrp = PMUX_PINGRP_##_pingrp, \ + .func = PMUX_FUNC_##_mux, \ + .pull = PMUX_PULL_##_pull, \ + .tristate = PMUX_TRI_##_tri, \ + .io = PMUX_PIN_##_io, \ + .od = PMUX_PIN_OD_##_od, \ + .rcv_sel = PMUX_PIN_RCV_SEL_##_rcv_sel, \ + .lock = PMUX_PIN_LOCK_DEFAULT, \ + .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \ + } + +static const struct pmux_pingrp_config apalis_tk1_pingrps[] = { + /* pingrp, mux, pull, tri, e_input, od, rcv_sel */ + PINCFG(CLK_32K_OUT_PA0, SOC, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), + PINCFG(UART3_CTS_N_PA1, GMI, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), + PINCFG(DAP2_FS_PA2, HDA, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(DAP2_SCLK_PA3, HDA, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(DAP2_DIN_PA4, HDA, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), + PINCFG(DAP2_DOUT_PA5, HDA, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC3_CLK_PA6, SDMMC3, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC3_CMD_PA7, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PB0, UARTD, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), + PINCFG(PB1, RSVD2, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC3_DAT3_PB4, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC3_DAT2_PB5, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC3_DAT1_PB6, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC3_DAT0_PB7, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(UART3_RTS_N_PC0, GMI, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(UART2_TXD_PC2, IRDA, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(UART2_RXD_PC3, IRDA, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), + PINCFG(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), + PINCFG(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), + PINCFG(PC7, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PG0, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PG1, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PG2, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PG3, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PG4, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PG5, SPI4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PG6, SPI4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PG7, SPI4, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), + PINCFG(PH0, PWM0, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PH1, PWM1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PH2, PWM2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PH3, PWM3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PH4, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PH5, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PH6, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PH7, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PI0, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PI1, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PI2, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PI3, SPI4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PI4, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PI5, RSVD2, UP, TRISTATE, INPUT, ENABLE, DEFAULT), + PINCFG(PI6, RSVD1, UP, TRISTATE, INPUT, DEFAULT, DEFAULT), + PINCFG(PI7, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PJ0, RSVD1, UP, TRISTATE, INPUT, ENABLE, DEFAULT), + PINCFG(PJ2, RSVD1, UP, TRISTATE, INPUT, ENABLE, DEFAULT), + PINCFG(UART2_CTS_N_PJ5, UARTB, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), + PINCFG(UART2_RTS_N_PJ6, UARTB, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PJ7, UARTD, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PK0, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PK1, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PK2, RSVD1, UP, TRISTATE, INPUT, ENABLE, DEFAULT), + PINCFG(PK3, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PK4, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(SPDIF_OUT_PK5, SPDIF, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(SPDIF_IN_PK6, SPDIF, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), + PINCFG(PK7, RSVD2, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), + PINCFG(DAP1_FS_PN0, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(DAP1_DIN_PN1, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(DAP1_DOUT_PN2, SATA, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(DAP1_SCLK_PN3, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(USB_VBUS_EN0_PN4, RSVD2, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(USB_VBUS_EN1_PN5, RSVD2, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(HDMI_INT_PN7, RSVD1, DOWN, TRISTATE, INPUT, DEFAULT, NORMAL), + PINCFG(ULPI_DATA7_PO0, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(ULPI_DATA0_PO1, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(ULPI_DATA1_PO2, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(ULPI_DATA2_PO3, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(ULPI_DATA3_PO4, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(ULPI_DATA4_PO5, ULPI, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), + PINCFG(ULPI_DATA5_PO6, ULPI, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(ULPI_DATA6_PO7, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(DAP3_FS_PP0, I2S2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(DAP3_DIN_PP1, I2S2, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), + PINCFG(DAP3_DOUT_PP2, I2S2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(DAP3_SCLK_PP3, I2S2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(DAP4_FS_PP4, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(DAP4_DIN_PP5, RSVD3, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(DAP4_DOUT_PP6, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(DAP4_SCLK_PP7, RSVD3, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_COL0_PQ0, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_COL1_PQ1, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_COL2_PQ2, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_COL3_PQ3, KBC, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_COL4_PQ4, KBC, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_COL5_PQ5, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_COL6_PQ6, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_COL7_PQ7, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW0_PR0, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW1_PR1, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW2_PR2, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW3_PR3, KBC, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW4_PR4, RSVD3, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW5_PR5, RSVD3, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW6_PR6, KBC, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW7_PR7, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW8_PS0, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW9_PS1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW10_PS2, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW11_PS3, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW12_PS4, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW13_PS5, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW14_PS6, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW15_PS7, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW16_PT0, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW17_PT1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(GEN2_I2C_SCL_PT5, I2C2, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), + PINCFG(GEN2_I2C_SDA_PT6, I2C2, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), + PINCFG(SDMMC4_CMD_PT7, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PU0, UARTA, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PU1, UARTA, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), + PINCFG(PU2, UARTA, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), + PINCFG(PU3, UARTA, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PU4, GMI, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PU5, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PU6, PWM3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PV0, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PV1, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC3_CD_N_PV2, RSVD3, UP, TRISTATE, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC1_WP_N_PV3, SDMMC1, UP, TRISTATE, INPUT, DEFAULT, DEFAULT), + PINCFG(DDC_SCL_PV4, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(DDC_SDA_PV5, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(GPIO_W2_AUD_PW2, SPI2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(GPIO_W3_AUD_PW3, SPI6, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), + PINCFG(DAP_MCLK1_PW4, EXTPERIPH1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(CLK2_OUT_PW5, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(UART3_TXD_PW6, UARTC, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(UART3_RXD_PW7, UARTC, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), + PINCFG(DVFS_PWM_PX0, CLDVFS, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(GPIO_X1_AUD_PX1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(DVFS_CLK_PX2, CLDVFS, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(GPIO_X3_AUD_PX3, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(GPIO_X4_AUD_PX4, SPI2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(GPIO_X5_AUD_PX5, SPI2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(GPIO_X6_AUD_PX6, SPI2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(GPIO_X7_AUD_PX7, SPI2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(ULPI_CLK_PY0, SPI1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(ULPI_DIR_PY1, SPI1, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), + PINCFG(ULPI_NXT_PY2, SPI1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(ULPI_STP_PY3, SPI1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC1_DAT3_PY4, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC1_DAT2_PY5, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC1_DAT1_PY6, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC1_DAT0_PY7, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC1_CLK_PZ0, SDMMC1, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC1_CMD_PZ1, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), + PINCFG(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), + PINCFG(SDMMC4_DAT0_PAA0, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC4_DAT1_PAA1, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC4_DAT2_PAA2, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC4_DAT3_PAA3, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC4_DAT4_PAA4, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC4_DAT5_PAA5, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC4_DAT6_PAA6, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC4_DAT7_PAA7, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PBB0, VGP6, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), + PINCFG(CAM_I2C_SCL_PBB1, I2C3, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), + PINCFG(CAM_I2C_SDA_PBB2, I2C3, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), + PINCFG(PBB3, VGP3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PBB4, VGP4, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), + PINCFG(PBB5, VGP5, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PBB6, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PBB7, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(CAM_MCLK_PCC0, VI_ALT3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PCC1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PCC2, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC4_CLK_PCC4, SDMMC4, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(CLK2_REQ_PCC5, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PEX_L0_RST_N_PDD1, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PEX_L0_CLKREQ_N_PDD2, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PEX_WAKE_N_PDD3, RSVD2, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), + PINCFG(PEX_L1_RST_N_PDD5, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PEX_L1_CLKREQ_N_PDD6, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(CLK3_OUT_PEE0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(CLK3_REQ_PEE1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(DAP_MCLK1_REQ_PEE2, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(HDMI_CEC_PEE3, CEC, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + /* + * Leave SDMMC3_CLK_LB_OUT muxed as SDMMC3 with output driver enabled aka not + * tristated and input driver enabled as well as it features some magic + * properties even though the external loopback is disabled and the internal + * loopback used as per SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1 bits + * being set to 0xfffd according to the TRM! + */ + PINCFG(SDMMC3_CLK_LB_OUT_PEE4, SDMMC3, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC3_CLK_LB_IN_PEE5, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(DP_HPD_PFF0, DP, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(USB_VBUS_EN2_PFF1, RSVD2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PFF2, RSVD2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(CORE_PWR_REQ, PWRON, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PWR_INT_N, PMI, UP, TRISTATE, INPUT, DEFAULT, DEFAULT), + PINCFG(RESET_OUT_N, RESET_OUT_N, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(OWR, RSVD2, NORMAL, TRISTATE, OUTPUT, DEFAULT, NORMAL), + PINCFG(CLK_32K_IN, CLK, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), + PINCFG(JTAG_RTCK, RTCK, UP, NORMAL, OUTPUT, DEFAULT, DEFAULT), +}; + +#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \ + { \ + .drvgrp = PMUX_DRVGRP_##_drvgrp, \ + .slwf = _slwf, \ + .slwr = _slwr, \ + .drvup = _drvup, \ + .drvdn = _drvdn, \ + .lpmd = PMUX_LPMD_##_lpmd, \ + .schmt = PMUX_SCHMT_##_schmt, \ + .hsm = PMUX_HSM_##_hsm, \ + } + +static const struct pmux_drvgrp_config apalis_tk1_drvgrps[] = { +}; + +#endif /* PINMUX_CONFIG_APALIS_TK1_H */ diff --git a/board/tqc/tqm5200/tqm5200.c b/board/tqc/tqm5200/tqm5200.c index fef9d2b29a..92db093dbf 100644 --- a/board/tqc/tqm5200/tqm5200.c +++ b/board/tqc/tqm5200/tqm5200.c @@ -128,12 +128,12 @@ static void sdram_start (int hi_addr) #endif /* - * ATTENTION: Although partially referenced initdram does NOT make real use + * ATTENTION: Although partially referenced dram_init does NOT make real use * use of CONFIG_SYS_SDRAM_BASE. The code does not work if CONFIG_SYS_SDRAM_BASE * is something else than 0x00000000. */ -phys_size_t initdram (int board_type) +int dram_init(void) { ulong dramsize = 0; ulong dramsize2 = 0; @@ -252,10 +252,12 @@ phys_size_t initdram (int board_type) } #if defined(CONFIG_TQM5200_B) - return dramsize + dramsize2; + gd->ram_size = dramsize + dramsize2; #else - return dramsize; + gd->ram_size = dramsize; #endif /* CONFIG_TQM5200_B */ + + return 0; } int checkboard (void) diff --git a/board/tqc/tqm834x/tqm834x.c b/board/tqc/tqm834x/tqm834x.c index eca218c9cf..4642342bfb 100644 --- a/board/tqc/tqm834x/tqm834x.c +++ b/board/tqc/tqm834x/tqm834x.c @@ -66,7 +66,7 @@ int board_early_init_r (void) { /************************************************************************** * DRAM initalization and size detection */ -phys_size_t initdram (int board_type) +int dram_init(void) { long bank_size; long size; @@ -112,7 +112,9 @@ phys_size_t initdram (int board_type) if(size < DDR_MAX_SIZE_PER_CS) break; } - return size; + gd->ram_size = size; + + return 0; } /************************************************************************** diff --git a/board/tqc/tqm8xx/tqm8xx.c b/board/tqc/tqm8xx/tqm8xx.c index 6d17830575..58bd7fae47 100644 --- a/board/tqc/tqm8xx/tqm8xx.c +++ b/board/tqc/tqm8xx/tqm8xx.c @@ -126,13 +126,14 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -phys_size_t initdram (int board_type) +int dram_init(void) { volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; long int size8, size9, size10; long int size_b0 = 0; long int size_b1 = 0; + int board_type = gd->board_type; upmconfig (UPMA, (uint *) sdram_table, sizeof (sdram_table) / sizeof (uint)); @@ -389,7 +390,9 @@ phys_size_t initdram (int board_type) memctl->memc_or5 = CONFIG_SYS_OR5_ISP1362; memctl->memc_br5 = CONFIG_SYS_BR5_ISP1362; #endif /* CONFIG_ISP1362_USB */ - return (size_b0 + size_b1); + gd->ram_size = size_b0 + size_b1; + + return 0; } /* ------------------------------------------------------------------------- */ diff --git a/board/v38b/v38b.c b/board/v38b/v38b.c index a337729916..73227c1b15 100644 --- a/board/v38b/v38b.c +++ b/board/v38b/v38b.c @@ -13,6 +13,7 @@ #include <net.h> #include <asm/processor.h> +DECLARE_GLOBAL_DATA_PTR; #ifndef CONFIG_SYS_RAMBOOT static void sdram_start(int hi_addr) @@ -56,7 +57,7 @@ static void sdram_start(int hi_addr) #endif /* !CONFIG_SYS_RAMBOOT */ -phys_size_t initdram(int board_type) +int dram_init(void) { ulong dramsize = 0; ulong dramsize2 = 0; @@ -166,7 +167,9 @@ phys_size_t initdram(int board_type) __asm__ volatile ("sync"); } - return dramsize + dramsize2; + gd->ram_size = dramsize + dramsize2; + + return 0; } diff --git a/board/varisys/cyrus/ddr.c b/board/varisys/cyrus/ddr.c index bb1d29a94c..2ba7b3a3ea 100644 --- a/board/varisys/cyrus/ddr.c +++ b/board/varisys/cyrus/ddr.c @@ -168,7 +168,7 @@ found: popts->ddr_cdr1 = DDR_CDR1_DHC_EN; } -phys_size_t initdram(int board_type) +int dram_init(void) { phys_size_t dram_size; @@ -184,5 +184,7 @@ phys_size_t initdram(int board_type) dram_size *= 0x100000; debug(" DDR: "); - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/ve8313/ve8313.c b/board/ve8313/ve8313.c index 7f24a30688..3818ab96b3 100644 --- a/board/ve8313/ve8313.c +++ b/board/ve8313/ve8313.c @@ -88,7 +88,7 @@ static long fixed_sdram(void) return msize; } -phys_size_t initdram(int board_type) +int dram_init(void) { volatile immap_t *im = (volatile immap_t *)CONFIG_SYS_IMMR; volatile fsl_lbc_t *lbc = &im->im_lbc; @@ -106,7 +106,9 @@ phys_size_t initdram(int board_type) sync(); /* return total bus SDRAM size(bytes) -- DDR */ - return msize; + gd->ram_size = msize; + + return 0; } #define VE8313_WDT_EN 0x00020000 diff --git a/board/xes/xpedite1000/xpedite1000.c b/board/xes/xpedite1000/xpedite1000.c index 3b8a6683eb..ef646fa4a1 100644 --- a/board/xes/xpedite1000/xpedite1000.c +++ b/board/xes/xpedite1000/xpedite1000.c @@ -116,9 +116,11 @@ int checkboard(void) return 0; } -phys_size_t initdram(int board_type) +int dram_init(void) { - return spd_sdram(); + gd->ram_size = spd_sdram(); + + return 0; } /* diff --git a/board/xes/xpedite517x/xpedite517x.c b/board/xes/xpedite517x/xpedite517x.c index 0028870db0..19b96f636d 100644 --- a/board/xes/xpedite517x/xpedite517x.c +++ b/board/xes/xpedite517x/xpedite517x.c @@ -13,6 +13,8 @@ #include <pca953x.h> #include "../common/fsl_8xxx_misc.h" +DECLARE_GLOBAL_DATA_PTR; + #if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_PCI) extern void ft_board_pci_setup(void *blob, bd_t *bd); #endif @@ -56,7 +58,7 @@ int board_early_init_r(void) return 0; } -phys_size_t initdram(int board_type) +int dram_init(void) { phys_size_t dram_size = fsl_ddr_sdram(); @@ -65,7 +67,9 @@ phys_size_t initdram(int board_type) ddr_enable_ecc(dram_size); #endif - return dram_size; + gd->ram_size = dram_size; + + return 0; } #if defined(CONFIG_OF_BOARD_SETUP) diff --git a/board/xilinx/microblaze-generic/microblaze-generic.c b/board/xilinx/microblaze-generic/microblaze-generic.c index ccd4ec955b..aa55ebad38 100644 --- a/board/xilinx/microblaze-generic/microblaze-generic.c +++ b/board/xilinx/microblaze-generic/microblaze-generic.c @@ -25,10 +25,12 @@ static int reset_pin = -1; ulong ram_base; -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = ram_base; gd->bd->bi_dram[0].size = get_effective_memsize(); + + return 0; } int dram_init(void) diff --git a/board/xilinx/ppc405-generic/xilinx_ppc405_generic.c b/board/xilinx/ppc405-generic/xilinx_ppc405_generic.c index 3729f07624..be6b4dc5b9 100644 --- a/board/xilinx/ppc405-generic/xilinx_ppc405_generic.c +++ b/board/xilinx/ppc405-generic/xilinx_ppc405_generic.c @@ -10,6 +10,8 @@ #include <common.h> #include <asm/processor.h> +DECLARE_GLOBAL_DATA_PTR; + ulong get_PCI_freq(void) { return 0; @@ -21,10 +23,12 @@ int checkboard(void) return 0; } -phys_size_t initdram(int board_type) +int dram_init(void) { - return get_ram_size(XPAR_DDR2_SDRAM_MEM_BASEADDR, + gd->ram_size = get_ram_size(XPAR_DDR2_SDRAM_MEM_BASEADDR, CONFIG_SYS_SDRAM_SIZE_MB * 1024 * 1024); + + return 0; } void get_sys_info(sys_info_t *sys_info) diff --git a/board/xilinx/ppc440-generic/xilinx_ppc440_generic.c b/board/xilinx/ppc440-generic/xilinx_ppc440_generic.c index d823352930..07a3ab7f82 100644 --- a/board/xilinx/ppc440-generic/xilinx_ppc440_generic.c +++ b/board/xilinx/ppc440-generic/xilinx_ppc440_generic.c @@ -11,16 +11,20 @@ #include <netdev.h> #include <asm/processor.h> +DECLARE_GLOBAL_DATA_PTR; + int checkboard(void) { puts("Xilinx PPC440 Generic Board\n"); return 0; } -phys_size_t initdram(int board_type) +int dram_init(void) { - return get_ram_size(XPAR_DDR2_SDRAM_MEM_BASEADDR, + gd->ram_size = get_ram_size(XPAR_DDR2_SDRAM_MEM_BASEADDR, CONFIG_SYS_SDRAM_SIZE_MB * 1024 * 1024); + + return 0; } void get_sys_info(sys_info_t *sys_info) diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c index 6a3cbe0a0d..b2fbecf6de 100644 --- a/board/xilinx/zynq/board.c +++ b/board/xilinx/zynq/board.c @@ -130,9 +130,11 @@ int zynq_board_read_rom_ethaddr(unsigned char *ethaddr) } #if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE) -void dram_init_banksize(void) +int dram_init_banksize(void) { fdtdec_setup_memory_banksize(); + + return 0; } int dram_init(void) diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index 4e5871b76a..3849b5885d 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -180,9 +180,11 @@ int zynq_board_read_rom_ethaddr(unsigned char *ethaddr) } #if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE) -void dram_init_banksize(void) +int dram_init_banksize(void) { fdtdec_setup_memory_banksize(); + + return 0; } int dram_init(void) diff --git a/board/zipitz2/zipitz2.c b/board/zipitz2/zipitz2.c index d3ca939238..e81d6ff18d 100644 --- a/board/zipitz2/zipitz2.c +++ b/board/zipitz2/zipitz2.c @@ -69,10 +69,12 @@ void usb_board_stop(void) } #endif -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + + return 0; } #ifdef CONFIG_CMD_MMC |