18 files changed, 161 insertions, 701 deletions

diff --git a/drivers/ata/sata_sil.c b/drivers/ata/sata_sil.c
index 7e4e97d803..dda712f42c 100644
--- a/drivers/ata/sata_sil.c
+++ b/drivers/ata/sata_sil.c
@@ -27,11 +27,7 @@
 
 #include "sata_sil.h"
 
-#ifdef CONFIG_DM_PCI
 #define virt_to_bus(devno, v)	dm_pci_virt_to_mem(devno, (void *) (v))
-#else
-#define virt_to_bus(devno, v)	pci_virt_to_mem(devno, (void *) (v))
-#endif
 
 /* just compatible ahci_ops */
 struct sil_ops {
@@ -616,11 +612,7 @@ static int sil_init_sata(struct udevice *uc_dev, int dev)
 #else
 	priv->sil_sata_desc[dev] = sata;
 	priv->port_num = dev;
-#ifdef CONFIG_DM_PCI
 	sata->devno = uc_dev->parent;
-#else
-	sata->devno = sata_info.devno;
-#endif	/* CONFIG_DM_PCI */
 #endif
 	sata->id = dev;
 	sata->port = port;
diff --git a/drivers/ata/sata_sil.h b/drivers/ata/sata_sil.h
index a300c0c388..bea4322c91 100644
--- a/drivers/ata/sata_sil.h
+++ b/drivers/ata/sata_sil.h
@@ -21,11 +21,7 @@ struct sil_sata {
 	u16		pio;
 	u16		mwdma;
 	u16		udma;
-#ifdef CONFIG_DM_PCI
 	struct udevice	*devno;
-#else
-	pci_dev_t	devno;
-#endif
 	int		wcache;
 	int		flush;
 	int		flush_ext;
diff --git a/drivers/bios_emulator/atibios.c b/drivers/bios_emulator/atibios.c
index 6c7cc24cbd..9547470a2f 100644
--- a/drivers/bios_emulator/atibios.c
+++ b/drivers/bios_emulator/atibios.c
@@ -230,19 +230,12 @@ This function executes the BIOS POST code on the controller. We assume that
 at this stage the controller has its I/O and memory space enabled and
 that all other controllers are in a disabled state.
 ****************************************************************************/
-#ifdef CONFIG_DM_PCI
 static void PCI_doBIOSPOST(struct udevice *pcidev, BE_VGAInfo *vga_info,
 			   int vesa_mode, struct vbe_mode_info *mode_info)
-#else
-static void PCI_doBIOSPOST(pci_dev_t pcidev, BE_VGAInfo *vga_info,
-			   int vesa_mode, struct vbe_mode_info *mode_info)
-#endif
 {
 	RMREGS regs;
 	RMSREGS sregs;
-#ifdef CONFIG_DM_PCI
 	pci_dev_t bdf;
-#endif
 
 	/* Determine the value to store in AX for BIOS POST. Per the PCI specs,
 	 AH must contain the bus and AL must contain the devfn, encoded as
@@ -250,14 +243,9 @@ static void PCI_doBIOSPOST(pci_dev_t pcidev, BE_VGAInfo *vga_info,
 	 */
 	memset(&regs, 0, sizeof(regs));
 	memset(&sregs, 0, sizeof(sregs));
-#ifdef CONFIG_DM_PCI
 	bdf = dm_pci_get_bdf(pcidev);
 	regs.x.ax = (int)PCI_BUS(bdf) << 8 |
 			(int)PCI_DEV(bdf) << 3 | (int)PCI_FUNC(bdf);
-#else
-	regs.x.ax = ((int)PCI_BUS(pcidev) << 8) |
-	    ((int)PCI_DEV(pcidev) << 3) | (int)PCI_FUNC(pcidev);
-#endif
 	/*Setup the X86 emulator for the VGA BIOS*/
 	BE_setVGA(vga_info);
 
@@ -300,28 +288,15 @@ NOTE: This function leaves the original memory aperture disabled by leaving
       it programmed to all 1's. It must be restored to the correct value
       later.
 ****************************************************************************/
-#ifdef CONFIG_DM_PCI
 static u32 PCI_findBIOSAddr(struct udevice *pcidev, int *bar)
-#else
-static u32 PCI_findBIOSAddr(pci_dev_t pcidev, int *bar)
-#endif
 {
 	u32 base, size;
 
 	for (*bar = 0x10; *bar <= 0x14; (*bar) += 4) {
-#ifdef CONFIG_DM_PCI
 		dm_pci_read_config32(pcidev, *bar, &base);
-#else
-		pci_read_config_dword(pcidev, *bar, &base);
-#endif
 		if (!(base & 0x1)) {
-#ifdef CONFIG_DM_PCI
 			dm_pci_write_config32(pcidev, *bar, 0xFFFFFFFF);
 			dm_pci_read_config32(pcidev, *bar, &size);
-#else
-			pci_write_config_dword(pcidev, *bar, 0xFFFFFFFF);
-			pci_read_config_dword(pcidev, *bar, &size);
-#endif
 			size = ~(size & ~0xFF) + 1;
 			if (size >= MAX_BIOSLEN)
 				return base & ~0xFF;
@@ -344,19 +319,11 @@ necessary).
 Anyway to fix this we change all I/O mapped base registers and
 chop off the top bits.
 ****************************************************************************/
-#ifdef CONFIG_DM_PCI
 static void PCI_fixupIObase(struct udevice *pcidev, int reg, u32 *base)
-#else
-static void PCI_fixupIObase(pci_dev_t pcidev, int reg, u32 * base)
-#endif
 {
 	if ((*base & 0x1) && (*base > 0xFFFE)) {
 		*base &= 0xFFFF;
-#ifdef CONFIG_DM_PCI
 		dm_pci_write_config32(pcidev, reg, *base);
-#else
-		pci_write_config_dword(pcidev, reg, *base);
-#endif
 
 	}
 }
@@ -371,30 +338,18 @@ Pointers to the mapped BIOS image
 REMARKS:
 Maps a pointer to the BIOS image on the graphics card on the PCI bus.
 ****************************************************************************/
-#ifdef CONFIG_DM_PCI
 void *PCI_mapBIOSImage(struct udevice *pcidev)
-#else
-void *PCI_mapBIOSImage(pci_dev_t pcidev)
-#endif
 {
 	u32 BIOSImageBus;
 	int BIOSImageBAR;
 	u8 *BIOSImage;
 
 	/*Save PCI BAR registers that might get changed*/
-#ifdef CONFIG_DM_PCI
 	dm_pci_read_config32(pcidev, PCI_ROM_ADDRESS, &saveROMBaseAddress);
 	dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_0, &saveBaseAddress10);
 	dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
 	dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_2, &saveBaseAddress18);
 	dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);
-#else
-	pci_read_config_dword(pcidev, PCI_ROM_ADDRESS, &saveROMBaseAddress);
-	pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_0, &saveBaseAddress10);
-	pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
-	pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_2, &saveBaseAddress18);
-	pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);
-#endif
 
 	/*Fix up I/O base registers to less than 64K */
 	if(saveBaseAddress14 != 0)
@@ -413,21 +368,12 @@ void *PCI_mapBIOSImage(pci_dev_t pcidev)
 		return NULL;
 	}
 
-#ifdef CONFIG_DM_PCI
 	BIOSImage = dm_pci_bus_to_virt(pcidev, BIOSImageBus,
 				       PCI_REGION_MEM, 0, MAP_NOCACHE);
 
 	/*Change the PCI BAR registers to map it onto the bus.*/
 	dm_pci_write_config32(pcidev, BIOSImageBAR, 0);
 	dm_pci_write_config32(pcidev, PCI_ROM_ADDRESS, BIOSImageBus | 0x1);
-#else
-	BIOSImage = pci_bus_to_virt(pcidev, BIOSImageBus,
-				    PCI_REGION_MEM, 0, MAP_NOCACHE);
-
-	/*Change the PCI BAR registers to map it onto the bus.*/
-	pci_write_config_dword(pcidev, BIOSImageBAR, 0);
-	pci_write_config_dword(pcidev, PCI_ROM_ADDRESS, BIOSImageBus | 0x1);
-#endif
 	udelay(1);
 
 	/*Check that the BIOS image is valid. If not fail, or return the
@@ -447,7 +393,6 @@ pcidev	- PCI device info for the video card on the bus
 REMARKS:
 Unmaps the BIOS image for the device and restores framebuffer mappings
 ****************************************************************************/
-#ifdef CONFIG_DM_PCI
 void PCI_unmapBIOSImage(struct udevice *pcidev, void *BIOSImage)
 {
 	dm_pci_write_config32(pcidev, PCI_ROM_ADDRESS, saveROMBaseAddress);
@@ -456,16 +401,6 @@ void PCI_unmapBIOSImage(struct udevice *pcidev, void *BIOSImage)
 	dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_2, saveBaseAddress18);
 	dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_4, saveBaseAddress20);
 }
-#else
-void PCI_unmapBIOSImage(pci_dev_t pcidev, void *BIOSImage)
-{
-	pci_write_config_dword(pcidev, PCI_ROM_ADDRESS, saveROMBaseAddress);
-	pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_0, saveBaseAddress10);
-	pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_1, saveBaseAddress14);
-	pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_2, saveBaseAddress18);
-	pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_4, saveBaseAddress20);
-}
-#endif
 
 /****************************************************************************
 PARAMETERS:
@@ -479,22 +414,14 @@ REMARKS:
 Loads and POST's the display controllers BIOS, directly from the BIOS
 image we can extract over the PCI bus.
 ****************************************************************************/
-#ifdef CONFIG_DM_PCI
 static int PCI_postController(struct udevice *pcidev, uchar *bios_rom,
 			      int bios_len, BE_VGAInfo *vga_info,
 			      int vesa_mode, struct vbe_mode_info *mode_info)
-#else
-static int PCI_postController(pci_dev_t pcidev, uchar *bios_rom, int bios_len,
-			      BE_VGAInfo *vga_info, int vesa_mode,
-			      struct vbe_mode_info *mode_info)
-#endif
 {
 	u32 bios_image_len;
 	uchar *mapped_bios;
 	uchar *copy_of_bios;
-#ifdef CONFIG_DM_PCI
 	pci_dev_t bdf;
-#endif
 
 	if (bios_rom) {
 		copy_of_bios = bios_rom;
@@ -522,16 +449,10 @@ static int PCI_postController(pci_dev_t pcidev, uchar *bios_rom, int bios_len,
 	}
 
 	/*Save information in vga_info structure*/
-#ifdef CONFIG_DM_PCI
 	bdf = dm_pci_get_bdf(pcidev);
 	vga_info->function = PCI_FUNC(bdf);
 	vga_info->device = PCI_DEV(bdf);
 	vga_info->bus = PCI_BUS(bdf);
-#else
-	vga_info->function = PCI_FUNC(pcidev);
-	vga_info->device = PCI_DEV(pcidev);
-	vga_info->bus = PCI_BUS(pcidev);
-#endif
 	vga_info->pcidev = pcidev;
 	vga_info->BIOSImage = copy_of_bios;
 	vga_info->BIOSImageLen = bios_image_len;
@@ -549,22 +470,13 @@ static int PCI_postController(pci_dev_t pcidev, uchar *bios_rom, int bios_len,
 	return true;
 }
 
-#ifdef CONFIG_DM_PCI
 int biosemu_setup(struct udevice *pcidev, BE_VGAInfo **vga_infop)
-#else
-int biosemu_setup(pci_dev_t pcidev, BE_VGAInfo **vga_infop)
-#endif
 {
 	BE_VGAInfo *VGAInfo;
-#ifdef CONFIG_DM_PCI
 	pci_dev_t bdf = dm_pci_get_bdf(pcidev);
 
 	printf("videoboot: Booting PCI video card bus %d, function %d, device %d\n",
 	       PCI_BUS(bdf), PCI_FUNC(bdf), PCI_DEV(bdf));
-#else
-	printf("videoboot: Booting PCI video card bus %d, function %d, device %d\n",
-	       PCI_BUS(pcidev), PCI_FUNC(pcidev), PCI_DEV(pcidev));
-#endif
 	/*Initialise the x86 BIOS emulator*/
 	if ((VGAInfo = malloc(sizeof(*VGAInfo))) == NULL) {
 		printf("videoboot: Out of memory!\n");
@@ -582,15 +494,9 @@ void biosemu_set_interrupt_handler(int intnum, int (*int_func)(void))
 	X86EMU_setupIntrFunc(intnum, (X86EMU_intrFuncs)int_func);
 }
 
-#ifdef CONFIG_DM_PCI
 int biosemu_run(struct udevice *pcidev, uchar *bios_rom, int bios_len,
 		BE_VGAInfo *vga_info, int clean_up, int vesa_mode,
 		struct vbe_mode_info *mode_info)
-#else
-int biosemu_run(pci_dev_t pcidev, uchar *bios_rom, int bios_len,
-		BE_VGAInfo *vga_info, int clean_up, int vesa_mode,
-		struct vbe_mode_info *mode_info)
-#endif
 {
 	/*Post all the display controller BIOS'es*/
 	if (!PCI_postController(pcidev, bios_rom, bios_len, vga_info,
@@ -623,12 +529,8 @@ REMARKS:
 Boots the PCI/AGP video card on the bus using the Video ROM BIOS image
 and the X86 BIOS emulator module.
 ****************************************************************************/
-#ifdef CONFIG_DM_PCI
 int BootVideoCardBIOS(struct udevice *pcidev, BE_VGAInfo **pVGAInfo,
 		      int clean_up)
-#else
-int BootVideoCardBIOS(pci_dev_t pcidev, BE_VGAInfo **pVGAInfo, int clean_up)
-#endif
 {
 	BE_VGAInfo *VGAInfo;
 	int ret;
diff --git a/drivers/bios_emulator/bios.c b/drivers/bios_emulator/bios.c
index 77c7f94bc6..9596a1fdd3 100644
--- a/drivers/bios_emulator/bios.c
+++ b/drivers/bios_emulator/bios.c
@@ -185,21 +185,12 @@ static void X86API int1A(int unused)
 	case 0xB103:		/* Find PCI class code */
 		M.x86.R_AH = DEVICE_NOT_FOUND;
 #ifdef __KERNEL__
-#ifdef CONFIG_DM_PCI
 		dm_pci_read_config8(_BE_env.vgaInfo.pcidev, PCI_CLASS_PROG,
 				    &interface);
 		dm_pci_read_config8(_BE_env.vgaInfo.pcidev, PCI_CLASS_DEVICE,
 				    &subclass);
 		dm_pci_read_config8(_BE_env.vgaInfo.pcidev,
 				    PCI_CLASS_DEVICE + 1, &baseclass);
-#else
-		pci_read_config_byte(_BE_env.vgaInfo.pcidev, PCI_CLASS_PROG,
-				     &interface);
-		pci_read_config_byte(_BE_env.vgaInfo.pcidev, PCI_CLASS_DEVICE,
-				     &subclass);
-		pci_read_config_byte(_BE_env.vgaInfo.pcidev,
-				     PCI_CLASS_DEVICE + 1, &baseclass);
-#endif
 		if (M.x86.R_CL == interface && M.x86.R_CH == subclass
 		    && (u8) (M.x86.R_ECX >> 16) == baseclass) {
 #else
@@ -218,13 +209,8 @@ static void X86API int1A(int unused)
 		if (M.x86.R_BX == pciSlot) {
 			M.x86.R_AH = SUCCESSFUL;
 #ifdef __KERNEL__
-# ifdef CONFIG_DM_PCI
 			dm_pci_read_config8(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
 					    &M.x86.R_CL);
-# else
-			pci_read_config_byte(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
-					     &M.x86.R_CL);
-# endif
 #else
 			M.x86.R_CL =
 			    (u8) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_BYTE,
@@ -238,13 +224,8 @@ static void X86API int1A(int unused)
 		if (M.x86.R_BX == pciSlot) {
 			M.x86.R_AH = SUCCESSFUL;
 #ifdef __KERNEL__
-# ifdef CONFIG_DM_PCI
 			dm_pci_read_config16(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
 					     &M.x86.R_CX);
-# else
-			pci_read_config_word(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
-					     &M.x86.R_CX);
-# endif
 #else
 			M.x86.R_CX =
 			    (u16) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_WORD,
@@ -258,13 +239,8 @@ static void X86API int1A(int unused)
 		if (M.x86.R_BX == pciSlot) {
 			M.x86.R_AH = SUCCESSFUL;
 #ifdef __KERNEL__
-# ifdef CONFIG_DM_PCI
 			dm_pci_read_config32(_BE_env.vgaInfo.pcidev,
 					     M.x86.R_DI, &M.x86.R_ECX);
-# else
-			pci_read_config_dword(_BE_env.vgaInfo.pcidev,
-					      M.x86.R_DI, &M.x86.R_ECX);
-# endif
 #else
 			M.x86.R_ECX =
 			    (u32) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_DWORD,
@@ -278,13 +254,8 @@ static void X86API int1A(int unused)
 		if (M.x86.R_BX == pciSlot) {
 			M.x86.R_AH = SUCCESSFUL;
 #ifdef __KERNEL__
-# ifdef CONFIG_DM_PCI
 			dm_pci_write_config8(_BE_env.vgaInfo.pcidev,
 					     M.x86.R_DI, M.x86.R_CL);
-# else
-			pci_write_config_byte(_BE_env.vgaInfo.pcidev,
-					      M.x86.R_DI, M.x86.R_CL);
-# endif
 #else
 			PCI_accessReg(M.x86.R_DI, M.x86.R_CL, PCI_WRITE_BYTE,
 				      _BE_env.vgaInfo.pciInfo);
@@ -297,13 +268,8 @@ static void X86API int1A(int unused)
 		if (M.x86.R_BX == pciSlot) {
 			M.x86.R_AH = SUCCESSFUL;
 #ifdef __KERNEL__
-# ifdef CONFIG_DM_PCI
 			dm_pci_write_config32(_BE_env.vgaInfo.pcidev,
 					      M.x86.R_DI, M.x86.R_CX);
-# else
-			pci_write_config_word(_BE_env.vgaInfo.pcidev,
-					      M.x86.R_DI, M.x86.R_CX);
-# endif
 #else
 			PCI_accessReg(M.x86.R_DI, M.x86.R_CX, PCI_WRITE_WORD,
 				      _BE_env.vgaInfo.pciInfo);
@@ -316,13 +282,8 @@ static void X86API int1A(int unused)
 		if (M.x86.R_BX == pciSlot) {
 			M.x86.R_AH = SUCCESSFUL;
 #ifdef __KERNEL__
-# ifdef CONFIG_DM_PCI
 			dm_pci_write_config32(_BE_env.vgaInfo.pcidev,
 					      M.x86.R_DI, M.x86.R_ECX);
-# else
-			pci_write_config_dword(_BE_env.vgaInfo.pcidev,
-					       M.x86.R_DI, M.x86.R_ECX);
-# endif
 #else
 			PCI_accessReg(M.x86.R_DI, M.x86.R_ECX, PCI_WRITE_DWORD,
 				      _BE_env.vgaInfo.pciInfo);
diff --git a/drivers/core/fdtaddr.c b/drivers/core/fdtaddr.c
index b9874c743d..4ffbd6b2eb 100644
--- a/drivers/core/fdtaddr.c
+++ b/drivers/core/fdtaddr.c
@@ -200,8 +200,7 @@ fdt_addr_t devfdt_get_addr_pci(const struct udevice *dev)
 	ulong addr;
 
 	addr = devfdt_get_addr(dev);
-	if (CONFIG_IS_ENABLED(PCI) && IS_ENABLED(CONFIG_DM_PCI) &&
-	    addr == FDT_ADDR_T_NONE) {
+	if (CONFIG_IS_ENABLED(PCI) && addr == FDT_ADDR_T_NONE) {
 		struct fdt_pci_addr pci_addr;
 		u32 bar;
 		int ret;
diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index 117d35ac49..3146dfd032 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -146,6 +146,9 @@ int uclass_get(enum uclass_id id, struct uclass **ucp)
 {
 	struct uclass *uc;
 
+	/* Immediately fail if driver model is not set up */
+	if (!gd->uclass_root)
+		return -EDEADLK;
 	*ucp = NULL;
 	uc = uclass_find(id);
 	if (!uc) {
diff --git a/drivers/core/util.c b/drivers/core/util.c
index 91e93b0cf1..5be4ee79de 100644
--- a/drivers/core/util.c
+++ b/drivers/core/util.c
@@ -11,17 +11,6 @@
 #include <linux/libfdt.h>
 #include <vsprintf.h>
 
-#if CONFIG_IS_ENABLED(DM_WARN)
-void dm_warn(const char *fmt, ...)
-{
-	va_list args;
-
-	va_start(args, fmt);
-	vprintf(fmt, args);
-	va_end(args);
-}
-#endif
-
 int list_count_items(struct list_head *head)
 {
 	struct list_head *node;
diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index 83d7a4e403..bdfdec98a0 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -19,7 +19,6 @@ obj-$(CONFIG_PCI_GT64120) += pci_gt64120.o
 obj-$(CONFIG_PCI_MPC85XX) += pci_mpc85xx.o
 obj-$(CONFIG_PCI_MSC01) += pci_msc01.o
 obj-$(CONFIG_PCIE_IMX) += pcie_imx.o
-obj-$(CONFIG_FTPCI100) += pci_ftpci100.o
 obj-$(CONFIG_PCI_MVEBU) += pci_mvebu.o
 obj-$(CONFIG_PCI_RCAR_GEN2) += pci-rcar-gen2.o
 obj-$(CONFIG_PCI_RCAR_GEN3) += pci-rcar-gen3.o
diff --git a/drivers/pci/pci_common.c b/drivers/pci/pci_common.c
index 5231b69dc9..02a71da30f 100644
--- a/drivers/pci/pci_common.c
+++ b/drivers/pci/pci_common.c
@@ -99,7 +99,7 @@ __weak int pci_skip_dev(struct pci_controller *hose, pci_dev_t dev)
 	return 0;
 }
 
-#if !defined(CONFIG_DM_PCI) || defined(CONFIG_DM_PCI_COMPAT)
+#if defined(CONFIG_DM_PCI_COMPAT)
 /* Get a virtual address associated with a BAR region */
 void *pci_map_bar(pci_dev_t pdev, int bar, int flags)
 {
@@ -361,4 +361,4 @@ pci_dev_t pci_find_class(uint find_class, int index)
 
 	return -ENODEV;
 }
-#endif /* !CONFIG_DM_PCI || CONFIG_DM_PCI_COMPAT */
+#endif /* CONFIG_DM_PCI_COMPAT */
diff --git a/drivers/pci/pci_ftpci100.c b/drivers/pci/pci_ftpci100.c
deleted file mode 100644
index 32fac878a6..0000000000
--- a/drivers/pci/pci_ftpci100.c
+++ /dev/null
@@ -1,319 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Faraday FTPCI100 PCI Bridge Controller Device Driver Implementation
- *
- * Copyright (C) 2011 Andes Technology Corporation
- * Gavin Guo, Andes Technology Corporation <gavinguo@andestech.com>
- * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
- */
-#include <common.h>
-#include <init.h>
-#include <log.h>
-#include <malloc.h>
-#include <pci.h>
-
-#include <faraday/ftpci100.h>
-
-#include <asm/io.h>
-#include <asm/types.h> /* u32, u16.... used by pci.h */
-
-struct ftpci100_data {
-	unsigned int reg_base;
-	unsigned int io_base;
-	unsigned int mem_base;
-	unsigned int mmio_base;
-	unsigned int ndevs;
-};
-
-static struct pci_config devs[FTPCI100_MAX_FUNCTIONS];
-static struct pci_controller local_hose;
-
-static void setup_pci_bar(unsigned int bus, unsigned int dev, unsigned func,
-		unsigned char header, struct ftpci100_data *priv)
-{
-	struct pci_controller *hose = (struct pci_controller *)&local_hose;
-	unsigned int i, tmp32, bar_no, iovsmem = 1;
-	pci_dev_t dev_nu;
-
-	/* A device is present, add an entry to the array */
-	devs[priv->ndevs].bus = bus;
-	devs[priv->ndevs].dev = dev;
-	devs[priv->ndevs].func = func;
-
-	dev_nu = PCI_BDF(bus, dev, func);
-
-	if ((header & 0x7f) == 0x01)
-		/* PCI-PCI Bridge */
-		bar_no = 2;
-	else
-		bar_no = 6;
-
-	/* Allocate address spaces by configuring BARs */
-	for (i = 0; i < bar_no; i++) {
-		pci_hose_write_config_dword(hose, dev_nu,
-					PCI_BASE_ADDRESS_0 + i * 4, 0xffffffff);
-		pci_hose_read_config_dword(hose, dev_nu,
-					PCI_BASE_ADDRESS_0 + i * 4, &tmp32);
-
-		if (tmp32 == 0x0)
-			continue;
-
-		/* IO space */
-		if (tmp32 & 0x1) {
-			iovsmem = 0;
-			unsigned int size_mask = ~(tmp32 & 0xfffffffc);
-
-			if (priv->io_base & size_mask)
-				priv->io_base = (priv->io_base & ~size_mask) + \
-						 size_mask + 1;
-
-			devs[priv->ndevs].bar[i].addr = priv->io_base;
-			devs[priv->ndevs].bar[i].size = size_mask + 1;
-
-			pci_hose_write_config_dword(hose, dev_nu,
-					PCI_BASE_ADDRESS_0 + i * 4,
-					priv->io_base);
-
-			debug("Allocated IO address 0x%X-" \
-				"0x%X for Bus %d, Device %d, Function %d\n",
-				priv->io_base,
-				priv->io_base + size_mask, bus, dev, func);
-
-			priv->io_base += size_mask + 1;
-		} else {
-			/* Memory space */
-			unsigned int is_64bit = ((tmp32 & 0x6) == 0x4);
-			unsigned int is_pref = tmp32 & 0x8;
-			unsigned int size_mask = ~(tmp32 & 0xfffffff0);
-			unsigned int alloc_base;
-			unsigned int *addr_mem_base;
-
-			if (is_pref)
-				addr_mem_base = &priv->mem_base;
-			else
-				addr_mem_base = &priv->mmio_base;
-
-			alloc_base = *addr_mem_base;
-
-			if (alloc_base & size_mask)
-				alloc_base = (alloc_base & ~size_mask) \
-						+ size_mask + 1;
-
-			pci_hose_write_config_dword(hose, dev_nu,
-					PCI_BASE_ADDRESS_0 + i * 4, alloc_base);
-
-			debug("Allocated %s address 0x%X-" \
-				"0x%X for Bus %d, Device %d, Function %d\n",
-				is_pref ? "MEM" : "MMIO", alloc_base,
-				alloc_base + size_mask, bus, dev, func);
-
-			devs[priv->ndevs].bar[i].addr = alloc_base;
-			devs[priv->ndevs].bar[i].size = size_mask + 1;
-
-			debug("BAR address  BAR size\n");
-			debug("%010x  %08d\n",
-				devs[priv->ndevs].bar[0].addr,
-				devs[priv->ndevs].bar[0].size);
-
-			alloc_base += size_mask + 1;
-			*addr_mem_base = alloc_base;
-
-			if (is_64bit) {
-				i++;
-				pci_hose_write_config_dword(hose, dev_nu,
-					PCI_BASE_ADDRESS_0 + i * 4, 0x0);
-			}
-		}
-	}
-
-	/* Enable Bus Master, Memory Space, and IO Space */
-	pci_hose_read_config_dword(hose, dev_nu, PCI_CACHE_LINE_SIZE, &tmp32);
-	pci_hose_write_config_dword(hose, dev_nu, PCI_CACHE_LINE_SIZE, 0x08);
-	pci_hose_read_config_dword(hose, dev_nu, PCI_CACHE_LINE_SIZE, &tmp32);
-
-	pci_hose_read_config_dword(hose, dev_nu, PCI_COMMAND, &tmp32);
-
-	tmp32 &= 0xffff;
-
-	if (iovsmem == 0)
-		tmp32 |= 0x5;
-	else
-		tmp32 |= 0x6;
-
-	pci_hose_write_config_dword(hose, dev_nu, PCI_COMMAND, tmp32);
-}
-
-static void pci_bus_scan(struct ftpci100_data *priv)
-{
-	struct pci_controller *hose = (struct pci_controller *)&local_hose;
-	unsigned int bus, dev, func;
-	pci_dev_t dev_nu;
-	unsigned int data32;
-	unsigned int tmp;
-	unsigned char header;
-	unsigned char int_pin;
-	unsigned int niobars;
-	unsigned int nmbars;
-
-	priv->ndevs = 1;
-
-	nmbars = 0;
-	niobars = 0;
-
-	for (bus = 0; bus < MAX_BUS_NUM; bus++)
-		for (dev = 0; dev < MAX_DEV_NUM; dev++)
-			for (func = 0; func < MAX_FUN_NUM; func++) {
-				dev_nu = PCI_BDF(bus, dev, func);
-				pci_hose_read_config_dword(hose, dev_nu,
-							PCI_VENDOR_ID, &data32);
-
-				/*
-				 * some broken boards return 0 or ~0,
-				 * if a slot is empty.
-				 */
-				if (data32 == 0xffffffff ||
-					data32 == 0x00000000 ||
-					data32 == 0x0000ffff ||
-					data32 == 0xffff0000)
-					continue;
-
-				pci_hose_read_config_dword(hose, dev_nu,
-							PCI_HEADER_TYPE, &tmp);
-				header = (unsigned char)tmp;
-				setup_pci_bar(bus, dev, func, header, priv);
-
-				devs[priv->ndevs].v_id = (u16)(data32 & \
-								0x0000ffff);
-
-				devs[priv->ndevs].d_id = (u16)((data32 & \
-							0xffff0000) >> 16);
-
-				/* Figure out what INTX# line the card uses */
-				pci_hose_read_config_byte(hose, dev_nu,
-						PCI_INTERRUPT_PIN, &int_pin);
-
-				/* assign the appropriate irq line */
-				if (int_pin > PCI_IRQ_LINES) {
-					printf("more irq lines than expect\n");
-				} else if (int_pin != 0) {
-					/* This device uses an interrupt line */
-					devs[priv->ndevs].pin = int_pin;
-				}
-
-				pci_hose_read_config_dword(hose, dev_nu,
-						PCI_CLASS_DEVICE, &data32);
-
-				debug("%06d  %03d  %03d  " \
-					"%04d  %08x  %08x  " \
-					"%03d  %08x  %06d  %08x\n",
-					priv->ndevs, devs[priv->ndevs].bus,
-					devs[priv->ndevs].dev,
-					devs[priv->ndevs].func,
-					devs[priv->ndevs].d_id,
-					devs[priv->ndevs].v_id,
-					devs[priv->ndevs].pin,
-					devs[priv->ndevs].bar[0].addr,
-					devs[priv->ndevs].bar[0].size,
-					data32 >> 8);
-
-				priv->ndevs++;
-			}
-}
-
-static void ftpci_preinit(struct ftpci100_data *priv)
-{
-	struct ftpci100_ahbc *ftpci100;
-	struct pci_controller *hose = (struct pci_controller *)&local_hose;
-	u32 pci_config_addr;
-	u32 pci_config_data;
-
-	priv->reg_base = CONFIG_FTPCI100_BASE;
-	priv->io_base = CONFIG_FTPCI100_BASE + CONFIG_FTPCI100_IO_SIZE;
-	priv->mmio_base = CONFIG_FTPCI100_MEM_BASE;
-	priv->mem_base = CONFIG_FTPCI100_MEM_BASE + CONFIG_FTPCI100_MEM_SIZE;
-
-	ftpci100 = (struct ftpci100_ahbc *)priv->reg_base;
-
-	pci_config_addr = (u32) &ftpci100->conf;
-	pci_config_data = (u32) &ftpci100->data;
-
-	/* print device name */
-	printf("FTPCI100\n");
-
-	/* dump basic configuration */
-	debug("%s: Config addr is %08X, data port is %08X\n",
-		__func__, pci_config_addr, pci_config_data);
-
-	/* PCI memory space */
-	pci_set_region(hose->regions + 0,
-		CONFIG_PCI_MEM_BUS,
-		CONFIG_PCI_MEM_PHYS,
-		CONFIG_PCI_MEM_SIZE,
-		PCI_REGION_MEM);
-	hose->region_count++;
-
-	/* PCI IO space */
-	pci_set_region(hose->regions + 1,
-		CONFIG_PCI_IO_BUS,
-		CONFIG_PCI_IO_PHYS,
-		CONFIG_PCI_IO_SIZE,
-		PCI_REGION_IO);
-	hose->region_count++;
-
-#if defined(CONFIG_PCI_SYS_BUS)
-	/* PCI System Memory space */
-	pci_set_region(hose->regions + 2,
-		CONFIG_PCI_SYS_BUS,
-		CONFIG_PCI_SYS_PHYS,
-		CONFIG_PCI_SYS_SIZE,
-		PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
-	hose->region_count++;
-#endif
-
-	/* setup indirect read/write function */
-	pci_setup_indirect(hose, pci_config_addr, pci_config_data);
-
-	/* register hose */
-	pci_register_hose(hose);
-}
-
-void pci_ftpci_init(void)
-{
-	struct ftpci100_data *priv = NULL;
-	struct pci_controller *hose = (struct pci_controller *)&local_hose;
-	pci_dev_t bridge_num;
-
-	struct pci_device_id bridge_ids[] = {
-		{FTPCI100_BRIDGE_VENDORID, FTPCI100_BRIDGE_DEVICEID},
-		{0, 0}
-	};
-
-	priv = malloc(sizeof(struct ftpci100_data));
-
-	if (!priv) {
-		printf("%s(): failed to malloc priv\n", __func__);
-		return;
-	}
-
-	memset(priv, 0, sizeof(struct ftpci100_data));
-
-	ftpci_preinit(priv);
-
-	debug("Device  bus  dev  func  deviceID  vendorID  pin  address" \
-		"   size    class\n");
-
-	pci_bus_scan(priv);
-
-	/*
-	 * Setup the PCI Bridge Window to 1GB,
-	 * it will cause USB OHCI Host controller Unrecoverable Error
-	 * if it is not set.
-	 */
-	bridge_num = pci_find_devices(bridge_ids, 0);
-	if (bridge_num == -1) {
-		printf("PCI Bridge not found\n");
-		return;
-	}
-	pci_hose_write_config_dword(hose, bridge_num, PCI_MEM_BASE_SIZE1,
-					FTPCI100_BASE_ADR_SIZE(1024));
-}
diff --git a/drivers/pci/pci_gt64120.c b/drivers/pci/pci_gt64120.c
index e57fedf036..153c65b119 100644
--- a/drivers/pci/pci_gt64120.c
+++ b/drivers/pci/pci_gt64120.c
@@ -114,69 +114,6 @@ static int gt_config_access(struct gt64120_pci_controller *gt,
 	return 0;
 }
 
-#if !IS_ENABLED(CONFIG_DM_PCI)
-static int gt_read_config_dword(struct pci_controller *hose, pci_dev_t dev,
-				int where, u32 *value)
-{
-	struct gt64120_pci_controller *gt = hose_to_gt64120(hose);
-
-	*value = 0xffffffff;
-	return gt_config_access(gt, PCI_ACCESS_READ, dev, where, value);
-}
-
-static int gt_write_config_dword(struct pci_controller *hose, pci_dev_t dev,
-				 int where, u32 value)
-{
-	struct gt64120_pci_controller *gt = hose_to_gt64120(hose);
-	u32 data = value;
-
-	return gt_config_access(gt, PCI_ACCESS_WRITE, dev, where, &data);
-}
-
-void gt64120_pci_init(void *regs, unsigned long sys_bus, unsigned long sys_phys,
-		     unsigned long sys_size, unsigned long mem_bus,
-		     unsigned long mem_phys, unsigned long mem_size,
-		     unsigned long io_bus, unsigned long io_phys,
-		     unsigned long io_size)
-{
-	static struct gt64120_pci_controller global_gt;
-	struct gt64120_pci_controller *gt;
-	struct pci_controller *hose;
-
-	gt = &global_gt;
-	gt->regs = regs;
-
-	hose = &gt->hose;
-
-	hose->first_busno = 0;
-	hose->last_busno = 0;
-
-	/* System memory space */
-	pci_set_region(&hose->regions[0], sys_bus, sys_phys, sys_size,
-		       PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
-
-	/* PCI memory space */
-	pci_set_region(&hose->regions[1], mem_bus, mem_phys, mem_size,
-		       PCI_REGION_MEM);
-
-	/* PCI I/O space */
-	pci_set_region(&hose->regions[2], io_bus, io_phys, io_size,
-		       PCI_REGION_IO);
-
-	hose->region_count = 3;
-
-	pci_set_ops(hose,
-		    pci_hose_read_config_byte_via_dword,
-		    pci_hose_read_config_word_via_dword,
-		    gt_read_config_dword,
-		    pci_hose_write_config_byte_via_dword,
-		    pci_hose_write_config_word_via_dword,
-		    gt_write_config_dword);
-
-	pci_register_hose(hose);
-	hose->last_busno = pci_hose_scan(hose);
-}
-#else
 static int gt64120_pci_read_config(const struct udevice *dev, pci_dev_t bdf,
 				   uint where, ulong *val,
 				   enum pci_size_t size)
@@ -246,4 +183,3 @@ U_BOOT_DRIVER(gt64120_pci) = {
 	.probe		= gt64120_pci_probe,
 	.priv_auto	= sizeof(struct gt64120_pci_controller),
 };
-#endif
diff --git a/drivers/pci/pci_msc01.c b/drivers/pci/pci_msc01.c
index c17da475d0..2f1b688fc3 100644
--- a/drivers/pci/pci_msc01.c
+++ b/drivers/pci/pci_msc01.c
@@ -62,69 +62,6 @@ static int msc01_config_access(struct msc01_pci_controller *msc01,
 	return 0;
 }
 
-#if !IS_ENABLED(CONFIG_DM_PCI)
-static int msc01_read_config_dword(struct pci_controller *hose, pci_dev_t dev,
-				   int where, u32 *value)
-{
-	struct msc01_pci_controller *msc01 = hose_to_msc01(hose);
-
-	*value = 0xffffffff;
-	return msc01_config_access(msc01, PCI_ACCESS_READ, dev, where, value);
-}
-
-static int msc01_write_config_dword(struct pci_controller *hose, pci_dev_t dev,
-				    int where, u32 value)
-{
-	struct msc01_pci_controller *gt = hose_to_msc01(hose);
-	u32 data = value;
-
-	return msc01_config_access(gt, PCI_ACCESS_WRITE, dev, where, &data);
-}
-
-void msc01_pci_init(void *base, unsigned long sys_bus, unsigned long sys_phys,
-		    unsigned long sys_size, unsigned long mem_bus,
-		    unsigned long mem_phys, unsigned long mem_size,
-		    unsigned long io_bus, unsigned long io_phys,
-		    unsigned long io_size)
-{
-	static struct msc01_pci_controller global_msc01;
-	struct msc01_pci_controller *msc01;
-	struct pci_controller *hose;
-
-	msc01 = &global_msc01;
-	msc01->base = base;
-
-	hose = &msc01->hose;
-
-	hose->first_busno = 0;
-	hose->last_busno = 0;
-
-	/* System memory space */
-	pci_set_region(&hose->regions[0], sys_bus, sys_phys, sys_size,
-		       PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
-
-	/* PCI memory space */
-	pci_set_region(&hose->regions[1], mem_bus, mem_phys, mem_size,
-		       PCI_REGION_MEM);
-
-	/* PCI I/O space */
-	pci_set_region(&hose->regions[2], io_bus, io_phys, io_size,
-		       PCI_REGION_IO);
-
-	hose->region_count = 3;
-
-	pci_set_ops(hose,
-		    pci_hose_read_config_byte_via_dword,
-		    pci_hose_read_config_word_via_dword,
-		    msc01_read_config_dword,
-		    pci_hose_write_config_byte_via_dword,
-		    pci_hose_write_config_word_via_dword,
-		    msc01_write_config_dword);
-
-	pci_register_hose(hose);
-	hose->last_busno = pci_hose_scan(hose);
-}
-#else
 static int msc01_pci_read_config(const struct udevice *dev, pci_dev_t bdf,
 				 uint where, ulong *val, enum pci_size_t size)
 {
@@ -192,4 +129,3 @@ U_BOOT_DRIVER(msc01_pci) = {
 	.probe		= msc01_pci_probe,
 	.priv_auto	= sizeof(struct msc01_pci_controller),
 };
-#endif
diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c
index 7b46fdb89a..756166fd3e 100644
--- a/drivers/pci/pcie_imx.c
+++ b/drivers/pci/pcie_imx.c
@@ -681,86 +681,6 @@ static int imx_pcie_link_up(struct imx_pcie_priv *priv)
 	return 0;
 }
 
-#if !CONFIG_IS_ENABLED(DM_PCI)
-static struct imx_pcie_priv imx_pcie_priv = {
-	.dbi_base	= (void __iomem *)MX6_DBI_ADDR,
-	.cfg_base	= (void __iomem *)MX6_ROOT_ADDR,
-};
-
-static struct imx_pcie_priv *priv = &imx_pcie_priv;
-
-static int imx_pcie_read_config(struct pci_controller *hose, pci_dev_t d,
-				int where, u32 *val)
-{
-	struct imx_pcie_priv *priv = hose->priv_data;
-
-	return imx_pcie_read_cfg(priv, d, where, val);
-}
-
-static int imx_pcie_write_config(struct pci_controller *hose, pci_dev_t d,
-				 int where, u32 val)
-{
-	struct imx_pcie_priv *priv = hose->priv_data;
-
-	return imx_pcie_write_cfg(priv, d, where, val);
-}
-
-void imx_pcie_init(void)
-{
-	/* Static instance of the controller. */
-	static struct pci_controller	pcc;
-	struct pci_controller		*hose = &pcc;
-	int ret;
-
-	memset(&pcc, 0, sizeof(pcc));
-
-	hose->priv_data = priv;
-
-	/* PCI I/O space */
-	pci_set_region(&hose->regions[0],
-		       MX6_IO_ADDR, MX6_IO_ADDR,
-		       MX6_IO_SIZE, PCI_REGION_IO);
-
-	/* PCI memory space */
-	pci_set_region(&hose->regions[1],
-		       MX6_MEM_ADDR, MX6_MEM_ADDR,
-		       MX6_MEM_SIZE, PCI_REGION_MEM);
-
-	/* System memory space */
-	pci_set_region(&hose->regions[2],
-		       MMDC0_ARB_BASE_ADDR, MMDC0_ARB_BASE_ADDR,
-		       0xefffffff, PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
-
-	hose->region_count = 3;
-
-	pci_set_ops(hose,
-		    pci_hose_read_config_byte_via_dword,
-		    pci_hose_read_config_word_via_dword,
-		    imx_pcie_read_config,
-		    pci_hose_write_config_byte_via_dword,
-		    pci_hose_write_config_word_via_dword,
-		    imx_pcie_write_config);
-
-	/* Start the controller. */
-	ret = imx_pcie_link_up(priv);
-
-	if (!ret) {
-		pci_register_hose(hose);
-		hose->last_busno = pci_hose_scan(hose);
-	}
-}
-
-void imx_pcie_remove(void)
-{
-	imx6_pcie_assert_core_reset(priv, true);
-}
-
-/* Probe function. */
-void pci_init_board(void)
-{
-	imx_pcie_init();
-}
-#else
 static int imx_pcie_dm_read_config(const struct udevice *dev, pci_dev_t bdf,
 				   uint offset, ulong *value,
 				   enum pci_size_t size)
@@ -852,4 +772,3 @@ U_BOOT_DRIVER(imx_pcie) = {
 	.priv_auto	= sizeof(struct imx_pcie_priv),
 	.flags			= DM_FLAG_OS_PREPARE,
 };
-#endif
diff --git a/drivers/scsi/scsi.c b/drivers/scsi/scsi.c
index ce69750c7f..d93d241928 100644
--- a/drivers/scsi/scsi.c
+++ b/drivers/scsi/scsi.c
@@ -284,7 +284,6 @@ void scsi_init(void)
 	 */
 	for (i = 0; i < ARRAY_SIZE(scsi_device_list); i++) {
 		/* get PCI Device ID */
-#ifdef CONFIG_DM_PCI
 		struct udevice *dev;
 		int ret;
 
@@ -294,11 +293,6 @@ void scsi_init(void)
 			busdevfunc = dm_pci_get_bdf(dev);
 			break;
 		}
-#else
-		busdevfunc = pci_find_device(scsi_device_list[i].vendor,
-					     scsi_device_list[i].device,
-					     0);
-#endif
 		if (busdevfunc != -1)
 			break;
 	}
diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index c62d8feecc..fedf0db9c7 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -54,7 +54,7 @@
 
 #if defined(CONFIG_CPU_ARM920T) || \
 	defined(CONFIG_PCI_OHCI) || \
-	defined(CONFIG_DM_PCI) || \
+	defined(CONFIG_PCI) || \
 	defined(CONFIG_SYS_OHCI_USE_NPS)
 # define OHCI_USE_NPS		/* force NoPowerSwitching mode */
 #endif
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index b69ffcae4b..8b940d70eb 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -470,7 +470,6 @@ config VIDEO_LCD_TDO_TL070WSH30
 
 config VIDEO_LCD_HITACHI_TX18D42VM
 	bool "Hitachi tx18d42vm LVDS LCD panel support"
-	depends on VIDEO
 	default n
 	---help---
 	Support for Hitachi tx18d42vm LVDS LCD panels, these panels have a
@@ -854,6 +853,18 @@ config VIDEO_DT_SIMPLEFB
 	  The video output is initialized by U-Boot, and kept by the
 	  kernel.
 
+config VIDEO_MCDE_SIMPLE
+	bool "Simple driver for ST-Ericsson MCDE with preconfigured display"
+	depends on DM_VIDEO
+	help
+	  Enables a simple display driver for ST-Ericsson MCDE
+	  (Multichannel Display Engine), which reads the configuration from
+	  the MCDE registers.
+
+	  This driver assumes that the display hardware has been initialized
+	  before u-boot starts, and u-boot will simply render to the pre-
+	  allocated frame buffer surface.
+
 config OSD
 	bool "Enable OSD support"
 	depends on DM
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 1c534a6f9a..7ae0ab2b35 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -58,6 +58,7 @@ obj-$(CONFIG_VIDEO_LCD_ORISETECH_OTM8009A) += orisetech_otm8009a.o
 obj-$(CONFIG_VIDEO_LCD_RAYDIUM_RM68200) += raydium-rm68200.o
 obj-$(CONFIG_VIDEO_LCD_SSD2828) += ssd2828.o
 obj-$(CONFIG_VIDEO_LCD_TDO_TL070WSH30) += tdo-tl070wsh30.o
+obj-$(CONFIG_VIDEO_MCDE_SIMPLE) += mcde_simple.o
 obj-${CONFIG_VIDEO_MESON} += meson/
 obj-${CONFIG_VIDEO_MIPI_DSI} += mipi_dsi.o
 obj-$(CONFIG_VIDEO_MVEBU) += mvebu_lcd.o
diff --git a/drivers/video/mcde_simple.c b/drivers/video/mcde_simple.c
new file mode 100644
index 0000000000..0924ceee30
--- /dev/null
+++ b/drivers/video/mcde_simple.c
@@ -0,0 +1,141 @@
+// SPDX-License-Identifier: GPL-2.0+
+/* Copyright (C) 2019 Stephan Gerhold */
+
+#include <common.h>
+#include <dm.h>
+#include <log.h>
+#include <video.h>
+#include <asm/io.h>
+#include <linux/bitfield.h>
+#include <linux/iopoll.h>
+
+#define MCDE_EXTSRC0A0			0x200
+#define MCDE_EXTSRC0CONF		0x20C
+#define MCDE_EXTSRC0CONF_BPP		GENMASK(11, 8)
+#define MCDE_OVL0CONF			0x404
+#define MCDE_OVL0CONF_PPL		GENMASK(10, 0)
+#define MCDE_OVL0CONF_LPF		GENMASK(26, 16)
+#define MCDE_CHNL0SYNCHMOD		0x608
+#define MCDE_CHNL0SYNCHMOD_SRC_SYNCH	GENMASK(1, 0)
+#define MCDE_CHNL0SYNCHSW		0x60C
+#define MCDE_CHNL0SYNCHSW_SW_TRIG	BIT(0)
+#define MCDE_CRA0			0x800
+#define MCDE_CRA0_FLOEN			BIT(0)
+
+#define MCDE_FLOW_COMPLETION_TIMEOUT	200000	/* us */
+
+enum mcde_bpp {
+	MCDE_EXTSRC0CONF_BPP_1BPP_PAL,
+	MCDE_EXTSRC0CONF_BPP_2BPP_PAL,
+	MCDE_EXTSRC0CONF_BPP_4BPP_PAL,
+	MCDE_EXTSRC0CONF_BPP_8BPP_PAL,
+	MCDE_EXTSRC0CONF_BPP_RGB444,
+	MCDE_EXTSRC0CONF_BPP_ARGB4444,
+	MCDE_EXTSRC0CONF_BPP_IRGB1555,
+	MCDE_EXTSRC0CONF_BPP_RGB565,
+	MCDE_EXTSRC0CONF_BPP_RGB888,
+	MCDE_EXTSRC0CONF_BPP_XRGB8888,
+	MCDE_EXTSRC0CONF_BPP_ARGB8888,
+	MCDE_EXTSRC0CONF_BPP_YCBCR422,
+};
+
+enum mcde_src_synch {
+	MCDE_CHNL0SYNCHMOD_SRC_SYNCH_HARDWARE,
+	MCDE_CHNL0SYNCHMOD_SRC_SYNCH_NO_SYNCH,
+	MCDE_CHNL0SYNCHMOD_SRC_SYNCH_SOFTWARE,
+};
+
+struct mcde_simple_priv {
+	fdt_addr_t base;
+	enum mcde_src_synch src_synch;
+};
+
+static int mcde_simple_probe(struct udevice *dev)
+{
+	struct mcde_simple_priv *priv = dev_get_priv(dev);
+	struct video_uc_plat *plat = dev_get_uclass_plat(dev);
+	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
+	u32 val;
+
+	priv->base = dev_read_addr(dev);
+	if (priv->base == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	plat->base = readl(priv->base + MCDE_EXTSRC0A0);
+	if (!plat->base)
+		return -ENODEV;
+
+	val = readl(priv->base + MCDE_OVL0CONF);
+	uc_priv->xsize = FIELD_GET(MCDE_OVL0CONF_PPL, val);
+	uc_priv->ysize = FIELD_GET(MCDE_OVL0CONF_LPF, val);
+	uc_priv->rot = 0;
+
+	val = readl(priv->base + MCDE_EXTSRC0CONF);
+	switch (FIELD_GET(MCDE_EXTSRC0CONF_BPP, val)) {
+	case MCDE_EXTSRC0CONF_BPP_RGB565:
+		uc_priv->bpix = VIDEO_BPP16;
+		break;
+	case MCDE_EXTSRC0CONF_BPP_XRGB8888:
+	case MCDE_EXTSRC0CONF_BPP_ARGB8888:
+		uc_priv->bpix = VIDEO_BPP32;
+		break;
+	default:
+		printf("unsupported format: %#x\n", val);
+		return -EINVAL;
+	}
+
+	val = readl(priv->base + MCDE_CHNL0SYNCHMOD);
+	priv->src_synch = FIELD_GET(MCDE_CHNL0SYNCHMOD_SRC_SYNCH, val);
+
+	plat->size = uc_priv->xsize * uc_priv->ysize * VNBYTES(uc_priv->bpix);
+	debug("MCDE base: %#lx, xsize: %d, ysize: %d, bpp: %d\n",
+	      plat->base, uc_priv->xsize, uc_priv->ysize, VNBITS(uc_priv->bpix));
+
+	video_set_flush_dcache(dev, true);
+	return 0;
+}
+
+static int mcde_simple_video_sync(struct udevice *dev)
+{
+	struct mcde_simple_priv *priv = dev_get_priv(dev);
+	unsigned int val;
+
+	if (priv->src_synch != MCDE_CHNL0SYNCHMOD_SRC_SYNCH_SOFTWARE)
+		return 0;
+
+	/* Enable flow */
+	val = readl(priv->base + MCDE_CRA0);
+	val |= MCDE_CRA0_FLOEN;
+	writel(val, priv->base + MCDE_CRA0);
+
+	/* Trigger a software sync */
+	writel(MCDE_CHNL0SYNCHSW_SW_TRIG, priv->base + MCDE_CHNL0SYNCHSW);
+
+	/* Disable flow */
+	val = readl(priv->base + MCDE_CRA0);
+	val &= ~MCDE_CRA0_FLOEN;
+	writel(val, priv->base + MCDE_CRA0);
+
+	/* Wait for completion */
+	return readl_poll_timeout(priv->base + MCDE_CRA0, val,
+				  !(val & MCDE_CRA0_FLOEN),
+				  MCDE_FLOW_COMPLETION_TIMEOUT);
+}
+
+static struct video_ops mcde_simple_ops = {
+	.video_sync = mcde_simple_video_sync,
+};
+
+static const struct udevice_id mcde_simple_ids[] = {
+	{ .compatible = "ste,mcde" },
+	{ }
+};
+
+U_BOOT_DRIVER(mcde_simple) = {
+	.name		= "mcde_simple",
+	.id		= UCLASS_VIDEO,
+	.ops		= &mcde_simple_ops,
+	.of_match	= mcde_simple_ids,
+	.probe		= mcde_simple_probe,
+	.priv_auto	= sizeof(struct mcde_simple_priv),
+};