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-rw-r--r--include/configs/M5373EVB.h10
-rw-r--r--include/configs/MPC8308RDB.h31
-rw-r--r--include/configs/apollon.h261
-rw-r--r--include/configs/atngw100mkii.h209
-rw-r--r--include/configs/flea3.h1
-rw-r--r--include/configs/microblaze-generic.h12
-rw-r--r--include/configs/mx35pdk.h1
-rw-r--r--include/configs/qemu-mips.h7
-rw-r--r--include/configs/qi_lb60.h1
-rw-r--r--include/configs/trats.h49
-rw-r--r--include/configs/tx25.h1
-rw-r--r--include/dfu.h103
-rw-r--r--include/environment.h12
-rw-r--r--include/ext2fs.h81
-rw-r--r--include/ext4fs.h144
-rw-r--r--include/ext_common.h199
-rw-r--r--include/flash.h1
-rw-r--r--include/fsl_nfc.h113
-rw-r--r--include/g_dnl.h33
-rw-r--r--include/i2c.h12
-rw-r--r--include/linux/mtd/nand.h5
-rw-r--r--include/mmc.h1
-rw-r--r--include/nand.h6
-rw-r--r--include/pci_ids.h16
-rw-r--r--include/sdhci.h9
-rw-r--r--include/search.h26
-rw-r--r--include/serial.h3
-rw-r--r--include/usb/ulpi.h2
28 files changed, 909 insertions, 440 deletions
diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h
index 0d09f0ec61..45d1064557 100644
--- a/include/configs/M5373EVB.h
+++ b/include/configs/M5373EVB.h
@@ -1,7 +1,7 @@
/*
* Configuation settings for the Freescale MCF5373 FireEngine board.
*
- * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
*
* See file CREDITS for list of people who contributed to this
@@ -59,7 +59,7 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_REGINFO
-#ifdef NANDFLASH_SIZE
+#ifdef CONFIG_NANDFLASH_SIZE
# define CONFIG_CMD_NAND
#endif
@@ -208,7 +208,7 @@
# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
#endif
-#ifdef NANDFLASH_SIZE
+#ifdef CONFIG_NANDFLASH_SIZE
# define CONFIG_SYS_MAX_NAND_DEVICE 1
# define CONFIG_SYS_NAND_BASE CONFIG_SYS_CS2_BASE
# define CONFIG_SYS_NAND_SIZE 1
@@ -264,9 +264,9 @@
#define CONFIG_SYS_CS1_MASK 0x001f0001
#define CONFIG_SYS_CS1_CTRL 0x002A3780
-#ifdef NANDFLASH_SIZE
+#ifdef CONFIG_NANDFLASH_SIZE
#define CONFIG_SYS_CS2_BASE 0x20000000
-#define CONFIG_SYS_CS2_MASK ((NANDFLASH_SIZE << 20) | 1)
+#define CONFIG_SYS_CS2_MASK ((CONFIG_NANDFLASH_SIZE << 20) | 1)
#define CONFIG_SYS_CS2_CTRL 0x00001f60
#endif
diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h
index 7f2761c539..2d48dde808 100644
--- a/include/configs/MPC8308RDB.h
+++ b/include/configs/MPC8308RDB.h
@@ -37,6 +37,24 @@
#define CONFIG_MISC_INIT_R
+/* new uImage format support */
+#define CONFIG_FIT 1
+#define CONFIG_FIT_VERBOSE 1
+
+#define CONFIG_MMC 1
+
+#ifdef CONFIG_MMC
+#define CONFIG_FSL_ESDHC
+#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR
+#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
+#define CONFIG_SYS_FSL_ESDHC_USE_PIO
+
+#define CONFIG_CMD_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_CMD_FAT
+#define CONFIG_DOS_PARTITION
+#endif
+
/*
* On-board devices
*
@@ -340,6 +358,19 @@
#define CONFIG_SYS_I2C_OFFSET 0x3000
#define CONFIG_SYS_I2C2_OFFSET 0x3100
+/*
+ * SPI on header J8
+ *
+ * WARNING: enabling this will break TSEC2 (connected to the Vitesse switch)
+ * due to a pinmux conflict between GPIO9 (SPI chip select )and the TSEC2 pins.
+ */
+#ifdef CONFIG_MPC8XXX_SPI
+#define CONFIG_CMD_SPI
+#define CONFIG_USE_SPIFLASH
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_SPANSION
+#define CONFIG_CMD_SF
+#endif
/*
* Board info - revision and where boot from
diff --git a/include/configs/apollon.h b/include/configs/apollon.h
deleted file mode 100644
index b8ca8a849f..0000000000
--- a/include/configs/apollon.h
+++ /dev/null
@@ -1,261 +0,0 @@
-/*
- * (C) Copyright 2005-2008
- * Samsung Electronics,
- * Kyungmin Park <kyungmin.park@samsung.com>
- *
- * Configuration settings for the 2420 Samsung Apollon board.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- */
-#define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
-#define CONFIG_OMAP 1 /* in a TI OMAP core */
-#define CONFIG_OMAP2420 1 /* which is in a 2420 */
-#define CONFIG_OMAP2420_APOLLON 1
-#define CONFIG_APOLLON 1
-#define CONFIG_APOLLON_PLUS 1 /* If you have apollon plus 1.x */
-
-#define CONFIG_ONENAND_U_BOOT y
-
-/* Clock config to target*/
-#define PRCM_CONFIG_I 1
-/* #define PRCM_CONFIG_II 1 */
-
-/* Boot method */
-/* uncomment if you use NOR boot */
-/* #define CONFIG_SYS_NOR_BOOT 1 */
-
-/* uncomment if you use NOR on CS3 */
-/* #define CONFIG_SYS_USE_NOR 1 */
-
-#ifdef CONFIG_SYS_NOR_BOOT
-#undef CONFIG_SYS_USE_NOR
-#define CONFIG_SYS_USE_NOR 1
-#endif
-
-/* uncommnet if you want to use UBI */
-#define CONFIG_SYS_USE_UBI
-
-#include <asm/arch/omap2420.h> /* get chip and board defs */
-
-#define V_SCLK 12000000
-
-/* input clock of PLL */
-/* the OMAP2420 H4 has 12MHz, 13MHz, or 19.2Mhz crystal input */
-#define CONFIG_SYS_CLK_FREQ V_SCLK
-
-#define CONFIG_MISC_INIT_R
-
-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
-#define CONFIG_REVISION_TAG 1
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_ENV_SIZE SZ_128K /* Total Size of Environment Sector */
-#define CONFIG_ENV_SIZE_FLEX SZ_256K
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_1M)
-
-/*
- * Hardware drivers
- */
-
-/*
- * SMC91c96 Etherent
- */
-#define CONFIG_LAN91C96
-#define CONFIG_LAN91C96_BASE (APOLLON_CS1_BASE+0x300)
-#define CONFIG_LAN91C96_EXT_PHY
-
-/*
- * NS16550 Configuration
- */
-#define V_NS16550_CLK (48000000) /* 48MHz (APLL96/2) */
-
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
-#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK /* 3MHz (1.5MHz*2) */
-#define CONFIG_SYS_NS16550_COM1 OMAP2420_UART1
-
-/*
- * select serial console configuration
- */
-#define CONFIG_SERIAL1 1 /* UART1 on H4 */
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-#define CONFIG_CONS_INDEX 1
-#define CONFIG_BAUDRATE 115200
-
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_DIAG
-#define CONFIG_CMD_ONENAND
-
-#ifdef CONFIG_SYS_USE_UBI
-#define CONFIG_CMD_JFFS2
-#define CONFIG_CMD_UBI
-#define CONFIG_RBTREE
-#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
-#define CONFIG_MTD_PARTITIONS
-#endif
-
-#undef CONFIG_CMD_SOURCE
-
-#ifndef CONFIG_SYS_USE_NOR
-# undef CONFIG_CMD_FLASH
-# undef CONFIG_CMD_IMLS
-#endif
-
-#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
-
-#define CONFIG_BOOTDELAY 1
-
-#define CONFIG_NETMASK 255.255.255.0
-#define CONFIG_IPADDR 192.168.116.25
-#define CONFIG_SERVERIP 192.168.116.1
-#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_ETHADDR 00:0E:99:00:24:20
-
-#ifdef CONFIG_APOLLON_PLUS
-#define CONFIG_SYS_MEM "mem=64M"
-#else
-#define CONFIG_SYS_MEM "mem=128"
-#endif
-
-#ifdef CONFIG_SYS_USE_UBI
-#define CONFIG_SYS_UBI "ubi.mtd=4"
-#else
-#define CONFIG_SYS_UBI ""
-#endif
-
-#define CONFIG_BOOTARGS "root=/dev/nfs rw " CONFIG_SYS_MEM \
- " console=ttyS0,115200n8" \
- " ip=192.168.116.25:192.168.116.1:192.168.116.1:255.255.255.0:" \
- "apollon:eth0:off nfsroot=/tftpboot/nfsroot profile=2 " \
- CONFIG_SYS_UBI
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "Image=tftp 0x80008000 Image; go 0x80008000\0" \
- "zImage=tftp 0x80180000 zImage; go 0x80180000\0" \
- "uImage=tftp 0x80180000 uImage; bootm 0x80180000\0" \
- "uboot=tftp 0x80008000 u-boot.bin; go 0x80008000\0" \
- "xloader=tftp 0x80180000 x-load.bin; " \
- " cp.w 0x80180000 0x00000400 0x1000; go 0x00000400\0" \
- "syncmode50=mw.w 0x1e442 0xc0c4; mw 0x6800a060 0xe30d1201\0" \
- "syncmode=mw.w 0x1e442 0xe0f4; mw 0x6800a060 0xe30d1201\0" \
- "norboot=cp32 0x18040000 0x80008000 0x200000; go 0x80008000\0" \
- "oneboot=onenand read 0x80008000 0x40000 0x200000; go 0x80008000\0" \
- "onesyncboot=run syncmode oneboot\0" \
- "updateb=tftp 0x80180000 u-boot-onenand.bin; " \
- " onenand erase 0x0 0x20000; onenand write 0x80180000 0x0 0x20000\0" \
- "ubi=setenv bootargs ${bootargs} ubi.mtd=4 ${mtdparts}; run uImage\0" \
- "bootcmd=run uboot\0"
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "Apollon # "
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-/* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-/* memtest works on */
-#define CONFIG_SYS_MEMTEST_START (OMAP2420_SDRC_CS0)
-#define CONFIG_SYS_MEMTEST_END (OMAP2420_SDRC_CS0+SZ_31M)
-
-/* default load address */
-#define CONFIG_SYS_LOAD_ADDR (OMAP2420_SDRC_CS0)
-
-/* The 2420 has 12 GP timers, they can be driven by the SysClk (12/13/19.2)
- * or by 32KHz clk, or from external sig. This rate is divided by a local
- * divisor.
- */
-#define CONFIG_SYS_TIMERBASE OMAP2420_GPT2
-#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */
-#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
-
-/*-----------------------------------------------------------------------
- * Physical Memory Map
- */
-#define CONFIG_NR_DRAM_BANKS 1 /* CS1 may or may not be populated */
-#define PHYS_SDRAM_1 OMAP2420_SDRC_CS0
-#define PHYS_SDRAM_1_SIZE SZ_128M
-#define PHYS_SDRAM_2 OMAP2420_SDRC_CS1
-
-/*-----------------------------------------------------------------------
- * FLASH and environment organization
- */
-#ifdef CONFIG_SYS_USE_NOR
-/* OneNAND boot, NOR has CS3, But NOR has CS0 when NOR boot */
-# define CONFIG_SYS_FLASH_BASE 0x18000000
-# define CONFIG_SYS_MAX_FLASH_BANKS 1
-# define CONFIG_SYS_MAX_FLASH_SECT 1024
-/*-----------------------------------------------------------------------
- * CFI FLASH driver setup
- */
-/* Flash memory is CFI compliant */
-# define CONFIG_SYS_FLASH_CFI 1
-# define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */
-/* Use buffered writes (~10x faster) */
-/* #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 */
-/* Use h/w sector protection*/
-# define CONFIG_SYS_FLASH_PROTECTION 1
-
-#else /* !CONFIG_SYS_USE_NOR */
-# define CONFIG_SYS_NO_FLASH 1
-#endif /* CONFIG_SYS_USE_NOR */
-
-/* OneNAND boot, OneNAND has CS0, NOR boot ONeNAND has CS2 */
-#define CONFIG_SYS_ONENAND_BASE 0x00000000
-#define CONFIG_SYS_MONITOR_LEN SZ_256K /* U-Boot image size */
-#define CONFIG_ENV_IS_IN_ONENAND 1
-#define CONFIG_ENV_ADDR 0x00020000
-#define CONFIG_ENV_ADDR_FLEX 0x00040000
-
-#ifdef CONFIG_SYS_USE_UBI
-#define CONFIG_CMD_MTDPARTS
-#define MTDIDS_DEFAULT "onenand0=onenand"
-#define MTDPARTS_DEFAULT "mtdparts=onenand:128k(bootloader)," \
- "128k(params)," \
- "2m(kernel)," \
- "16m(rootfs)," \
- "32m(fs)," \
- "-(ubifs)"
-#endif
-
-#define PHYS_SRAM 0x4020F800
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_SP_ADDR PHYS_SRAM
-
-#endif /* __CONFIG_H */
diff --git a/include/configs/atngw100mkii.h b/include/configs/atngw100mkii.h
new file mode 100644
index 0000000000..f85374f882
--- /dev/null
+++ b/include/configs/atngw100mkii.h
@@ -0,0 +1,209 @@
+/*
+ * Copyright (C) 2006 Atmel Corporation
+ *
+ * Copyright (C) 2012 Andreas Bießmann <andreas.devel@googlemail.com>
+ *
+ * Configuration settings for the AVR32 Network Gateway
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <asm/arch/hardware.h>
+
+#define CONFIG_AVR32
+#define CONFIG_AT32AP
+#define CONFIG_AT32AP7000
+#define CONFIG_ATNGW100MKII
+
+/*
+ * Timer clock frequency. We're using the CPU-internal COUNT register
+ * for this, so this is equivalent to the CPU core clock frequency
+ */
+#define CONFIG_SYS_HZ 1000
+
+/*
+ * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
+ * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency
+ * and the PBA bus to run at 1/4 the PLL frequency.
+ */
+#define CONFIG_PLL
+#define CONFIG_SYS_POWER_MANAGER
+#define CONFIG_SYS_OSC0_HZ 20000000
+#define CONFIG_SYS_PLL0_DIV 1
+#define CONFIG_SYS_PLL0_MUL 7
+#define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16
+/*
+ * Set the CPU running at:
+ * PLL / (2^CONFIG_SYS_CLKDIV_CPU) = CPU MHz
+ */
+#define CONFIG_SYS_CLKDIV_CPU 0
+/*
+ * Set the HSB running at:
+ * PLL / (2^CONFIG_SYS_CLKDIV_HSB) = HSB MHz
+ */
+#define CONFIG_SYS_CLKDIV_HSB 1
+/*
+ * Set the PBA running at:
+ * PLL / (2^CONFIG_SYS_CLKDIV_PBA) = PBA MHz
+ */
+#define CONFIG_SYS_CLKDIV_PBA 2
+/*
+ * Set the PBB running at:
+ * PLL / (2^CONFIG_SYS_CLKDIV_PBB) = PBB MHz
+ */
+#define CONFIG_SYS_CLKDIV_PBB 1
+
+/* Reserve VM regions for NOR flash, NAND flash and SDRAM */
+#define CONFIG_SYS_NR_VM_REGIONS 3
+
+/*
+ * The PLLOPT register controls the PLL like this:
+ * icp = PLLOPT<2>
+ * ivco = PLLOPT<1:0>
+ *
+ * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
+ */
+#define CONFIG_SYS_PLL0_OPT 0x04
+
+#define CONFIG_USART_BASE ATMEL_BASE_USART1
+#define CONFIG_USART_ID 1
+
+/* User serviceable stuff */
+#define CONFIG_DOS_PARTITION
+
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+
+#define CONFIG_STACKSIZE (2048)
+
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_BOOTARGS \
+ "root=mtd:main rootfstype=jffs2"
+#define CONFIG_BOOTCOMMAND \
+ "fsload 0x10400000 /uImage; bootm"
+
+/*
+ * Only interrupt autoboot if <space> is pressed. Otherwise, garbage
+ * data on the serial line may interrupt the boot sequence.
+ */
+#define CONFIG_BOOTDELAY 1
+#define CONFIG_AUTOBOOT
+#define CONFIG_AUTOBOOT_KEYED
+#define CONFIG_AUTOBOOT_PROMPT \
+ "Press SPACE to abort autoboot in %d seconds\n", bootdelay
+#define CONFIG_AUTOBOOT_DELAY_STR "d"
+#define CONFIG_AUTOBOOT_STOP_STR " "
+
+/*
+ * After booting the board for the first time, new ethernet addresses
+ * should be generated and assigned to the environment variables
+ * "ethaddr" and "eth1addr". This is normally done during production.
+ */
+#define CONFIG_OVERWRITE_ETHADDR_ONCE
+#define CONFIG_NET_MULTI
+
+/*
+ * BOOTP/DHCP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_SPI
+#define CONFIG_CMD_MII
+
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_SETGETDCR
+#undef CONFIG_CMD_XIMG
+
+#define CONFIG_ATMEL_USART
+#define CONFIG_MACB
+#define CONFIG_PORTMUX_PIO
+#define CONFIG_SYS_NR_PIOS 5
+#define CONFIG_SYS_HSDRAMC
+#define CONFIG_MMC
+#define CONFIG_GENERIC_ATMEL_MCI
+#define CONFIG_GENERIC_MMC
+#define CONFIG_SYS_MMC_MAX_BLK_COUNT 1
+#define CONFIG_ATMEL_SPI
+
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_ATMEL
+
+#define CONFIG_SYS_DCACHE_LINESZ 32
+#define CONFIG_SYS_ICACHE_LINESZ 32
+
+#define CONFIG_NR_DRAM_BANKS 1
+
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_SYS_FLASH_PROTECTION
+
+#define CONFIG_SYS_FLASH_BASE 0x00000000
+#define CONFIG_SYS_FLASH_SIZE 0x800000
+#define CONFIG_SYS_MAX_FLASH_BANKS 1
+#define CONFIG_SYS_MAX_FLASH_SECT 135
+
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
+
+#define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE
+#define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
+#define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE
+
+#define CONFIG_ENV_IS_IN_FLASH
+#define CONFIG_ENV_SIZE 65536
+#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
+
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE)
+
+#define CONFIG_SYS_MALLOC_LEN (256*1024)
+#define CONFIG_SYS_DMA_ALLOC_LEN (16384)
+
+/* Allow 4MB for the kernel run-time image */
+#define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000)
+#define CONFIG_SYS_BOOTPARAMS_LEN (16 * 1024)
+
+/* Other configuration settings that shouldn't have to change all that often */
+#define CONFIG_SYS_PROMPT "U-Boot> "
+#define CONFIG_SYS_CBSIZE 256
+#define CONFIG_SYS_MAXARGS 16
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_LONGHELP
+
+#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1f00000)
+
+#define CONFIG_MTD_DEVICE
+#define CONFIG_MTD_PARTITIONS
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/flea3.h b/include/configs/flea3.h
index 16f2d2ac48..46171b98f0 100644
--- a/include/configs/flea3.h
+++ b/include/configs/flea3.h
@@ -212,7 +212,6 @@
* NAND FLASH driver setup
*/
#define CONFIG_NAND_MXC
-#define CONFIG_NAND_MXC_V1_1
#define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR)
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR)
diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h
index 1266cf72fa..721cd906ad 100644
--- a/include/configs/microblaze-generic.h
+++ b/include/configs/microblaze-generic.h
@@ -115,19 +115,11 @@
#endif
/* timer */
-#ifdef XILINX_TIMER_BASEADDR
-# if (XILINX_TIMER_IRQ != -1)
-# define CONFIG_SYS_TIMER_0 1
+#if defined(XILINX_TIMER_BASEADDR) && defined(XILINX_TIMER_IRQ)
# define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR
# define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ
-# define FREQUENCE XILINX_CLOCK_FREQ
-# define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 )
-# endif
-#elif XILINX_CLOCK_FREQ
-# define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ
-#else
-# error BAD CLOCK FREQ
#endif
+
/* FSL */
/* #define CONFIG_SYS_FSL_2 */
/* #define FSL_INTR_2 1 */
diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h
index 38b1546584..69bd654b9f 100644
--- a/include/configs/mx35pdk.h
+++ b/include/configs/mx35pdk.h
@@ -236,7 +236,6 @@
* NAND FLASH driver setup
*/
#define CONFIG_NAND_MXC
-#define CONFIG_NAND_MXC_V1_1
#define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR)
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR)
diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h
index 306c17336e..b8b970504f 100644
--- a/include/configs/qemu-mips.h
+++ b/include/configs/qemu-mips.h
@@ -100,7 +100,12 @@
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "qemu-mips # " /* Monitor Command Prompt */
+/* Monitor Command Prompt */
+#if defined(CONFIG_SYS_LITTLE_ENDIAN)
+#define CONFIG_SYS_PROMPT "qemu-mipsel # "
+#else
+#define CONFIG_SYS_PROMPT "qemu-mips # "
+#endif
#define CONFIG_AUTO_COMPLETE
#define CONFIG_CMDLINE_EDITING
diff --git a/include/configs/qi_lb60.h b/include/configs/qi_lb60.h
index a3fc465e70..4bb5bbc697 100644
--- a/include/configs/qi_lb60.h
+++ b/include/configs/qi_lb60.h
@@ -11,6 +11,7 @@
#define __CONFIG_QI_LB60_H
#define CONFIG_MIPS32 /* MIPS32 CPU core */
+#define CONFIG_SYS_LITTLE_ENDIAN
#define CONFIG_JZSOC /* Jz SoC */
#define CONFIG_JZ4740 /* Jz4740 SoC */
#define CONFIG_NAND_JZ4740
diff --git a/include/configs/trats.h b/include/configs/trats.h
index 8a0deea434..b3b5a3d5e3 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -78,6 +78,7 @@
#define CONFIG_MMC
#define CONFIG_S5P_SDHCI
#define CONFIG_SDHCI
+#define CONFIG_MMC_SDMA
/* PWM */
#define CONFIG_PWM
@@ -97,6 +98,21 @@
#undef CONFIG_CMD_ONENAND
#undef CONFIG_CMD_MTDPARTS
#define CONFIG_CMD_MMC
+#define CONFIG_CMD_DFU
+
+/* FAT */
+#define CONFIG_CMD_FAT
+#define CONFIG_FAT_WRITE
+
+/* USB Composite download gadget - g_dnl */
+#define CONFIG_USBDOWNLOAD_GADGET
+#define CONFIG_DFU_FUNCTION
+#define CONFIG_DFU_MMC
+
+/* USB Samsung's IDs */
+#define CONFIG_G_DNL_VENDOR_NUM 0x04E8
+#define CONFIG_G_DNL_PRODUCT_NUM 0x6601
+#define CONFIG_G_DNL_MANUFACTURER "Samsung"
#define CONFIG_BOOTDELAY 1
#define CONFIG_ZERO_BOOTDELAY_CHECK
@@ -107,6 +123,11 @@
#define CONFIG_BOOTBLOCK "10"
#define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}"
+#define CONFIG_DFU_ALT \
+ "dfu_alt_info=" \
+ "u-boot mmc 80 400;" \
+ "uImage fat 0 2\0" \
+
#define CONFIG_ENV_OVERWRITE
#define CONFIG_SYS_CONSOLE_INFO_QUIET
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
@@ -150,7 +171,8 @@
"mmcdev=0\0" \
"mmcbootpart=2\0" \
"mmcrootpart=3\0" \
- "opts=always_resume=1"
+ "opts=always_resume=1\0" \
+ CONFIG_DFU_ALT
/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP /* undef to save memory */
@@ -190,18 +212,28 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_CACHELINE_SIZE 32
-#include <asm/arch/gpio.h>
-/*
- * I2C Settings
- */
-#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_part1_get_nr(b, 7)
-#define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_part1_get_nr(b, 6)
#define CONFIG_SOFT_I2C
#define CONFIG_SOFT_I2C_READ_REPEATED_START
+#define CONFIG_SYS_I2C_INIT_BOARD
#define CONFIG_SYS_I2C_SPEED 50000
#define CONFIG_I2C_MULTI_BUS
-#define CONFIG_SYS_MAX_I2C_BUS 7
+#define CONFIG_SOFT_I2C_MULTI_BUS
+#define CONFIG_SYS_MAX_I2C_BUS 15
+
+#include <asm/arch/gpio.h>
+
+/* I2C PMIC */
+#define CONFIG_SOFT_I2C_I2C5_SCL exynos4_gpio_part1_get_nr(b, 7)
+#define CONFIG_SOFT_I2C_I2C5_SDA exynos4_gpio_part1_get_nr(b, 6)
+
+/* I2C FG */
+#define CONFIG_SOFT_I2C_I2C9_SCL exynos4_gpio_part2_get_nr(y4, 1)
+#define CONFIG_SOFT_I2C_I2C9_SDA exynos4_gpio_part2_get_nr(y4, 0)
+
+#define CONFIG_SOFT_I2C_GPIO_SCL get_multi_scl_pin()
+#define CONFIG_SOFT_I2C_GPIO_SDA get_multi_sda_pin()
+#define I2C_INIT multi_i2c_init()
#define CONFIG_PMIC
#define CONFIG_PMIC_I2C
@@ -210,6 +242,7 @@
#define CONFIG_USB_GADGET
#define CONFIG_USB_GADGET_S3C_UDC_OTG
#define CONFIG_USB_GADGET_DUALSPEED
+#define CONFIG_USB_GADGET_VBUS_DRAW 2
/* LCD */
#define CONFIG_EXYNOS_FB
diff --git a/include/configs/tx25.h b/include/configs/tx25.h
index c8a49bba14..71b1d326de 100644
--- a/include/configs/tx25.h
+++ b/include/configs/tx25.h
@@ -107,7 +107,6 @@
/* NAND */
#define CONFIG_NAND_MXC
-#define CONFIG_NAND_MXC_V1_1
#define CONFIG_MXC_NAND_REGS_BASE (0xBB000000)
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE (0xBB000000)
diff --git a/include/dfu.h b/include/dfu.h
new file mode 100644
index 0000000000..5350d79450
--- /dev/null
+++ b/include/dfu.h
@@ -0,0 +1,103 @@
+/*
+ * dfu.h - DFU flashable area description
+ *
+ * Copyright (C) 2012 Samsung Electronics
+ * authors: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
+ * Lukasz Majewski <l.majewski@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef __DFU_ENTITY_H_
+#define __DFU_ENTITY_H_
+
+#include <common.h>
+#include <linux/list.h>
+#include <mmc.h>
+
+enum dfu_device_type {
+ DFU_DEV_MMC = 1,
+ DFU_DEV_ONENAND,
+ DFU_DEV_NAND,
+};
+
+enum dfu_layout {
+ DFU_RAW_ADDR = 1,
+ DFU_FS_FAT,
+ DFU_FS_EXT2,
+ DFU_FS_EXT3,
+ DFU_FS_EXT4,
+};
+
+struct mmc_internal_data {
+ /* RAW programming */
+ unsigned int lba_start;
+ unsigned int lba_size;
+ unsigned int lba_blk_size;
+
+ /* FAT/EXT */
+ unsigned int dev;
+ unsigned int part;
+};
+
+static inline unsigned int get_mmc_blk_size(int dev)
+{
+ return find_mmc_device(dev)->read_bl_len;
+}
+
+#define DFU_NAME_SIZE 32
+#define DFU_CMD_BUF_SIZE 128
+#define DFU_DATA_BUF_SIZE (1024*1024*4) /* 4 MiB */
+
+struct dfu_entity {
+ char name[DFU_NAME_SIZE];
+ int alt;
+ void *dev_private;
+ int dev_num;
+ enum dfu_device_type dev_type;
+ enum dfu_layout layout;
+
+ union {
+ struct mmc_internal_data mmc;
+ } data;
+
+ int (*read_medium)(struct dfu_entity *dfu, void *buf, long *len);
+ int (*write_medium)(struct dfu_entity *dfu, void *buf, long *len);
+
+ struct list_head list;
+};
+
+int dfu_config_entities(char *s, char *interface, int num);
+void dfu_free_entities(void);
+void dfu_show_entities(void);
+int dfu_get_alt_number(void);
+const char *dfu_get_dev_type(enum dfu_device_type t);
+const char *dfu_get_layout(enum dfu_layout l);
+struct dfu_entity *dfu_get_entity(int alt);
+char *dfu_extract_token(char** e, int *n);
+
+int dfu_read(struct dfu_entity *de, void *buf, int size, int blk_seq_num);
+int dfu_write(struct dfu_entity *de, void *buf, int size, int blk_seq_num);
+/* Device specific */
+#ifdef CONFIG_DFU_MMC
+extern int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *s);
+#else
+static inline int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *s)
+{
+ puts("MMC support not available!\n");
+ return -1;
+}
+#endif
+#endif /* __DFU_ENTITY_H_ */
diff --git a/include/environment.h b/include/environment.h
index ae3f7b6aed..e8ab7033bf 100644
--- a/include/environment.h
+++ b/include/environment.h
@@ -181,9 +181,21 @@ void env_crc_update(void);
/* [re]set to the default environment */
void set_default_env(const char *s);
+/* [re]set individual variables to their value in the default environment */
+int set_default_vars(int nvars, char * const vars[]);
+
/* Import from binary representation into hash table */
int env_import(const char *buf, int check);
+/*
+ * Check if variable "name" can be changed from oldval to newval,
+ * and if so, apply the changes (e.g. baudrate).
+ * When (flag & H_FORCE) is set, it does not print out any error
+ * message and forces overwriting of write-once variables.
+ */
+int env_check_apply(const char *name, const char *oldval,
+ const char *newval, int flag);
+
#endif /* DO_DEPS_ONLY */
#endif /* _ENVIRONMENT_H_ */
diff --git a/include/ext2fs.h b/include/ext2fs.h
deleted file mode 100644
index 163a9bbc0e..0000000000
--- a/include/ext2fs.h
+++ /dev/null
@@ -1,81 +0,0 @@
-/*
- * GRUB -- GRand Unified Bootloader
- * Copyright (C) 2000, 2001 Free Software Foundation, Inc.
- *
- * (C) Copyright 2003 Sysgo Real-Time Solutions, AG <www.elinos.com>
- * Pavel Bartusek <pba@sysgo.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-/* An implementation for the Ext2FS filesystem ported from GRUB.
- * Some parts of this code (mainly the structures and defines) are
- * from the original ext2 fs code, as found in the linux kernel.
- */
-
-
-#define SECTOR_SIZE 0x200
-#define SECTOR_BITS 9
-
-/* Error codes */
-typedef enum
-{
- ERR_NONE = 0,
- ERR_BAD_FILENAME,
- ERR_BAD_FILETYPE,
- ERR_BAD_GZIP_DATA,
- ERR_BAD_GZIP_HEADER,
- ERR_BAD_PART_TABLE,
- ERR_BAD_VERSION,
- ERR_BELOW_1MB,
- ERR_BOOT_COMMAND,
- ERR_BOOT_FAILURE,
- ERR_BOOT_FEATURES,
- ERR_DEV_FORMAT,
- ERR_DEV_VALUES,
- ERR_EXEC_FORMAT,
- ERR_FILELENGTH,
- ERR_FILE_NOT_FOUND,
- ERR_FSYS_CORRUPT,
- ERR_FSYS_MOUNT,
- ERR_GEOM,
- ERR_NEED_LX_KERNEL,
- ERR_NEED_MB_KERNEL,
- ERR_NO_DISK,
- ERR_NO_PART,
- ERR_NUMBER_PARSING,
- ERR_OUTSIDE_PART,
- ERR_READ,
- ERR_SYMLINK_LOOP,
- ERR_UNRECOGNIZED,
- ERR_WONT_FIT,
- ERR_WRITE,
- ERR_BAD_ARGUMENT,
- ERR_UNALIGNED,
- ERR_PRIVILEGED,
- ERR_DEV_NEED_INIT,
- ERR_NO_DISK_SPACE,
- ERR_NUMBER_OVERFLOW,
-
- MAX_ERR_NUM
-} ext2fs_error_t;
-
-
-extern int ext2fs_set_blk_dev(block_dev_desc_t *rbdd, int part);
-extern int ext2fs_ls (const char *dirname);
-extern int ext2fs_open (const char *filename);
-extern int ext2fs_read (char *buf, unsigned len);
-extern int ext2fs_mount (unsigned part_length);
-extern int ext2fs_close(void);
diff --git a/include/ext4fs.h b/include/ext4fs.h
new file mode 100644
index 0000000000..ab2983ceb8
--- /dev/null
+++ b/include/ext4fs.h
@@ -0,0 +1,144 @@
+/*
+ * (C) Copyright 2011 - 2012 Samsung Electronics
+ * EXT4 filesystem implementation in Uboot by
+ * Uma Shankar <uma.shankar@samsung.com>
+ * Manjunatha C Achar <a.manjunatha@samsung.com>
+ *
+ * Ext4 Extent data structures are taken from original ext4 fs code
+ * as found in the linux kernel.
+ *
+ * Copyright (c) 2003-2006, Cluster File Systems, Inc, info@clusterfs.com
+ * Written by Alex Tomas <alex@clusterfs.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __EXT4__
+#define __EXT4__
+#include <ext_common.h>
+
+#define EXT4_EXTENTS_FL 0x00080000 /* Inode uses extents */
+#define EXT4_EXT_MAGIC 0xf30a
+#define EXT4_FEATURE_RO_COMPAT_GDT_CSUM 0x0010
+#define EXT4_FEATURE_INCOMPAT_EXTENTS 0x0040
+#define EXT4_INDIRECT_BLOCKS 12
+
+#define EXT4_BG_INODE_UNINIT 0x0001
+#define EXT4_BG_BLOCK_UNINIT 0x0002
+#define EXT4_BG_INODE_ZEROED 0x0004
+
+/*
+ * ext4_inode has i_block array (60 bytes total).
+ * The first 12 bytes store ext4_extent_header;
+ * the remainder stores an array of ext4_extent.
+ */
+
+/*
+ * This is the extent on-disk structure.
+ * It's used at the bottom of the tree.
+ */
+struct ext4_extent {
+ __le32 ee_block; /* first logical block extent covers */
+ __le16 ee_len; /* number of blocks covered by extent */
+ __le16 ee_start_hi; /* high 16 bits of physical block */
+ __le32 ee_start_lo; /* low 32 bits of physical block */
+};
+
+/*
+ * This is index on-disk structure.
+ * It's used at all the levels except the bottom.
+ */
+struct ext4_extent_idx {
+ __le32 ei_block; /* index covers logical blocks from 'block' */
+ __le32 ei_leaf_lo; /* pointer to the physical block of the next *
+ * level. leaf or next index could be there */
+ __le16 ei_leaf_hi; /* high 16 bits of physical block */
+ __u16 ei_unused;
+};
+
+/* Each block (leaves and indexes), even inode-stored has header. */
+struct ext4_extent_header {
+ __le16 eh_magic; /* probably will support different formats */
+ __le16 eh_entries; /* number of valid entries */
+ __le16 eh_max; /* capacity of store in entries */
+ __le16 eh_depth; /* has tree real underlying blocks? */
+ __le32 eh_generation; /* generation of the tree */
+};
+
+struct ext_filesystem {
+ /* Total Sector of partition */
+ uint64_t total_sect;
+ /* Block size of partition */
+ uint32_t blksz;
+ /* Inode size of partition */
+ uint32_t inodesz;
+ /* Sectors per Block */
+ uint32_t sect_perblk;
+ /* Group Descriptor Block Number */
+ uint32_t gdtable_blkno;
+ /* Total block groups of partition */
+ uint32_t no_blkgrp;
+ /* No of blocks required for bgdtable */
+ uint32_t no_blk_pergdt;
+ /* Superblock */
+ struct ext2_sblock *sb;
+ /* Block group descritpor table */
+ struct ext2_block_group *gd;
+ char *gdtable;
+
+ /* Block Bitmap Related */
+ unsigned char **blk_bmaps;
+ long int curr_blkno;
+ uint16_t first_pass_bbmap;
+
+ /* Inode Bitmap Related */
+ unsigned char **inode_bmaps;
+ int curr_inode_no;
+ uint16_t first_pass_ibmap;
+
+ /* Journal Related */
+
+ /* Block Device Descriptor */
+ block_dev_desc_t *dev_desc;
+};
+
+extern block_dev_desc_t *ext4_dev_desc;
+extern struct ext2_data *ext4fs_root;
+extern struct ext2fs_node *ext4fs_file;
+
+#if defined(CONFIG_CMD_EXT4_WRITE)
+extern struct ext2_inode *g_parent_inode;
+extern int gd_index;
+extern int gindex;
+
+int ext4fs_init(void);
+void ext4fs_deinit(void);
+int ext4fs_filename_check(char *filename);
+int ext4fs_write(const char *fname, unsigned char *buffer,
+ unsigned long sizebytes);
+#endif
+
+struct ext_filesystem *get_fs(void);
+int init_fs(block_dev_desc_t *dev_desc);
+void deinit_fs(block_dev_desc_t *dev_desc);
+int ext4fs_open(const char *filename);
+int ext4fs_read(char *buf, unsigned len);
+int ext4fs_mount(unsigned part_length);
+void ext4fs_close(void);
+int ext4fs_ls(const char *dirname);
+void ext4fs_free_node(struct ext2fs_node *node, struct ext2fs_node *currroot);
+int ext4fs_devread(int sector, int byte_offset, int byte_len, char *buf);
+int ext4fs_set_blk_dev(block_dev_desc_t *rbdd, int part);
+long int read_allocated_block(struct ext2_inode *inode, int fileblock);
+#endif
diff --git a/include/ext_common.h b/include/ext_common.h
new file mode 100644
index 0000000000..9b97522c85
--- /dev/null
+++ b/include/ext_common.h
@@ -0,0 +1,199 @@
+/*
+ * (C) Copyright 2011 - 2012 Samsung Electronics
+ * EXT4 filesystem implementation in Uboot by
+ * Uma Shankar <uma.shankar@samsung.com>
+ * Manjunatha C Achar <a.manjunatha@samsung.com>
+ *
+ * Data structures and headers for ext4 support have been taken from
+ * ext2 ls load support in Uboot
+ *
+ * (C) Copyright 2004
+ * esd gmbh <www.esd-electronics.com>
+ * Reinhard Arlt <reinhard.arlt@esd-electronics.com>
+ *
+ * based on code from grub2 fs/ext2.c and fs/fshelp.c by
+ * GRUB -- GRand Unified Bootloader
+ * Copyright (C) 2003, 2004 Free Software Foundation, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __EXT_COMMON__
+#define __EXT_COMMON__
+#include <command.h>
+#define SECTOR_SIZE 0x200
+#define SECTOR_BITS 9
+
+/* Magic value used to identify an ext2 filesystem. */
+#define EXT2_MAGIC 0xEF53
+/* Amount of indirect blocks in an inode. */
+#define INDIRECT_BLOCKS 12
+/* Maximum lenght of a pathname. */
+#define EXT2_PATH_MAX 4096
+/* Maximum nesting of symlinks, used to prevent a loop. */
+#define EXT2_MAX_SYMLINKCNT 8
+
+/* Filetype used in directory entry. */
+#define FILETYPE_UNKNOWN 0
+#define FILETYPE_REG 1
+#define FILETYPE_DIRECTORY 2
+#define FILETYPE_SYMLINK 7
+
+/* Filetype information as used in inodes. */
+#define FILETYPE_INO_MASK 0170000
+#define FILETYPE_INO_REG 0100000
+#define FILETYPE_INO_DIRECTORY 0040000
+#define FILETYPE_INO_SYMLINK 0120000
+#define EXT2_ROOT_INO 2 /* Root inode */
+
+/* Bits used as offset in sector */
+#define DISK_SECTOR_BITS 9
+/* The size of an ext2 block in bytes. */
+#define EXT2_BLOCK_SIZE(data) (1 << LOG2_BLOCK_SIZE(data))
+
+/* Log2 size of ext2 block in 512 blocks. */
+#define LOG2_EXT2_BLOCK_SIZE(data) (__le32_to_cpu \
+ (data->sblock.log2_block_size) + 1)
+
+/* Log2 size of ext2 block in bytes. */
+#define LOG2_BLOCK_SIZE(data) (__le32_to_cpu \
+ (data->sblock.log2_block_size) + 10)
+#define INODE_SIZE_FILESYSTEM(data) (__le32_to_cpu \
+ (data->sblock.inode_size))
+
+#define EXT2_FT_DIR 2
+#define SUCCESS 1
+
+/* Macro-instructions used to manage several block sizes */
+#define EXT2_MIN_BLOCK_LOG_SIZE 10 /* 1024 */
+#define EXT2_MAX_BLOCK_LOG_SIZE 16 /* 65536 */
+#define EXT2_MIN_BLOCK_SIZE (1 << EXT2_MIN_BLOCK_LOG_SIZE)
+#define EXT2_MAX_BLOCK_SIZE (1 << EXT2_MAX_BLOCK_LOG_SIZE)
+
+/* The ext2 superblock. */
+struct ext2_sblock {
+ uint32_t total_inodes;
+ uint32_t total_blocks;
+ uint32_t reserved_blocks;
+ uint32_t free_blocks;
+ uint32_t free_inodes;
+ uint32_t first_data_block;
+ uint32_t log2_block_size;
+ uint32_t log2_fragment_size;
+ uint32_t blocks_per_group;
+ uint32_t fragments_per_group;
+ uint32_t inodes_per_group;
+ uint32_t mtime;
+ uint32_t utime;
+ uint16_t mnt_count;
+ uint16_t max_mnt_count;
+ uint16_t magic;
+ uint16_t fs_state;
+ uint16_t error_handling;
+ uint16_t minor_revision_level;
+ uint32_t lastcheck;
+ uint32_t checkinterval;
+ uint32_t creator_os;
+ uint32_t revision_level;
+ uint16_t uid_reserved;
+ uint16_t gid_reserved;
+ uint32_t first_inode;
+ uint16_t inode_size;
+ uint16_t block_group_number;
+ uint32_t feature_compatibility;
+ uint32_t feature_incompat;
+ uint32_t feature_ro_compat;
+ uint32_t unique_id[4];
+ char volume_name[16];
+ char last_mounted_on[64];
+ uint32_t compression_info;
+};
+
+struct ext2_block_group {
+ __u32 block_id; /* Blocks bitmap block */
+ __u32 inode_id; /* Inodes bitmap block */
+ __u32 inode_table_id; /* Inodes table block */
+ __u16 free_blocks; /* Free blocks count */
+ __u16 free_inodes; /* Free inodes count */
+ __u16 used_dir_cnt; /* Directories count */
+ __u16 bg_flags;
+ __u32 bg_reserved[2];
+ __u16 bg_itable_unused; /* Unused inodes count */
+ __u16 bg_checksum; /* crc16(s_uuid+grouo_num+group_desc)*/
+};
+
+/* The ext2 inode. */
+struct ext2_inode {
+ uint16_t mode;
+ uint16_t uid;
+ uint32_t size;
+ uint32_t atime;
+ uint32_t ctime;
+ uint32_t mtime;
+ uint32_t dtime;
+ uint16_t gid;
+ uint16_t nlinks;
+ uint32_t blockcnt; /* Blocks of 512 bytes!! */
+ uint32_t flags;
+ uint32_t osd1;
+ union {
+ struct datablocks {
+ uint32_t dir_blocks[INDIRECT_BLOCKS];
+ uint32_t indir_block;
+ uint32_t double_indir_block;
+ uint32_t triple_indir_block;
+ } blocks;
+ char symlink[60];
+ } b;
+ uint32_t version;
+ uint32_t acl;
+ uint32_t dir_acl;
+ uint32_t fragment_addr;
+ uint32_t osd2[3];
+};
+
+/* The header of an ext2 directory entry. */
+struct ext2_dirent {
+ uint32_t inode;
+ uint16_t direntlen;
+ uint8_t namelen;
+ uint8_t filetype;
+};
+
+struct ext2fs_node {
+ struct ext2_data *data;
+ struct ext2_inode inode;
+ int ino;
+ int inode_read;
+};
+
+/* Information about a "mounted" ext2 filesystem. */
+struct ext2_data {
+ struct ext2_sblock sblock;
+ struct ext2_inode *inode;
+ struct ext2fs_node diropen;
+};
+
+int do_ext2ls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+int do_ext2load(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+int do_ext4_load(cmd_tbl_t *cmdtp, int flag, int argc,
+ char *const argv[]);
+int do_ext4_ls(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]);
+int do_ext4_write(cmd_tbl_t *cmdtp, int flag, int argc,
+ char *const argv[]);
+int do_ext_load(cmd_tbl_t *cmdtp, int flag, int argc,
+ char *const argv[]);
+int do_ext_ls(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]);
+#endif
diff --git a/include/flash.h b/include/flash.h
index e614d07dfa..6d70bdd81d 100644
--- a/include/flash.h
+++ b/include/flash.h
@@ -141,6 +141,7 @@ extern flash_info_t *flash_get_info(ulong base);
#define ERR_UNKNOWN_FLASH_VENDOR 32
#define ERR_UNKNOWN_FLASH_TYPE 64
#define ERR_PROG_ERROR 128
+#define ERR_ABORTED 256
/*-----------------------------------------------------------------------
* Protection Flags for flash_protect():
diff --git a/include/fsl_nfc.h b/include/fsl_nfc.h
index 279aaa55de..ff537b49a9 100644
--- a/include/fsl_nfc.h
+++ b/include/fsl_nfc.h
@@ -24,49 +24,48 @@
#define __FSL_NFC_H
/*
- * TODO: Use same register defs for nand_spl mxc nand driver
- * and mtd mxc nand driver.
+ * Register map and bit definitions for the Freescale NAND Flash Controller
+ * present in various i.MX devices.
*
- * Register map and bit definitions for the Freescale NAND Flash
- * Controller present in various i.MX devices.
+ * MX31 and MX27 have version 1, which has:
+ * 4 512-byte main buffers and
+ * 4 16-byte spare buffers
+ * to support up to 2K byte pagesize nand.
+ * Reading or writing a 2K page requires 4 FDI/FDO cycles.
*
- * MX31 and MX27 have version 1 which has
- * 4 512 byte main buffers and
- * 4 16 byte spare buffers
- * to support up to 2K byte pagesize nand.
- * Reading or writing a 2K page requires 4 FDI/FDO cycles.
- *
- * MX25 has version 1.1 which has
- * 8 512 byte main buffers and
- * 8 64 byte spare buffers
- * to support up to 4K byte pagesize nand.
- * Reading or writing a 2K or 4K page requires only 1 FDI/FDO cycle.
- * Also some of registers are moved and/or changed meaning as seen below.
+ * MX25 and MX35 have version 2.1, which has:
+ * 8 512-byte main buffers and
+ * 8 64-byte spare buffers
+ * to support up to 4K byte pagesize nand.
+ * Reading or writing a 2K or 4K page requires only 1 FDI/FDO cycle.
+ * Also some of registers are moved and/or changed meaning as seen below.
*/
-#if defined(CONFIG_MX31) || defined(CONFIG_MX27)
+#if defined(CONFIG_MX27) || defined(CONFIG_MX31)
#define MXC_NFC_V1
-#elif defined(CONFIG_MX25)
-#define MXC_NFC_V1_1
+#define is_mxc_nfc_1() 1
+#define is_mxc_nfc_21() 0
+#elif defined(CONFIG_MX25) || defined(CONFIG_MX35)
+#define MXC_NFC_V2_1
+#define is_mxc_nfc_1() 0
+#define is_mxc_nfc_21() 1
#else
-#warning "MXC NFC version not defined"
+#error "MXC NFC implementation not supported"
#endif
#if defined(MXC_NFC_V1)
#define NAND_MXC_NR_BUFS 4
#define NAND_MXC_SPARE_BUF_SIZE 16
#define NAND_MXC_REG_OFFSET 0xe00
-#define NAND_MXC_2K_MULTI_CYCLE 1
-#elif defined(MXC_NFC_V1_1)
+#define NAND_MXC_2K_MULTI_CYCLE
+#elif defined(MXC_NFC_V2_1)
#define NAND_MXC_NR_BUFS 8
#define NAND_MXC_SPARE_BUF_SIZE 64
#define NAND_MXC_REG_OFFSET 0x1e00
-#else
-#error "define CONFIG_NAND_MXC_VXXX to use the mxc spl_nand driver"
#endif
struct fsl_nfc_regs {
- u32 main_area[NAND_MXC_NR_BUFS][512/4];
- u32 spare_area[NAND_MXC_NR_BUFS][NAND_MXC_SPARE_BUF_SIZE/4];
+ u8 main_area[NAND_MXC_NR_BUFS][0x200];
+ u8 spare_area[NAND_MXC_NR_BUFS][NAND_MXC_SPARE_BUF_SIZE];
/*
* reserved size is offset of nfc registers
* minus total main and spare sizes
@@ -74,44 +73,43 @@ struct fsl_nfc_regs {
u8 reserved1[NAND_MXC_REG_OFFSET
- NAND_MXC_NR_BUFS * (512 + NAND_MXC_SPARE_BUF_SIZE)];
#if defined(MXC_NFC_V1)
- u16 bufsiz;
+ u16 buf_size;
u16 reserved2;
- u16 buffer_address;
- u16 flash_add;
+ u16 buf_addr;
+ u16 flash_addr;
u16 flash_cmd;
- u16 configuration;
+ u16 config;
u16 ecc_status_result;
- u16 ecc_rslt_main_area;
- u16 ecc_rslt_spare_area;
- u16 nf_wr_prot;
- u16 unlock_start_blk_add;
- u16 unlock_end_blk_add;
- u16 nand_flash_wr_pr_st;
- u16 nand_flash_config1;
- u16 nand_flash_config2;
-#elif defined(MXC_NFC_V1_1)
+ u16 rsltmain_area;
+ u16 rsltspare_area;
+ u16 wrprot;
+ u16 unlockstart_blkaddr;
+ u16 unlockend_blkaddr;
+ u16 nf_wrprst;
+ u16 config1;
+ u16 config2;
+#elif defined(MXC_NFC_V2_1)
u16 reserved2[2];
- u16 buffer_address;
- u16 flash_add;
+ u16 buf_addr;
+ u16 flash_addr;
u16 flash_cmd;
- u16 configuration;
- u16 ecc_status_result;
- u16 ecc_status_result2;
+ u16 config;
+ u32 ecc_status_result;
u16 spare_area_size;
- u16 nf_wr_prot;
+ u16 wrprot;
u16 reserved3[2];
- u16 nand_flash_wr_pr_st;
- u16 nand_flash_config1;
- u16 nand_flash_config2;
+ u16 nf_wrprst;
+ u16 config1;
+ u16 config2;
u16 reserved4;
- u16 unlock_start_blk_add0;
- u16 unlock_end_blk_add0;
- u16 unlock_start_blk_add1;
- u16 unlock_end_blk_add1;
- u16 unlock_start_blk_add2;
- u16 unlock_end_blk_add2;
- u16 unlock_start_blk_add3;
- u16 unlock_end_blk_add3;
+ u16 unlockstart_blkaddr;
+ u16 unlockend_blkaddr;
+ u16 unlockstart_blkaddr1;
+ u16 unlockend_blkaddr1;
+ u16 unlockstart_blkaddr2;
+ u16 unlockend_blkaddr2;
+ u16 unlockstart_blkaddr3;
+ u16 unlockend_blkaddr3;
#endif
};
@@ -157,7 +155,7 @@ struct fsl_nfc_regs {
*/
#define NFC_INT 0x8000
-#ifdef MXC_NFC_V1_1
+#ifdef MXC_NFC_V2_1
#define NFC_4_8N_ECC (1 << 0)
#endif
#define NFC_SP_EN (1 << 2)
@@ -167,5 +165,6 @@ struct fsl_nfc_regs {
#define NFC_RST (1 << 6)
#define NFC_CE (1 << 7)
#define NFC_ONE_CYCLE (1 << 8)
+#define NFC_FP_INT (1 << 11)
#endif /* __FSL_NFC_H */
diff --git a/include/g_dnl.h b/include/g_dnl.h
new file mode 100644
index 0000000000..0ec7440306
--- /dev/null
+++ b/include/g_dnl.h
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ * Lukasz Majewski <l.majewski@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __G_DOWNLOAD_H_
+#define __G_DOWNLOAD_H_
+
+#include <linux/usb/ch9.h>
+#include <usbdescriptors.h>
+#include <linux/usb/gadget.h>
+
+int g_dnl_register(const char *s);
+void g_dnl_unregister(void);
+
+/* USB initialization declaration - board specific */
+void board_usb_init(void);
+#endif /* __G_DOWNLOAD_H_ */
diff --git a/include/i2c.h b/include/i2c.h
index 1f35acf675..16f099d2ee 100644
--- a/include/i2c.h
+++ b/include/i2c.h
@@ -250,4 +250,16 @@ static inline void I2C_SET_BUS(unsigned int bus)
i2c_set_bus_num(bus);
}
+/* Multi I2C definitions */
+enum {
+ I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,
+ I2C_8, I2C_9, I2C_10,
+};
+
+/* Multi I2C busses handling */
+#ifdef CONFIG_SOFT_I2C_MULTI_BUS
+extern int get_multi_scl_pin(void);
+extern int get_multi_sda_pin(void);
+extern int multi_i2c_init(void);
+#endif
#endif /* _I2C_H_ */
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index dc839e7153..f63e04b634 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -85,8 +85,10 @@ extern void nand_wait_ready(struct mtd_info *mtd);
#define NAND_CMD_RESET 0xff
#define NAND_CMD_LOCK 0x2a
+#define NAND_CMD_LOCK_TIGHT 0x2c
#define NAND_CMD_UNLOCK1 0x23
#define NAND_CMD_UNLOCK2 0x24
+#define NAND_CMD_LOCK_STATUS 0x7a
/* Extended commands for large page devices */
#define NAND_CMD_READSTART 0x30
@@ -205,9 +207,6 @@ typedef enum {
#define NAND_SUBPAGE_READ(chip) ((chip->ecc.mode == NAND_ECC_SOFT) \
&& (chip->page_shift > 9))
-/* Mask to zero out the chip options, which come from the id table */
-#define NAND_CHIPOPTIONS_MSK (0x0000ffff & ~NAND_NO_AUTOINCR)
-
/* Non chip related options */
/*
* Use a flash based bad block table. OOB identifier is saved in OOB area.
diff --git a/include/mmc.h b/include/mmc.h
index b63b2c32a0..a13e2bdcf1 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -215,7 +215,6 @@ struct mmc_cmd {
uint resp_type;
uint cmdarg;
uint response[4];
- uint flags;
};
struct mmc_data {
diff --git a/include/nand.h b/include/nand.h
index c554c552f5..bbe28b20bb 100644
--- a/include/nand.h
+++ b/include/nand.h
@@ -141,11 +141,11 @@ int nand_write_skip_bad(nand_info_t *nand, loff_t offset, size_t *length,
int nand_erase_opts(nand_info_t *meminfo, const nand_erase_options_t *opts);
#define NAND_LOCK_STATUS_TIGHT 0x01
-#define NAND_LOCK_STATUS_LOCK 0x02
#define NAND_LOCK_STATUS_UNLOCK 0x04
-int nand_lock( nand_info_t *meminfo, int tight );
-int nand_unlock( nand_info_t *meminfo, ulong start, ulong length );
+int nand_lock(nand_info_t *meminfo, int tight);
+int nand_unlock(nand_info_t *meminfo, loff_t start, size_t length,
+ int allexcept);
int nand_get_lock_status(nand_info_t *meminfo, loff_t offset);
int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst);
diff --git a/include/pci_ids.h b/include/pci_ids.h
index 6a85c06bc9..2c6dfd4044 100644
--- a/include/pci_ids.h
+++ b/include/pci_ids.h
@@ -364,6 +364,10 @@
#define PCI_DEVICE_ID_ATI_RS400_166 0x5a32
#define PCI_DEVICE_ID_ATI_RS400_200 0x5a33
#define PCI_DEVICE_ID_ATI_RS480 0x5950
+/* additional Radeon families */
+#define PCI_DEVICE_ID_ATI_EVERGREEN 0x9802
+#define PCI_DEVICE_ID_ATI_EVERGREEN2 0x9804
+#define PCI_DEVICE_ID_ATI_WRESTLER 0x9806
/* ATI IXP Chipset */
#define PCI_DEVICE_ID_ATI_IXP200_IDE 0x4349
#define PCI_DEVICE_ID_ATI_IXP200_SMBUS 0x4353
@@ -375,9 +379,13 @@
#define PCI_DEVICE_ID_ATI_IXP400_SATA 0x4379
#define PCI_DEVICE_ID_ATI_IXP400_SATA2 0x437a
#define PCI_DEVICE_ID_ATI_IXP600_SATA 0x4380
+#define PCI_DEVICE_ID_ATI_SBX00_PCI_BRIDGE 0x4384
#define PCI_DEVICE_ID_ATI_SBX00_SMBUS 0x4385
#define PCI_DEVICE_ID_ATI_IXP600_IDE 0x438c
#define PCI_DEVICE_ID_ATI_IXP700_SATA 0x4390
+#define PCI_DEVICE_ID_ATI_SBX00_SATA_AHCI 0x4391
+#define PCI_DEVICE_ID_ATI_SBX00_EHCI 0x4396
+#define PCI_DEVICE_ID_ATI_SBX00_OHCI 0x4397
#define PCI_DEVICE_ID_ATI_IXP700_IDE 0x439c
#define PCI_VENDOR_ID_VLSI 0x1004
@@ -2539,9 +2547,16 @@
#define PCI_DEVICE_ID_INTEL_82840_HB 0x1a21
#define PCI_DEVICE_ID_INTEL_82845_HB 0x1a30
#define PCI_DEVICE_ID_INTEL_IOAT 0x1a38
+#define PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE 0x1c03
+#define PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6 0x1c02
+#define PCI_DEVICE_ID_INTEL_COUGARPOINT_HDA 0x1c20
#define PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS 0x1c22
#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN 0x1c41
#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX 0x1c5f
+#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE 0x1e03
+#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_HDA 0x1e20
+#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MIN 0x1e41
+#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MAX 0x1e5f
#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS 0x1d22
#define PCI_DEVICE_ID_INTEL_PATSBURG_LPC 0x1d40
#define PCI_DEVICE_ID_INTEL_82801AA_0 0x2410
@@ -2635,6 +2650,7 @@
#define PCI_DEVICE_ID_INTEL_ICH7_30 0x27b0
#define PCI_DEVICE_ID_INTEL_TGP_LPC 0x27bc
#define PCI_DEVICE_ID_INTEL_ICH7_31 0x27bd
+#define PCI_DEVICE_ID_INTEL_NM10_AHCI 0x27c1
#define PCI_DEVICE_ID_INTEL_ICH7_17 0x27da
#define PCI_DEVICE_ID_INTEL_ICH7_19 0x27dd
#define PCI_DEVICE_ID_INTEL_ICH7_20 0x27de
diff --git a/include/sdhci.h b/include/sdhci.h
index 9d37183243..c0345ed86e 100644
--- a/include/sdhci.h
+++ b/include/sdhci.h
@@ -76,6 +76,8 @@
#define SDHCI_SPACE_AVAILABLE 0x00000400
#define SDHCI_DATA_AVAILABLE 0x00000800
#define SDHCI_CARD_PRESENT 0x00010000
+#define SDHCI_CARD_STATE_STABLE 0x00020000
+#define SDHCI_CARD_DETECT_PIN_LEVEL 0x00040000
#define SDHCI_WRITE_PROTECT 0x00080000
#define SDHCI_HOST_CONTROL 0x28
@@ -87,7 +89,9 @@
#define SDHCI_CTRL_ADMA1 0x08
#define SDHCI_CTRL_ADMA32 0x10
#define SDHCI_CTRL_ADMA64 0x18
-#define SDHCI_CTRL_8BITBUS 0x20
+#define SDHCI_CTRL_8BITBUS 0x20
+#define SDHCI_CTRL_CD_TEST_INS 0x40
+#define SDHCI_CTRL_CD_TEST 0x80
#define SDHCI_POWER_CONTROL 0x29
#define SDHCI_POWER_ON 0x01
@@ -219,6 +223,7 @@
#define SDHCI_QUIRK_BROKEN_R1B (1 << 2)
#define SDHCI_QUIRK_NO_HISPD_BIT (1 << 3)
#define SDHCI_QUIRK_BROKEN_VOLTAGE (1 << 4)
+#define SDHCI_QUIRK_NO_CD (1 << 5)
/* to make gcc happy */
struct sdhci_host;
@@ -248,8 +253,10 @@ struct sdhci_host {
unsigned int clock;
struct mmc *mmc;
const struct sdhci_ops *ops;
+ int index;
void (*set_control_reg)(struct sdhci_host *host);
+ void (*set_clock)(int dev_index, unsigned int div);
uint voltages;
};
diff --git a/include/search.h b/include/search.h
index ef53edb9fe..93e1cbc6d0 100644
--- a/include/search.h
+++ b/include/search.h
@@ -57,13 +57,23 @@ struct hsearch_data {
struct _ENTRY *table;
unsigned int size;
unsigned int filled;
+/*
+ * Callback function which will check whether the given change for variable
+ * "name" from "oldval" to "newval" may be applied or not, and possibly apply
+ * such change.
+ * When (flag & H_FORCE) is set, it shall not print out any error message and
+ * shall force overwriting of write-once variables.
+.* Must return 0 for approval, 1 for denial.
+ */
+ int (*apply)(const char *name, const char *oldval,
+ const char *newval, int flag);
};
/* Create a new hashing table which will at most contain NEL elements. */
extern int hcreate_r(size_t __nel, struct hsearch_data *__htab);
/* Destroy current internal hashing table. */
-extern void hdestroy_r(struct hsearch_data *__htab);
+extern void hdestroy_r(struct hsearch_data *__htab, int do_apply);
/*
* Search for entry matching ITEM.key in internal hash table. If
@@ -88,17 +98,25 @@ extern int hstrstr_r(const char *__match, int __last_idx, ENTRY ** __retval,
struct hsearch_data *__htab);
/* Search and delete entry matching ITEM.key in internal hash table. */
-extern int hdelete_r(const char *__key, struct hsearch_data *__htab);
+extern int hdelete_r(const char *__key, struct hsearch_data *__htab,
+ int do_apply);
extern ssize_t hexport_r(struct hsearch_data *__htab,
const char __sep, char **__resp, size_t __size,
int argc, char * const argv[]);
+/*
+ * nvars: length of vars array
+ * vars: array of strings (variable names) to import (nvars == 0 means all)
+ * do_apply: whether to call callback function to check the new argument,
+ * and possibly apply changes (false means accept everything)
+ */
extern int himport_r(struct hsearch_data *__htab,
const char *__env, size_t __size, const char __sep,
- int __flag);
+ int __flag, int nvars, char * const vars[], int do_apply);
/* Flags for himport_r() */
-#define H_NOCLEAR 1 /* do not clear hash table before importing */
+#define H_NOCLEAR (1 << 0) /* do not clear hash table before importing */
+#define H_FORCE (1 << 1) /* overwrite read-only/write-once variables */
#endif /* search.h */
diff --git a/include/serial.h b/include/serial.h
index cbdf8a9bf7..d76d6dfb6d 100644
--- a/include/serial.h
+++ b/include/serial.h
@@ -31,7 +31,8 @@ extern struct serial_device *default_serial_console(void);
defined(CONFIG_MB86R0x) || defined(CONFIG_MPC5xxx) || \
defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || \
defined(CONFIG_MPC86xx) || defined(CONFIG_SYS_SC520) || \
- defined(CONFIG_TEGRA20) || defined(CONFIG_SYS_COREBOOT)
+ defined(CONFIG_TEGRA20) || defined(CONFIG_SYS_COREBOOT) || \
+ defined(CONFIG_MICROBLAZE)
extern struct serial_device serial0_device;
extern struct serial_device serial1_device;
#if defined(CONFIG_SYS_NS16550_SERIAL)
diff --git a/include/usb/ulpi.h b/include/usb/ulpi.h
index 4a23fd2af2..9a75c24bdd 100644
--- a/include/usb/ulpi.h
+++ b/include/usb/ulpi.h
@@ -61,7 +61,7 @@ int ulpi_select_transceiver(struct ulpi_viewport *ulpi_vp, unsigned speed);
*
* returns 0 on success, ULPI_ERROR on failure.
*/
-int ulpi_enable_vbus(struct ulpi_viewport *ulpi_vp,
+int ulpi_set_vbus(struct ulpi_viewport *ulpi_vp,
int on, int ext_power, int ext_ind);
/*