diff options
Diffstat (limited to 'include')
76 files changed, 785 insertions, 164 deletions
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index ec70b72970..8fa8e39f71 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -213,7 +213,7 @@ /* USB gadget RNDIS */ -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/am33xx/u-boot-spl.lds" #endif #ifdef CONFIG_NAND diff --git a/include/configs/am335x_igep0033.h b/include/configs/am335x_igep0033.h index 32aa392e8b..16fb1ae8aa 100644 --- a/include/configs/am335x_igep0033.h +++ b/include/configs/am335x_igep0033.h @@ -123,7 +123,7 @@ #undef CONFIG_USE_IRQ /* SPL */ -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/am33xx/u-boot-spl.lds" #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ diff --git a/include/configs/am335x_shc.h b/include/configs/am335x_shc.h index 553aaa38a8..48353e9d3d 100644 --- a/include/configs/am335x_shc.h +++ b/include/configs/am335x_shc.h @@ -280,7 +280,7 @@ /* SPL */ -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/am33xx/u-boot-spl.lds" #ifndef CONFIG_SPL_USBETH_SUPPORT #define CONFIG_FASTBOOT_FLASH_MMC_DEV 1 diff --git a/include/configs/am335x_sl50.h b/include/configs/am335x_sl50.h index 9795d4112b..ca5bb1a77d 100644 --- a/include/configs/am335x_sl50.h +++ b/include/configs/am335x_sl50.h @@ -86,7 +86,7 @@ #define CONFIG_BOOTCOUNT_AM33XX #define CONFIG_SYS_BOOTCOUNT_BE -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/am33xx/u-boot-spl.lds" #ifndef CONFIG_SPL_USBETH_SUPPORT #define CONFIG_FASTBOOT_FLASH_MMC_DEV 1 diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h index 2f20e10eff..07ef9e98e9 100644 --- a/include/configs/am3517_crane.h +++ b/include/configs/am3517_crane.h @@ -18,7 +18,6 @@ */ #define CONFIG_OMAP 1 /* in a TI OMAP core */ #define CONFIG_OMAP3_AM3517CRANE 1 /* working with CRANEBOARD */ -#define CONFIG_OMAP_COMMON /* Common ARM Erratas */ #define CONFIG_ARM_ERRATA_454179 #define CONFIG_ARM_ERRATA_430973 @@ -281,7 +280,7 @@ #define CONFIG_SPL_NAND_BASE #define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_ECC -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" /* NAND boot config */ #define CONFIG_SYS_NAND_BUSWIDTH_16BIT diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index a4ae5453b2..ad56d240c1 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -16,7 +16,6 @@ /* High Level Configuration Options */ #define CONFIG_OMAP -#define CONFIG_OMAP_COMMON #define CONFIG_SYS_NO_FLASH @@ -341,6 +340,6 @@ #define CONFIG_SPL_NAND_BASE #define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_ECC -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" #endif /* __CONFIG_H */ diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index 20f207c3f3..0a6c06a4bb 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -82,7 +82,7 @@ #define FAT_ENV_FILE "uboot.env" #define CONFIG_FAT_WRITE -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" /* SPL USB Support */ diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h index d865f415bc..d009900c39 100644 --- a/include/configs/am57xx_evm.h +++ b/include/configs/am57xx_evm.h @@ -38,14 +38,34 @@ /* Define the default GPT table for eMMC */ #define PARTS_DEFAULT \ + /* Linux partitions */ \ "uuid_disk=${uuid_gpt_disk};" \ - "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}" + "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \ + /* Android partitions */ \ + "partitions_android=" \ + "uuid_disk=${uuid_gpt_disk};" \ + "name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};" \ + "name=bootloader,size=768K,uuid=${uuid_gpt_bootloader};" \ + "name=environment,size=128K,uuid=${uuid_gpt_environment};" \ + "name=misc,size=128K,uuid=${uuid_gpt_misc};" \ + "name=reserved,size=256K,uuid=${uuid_gpt_reserved};" \ + "name=efs,size=16M,uuid=${uuid_gpt_efs};" \ + "name=crypto,size=16K,uuid=${uuid_gpt_crypto};" \ + "name=recovery,size=10M,uuid=${uuid_gpt_recovery};" \ + "name=boot,size=10M,uuid=${uuid_gpt_boot};" \ + "name=system,size=768M,uuid=${uuid_gpt_system};" \ + "name=cache,size=256M,uuid=${uuid_gpt_cache};" \ + "name=ipu1,size=1M,uuid=${uuid_gpt_ipu1};" \ + "name=ipu2,size=1M,uuid=${uuid_gpt_ipu2};" \ + "name=userdata,size=-,uuid=${uuid_gpt_userdata}" #include <configs/ti_omap5_common.h> /* Enhance our eMMC support / experience. */ #define CONFIG_CMD_GPT #define CONFIG_EFI_PARTITION +#define CONFIG_RANDOM_UUID +#define CONFIG_HSMMC2_8BIT /* CPSW Ethernet */ #define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */ diff --git a/include/configs/apalis_t30.h b/include/configs/apalis_t30.h index d38302d6c4..f2a24c11de 100644 --- a/include/configs/apalis_t30.h +++ b/include/configs/apalis_t30.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014-2015 Marcel Ziswiler + * Copyright (c) 2014-2016 Marcel Ziswiler * * Configuration settings for the Toradex Apalis T30 modules. * @@ -16,7 +16,7 @@ #define CONFIG_ARCH_MISC_INIT /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "Toradex Apalis T30" +#define CONFIG_DISPLAY_BOARDINFO_LATE /* Calls show_board_info() */ /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTA @@ -32,11 +32,12 @@ #define CONFIG_GENERIC_MMC #define CONFIG_TEGRA_MMC -/* Environment in eMMC, at the end of 2nd "boot sector" */ +/* Environment in eMMC, before config block at the end of 1st "boot sector" */ #define CONFIG_ENV_IS_IN_MMC -#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) +#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE + \ + CONFIG_TDX_CFG_BLOCK_OFFSET) #define CONFIG_SYS_MMC_ENV_DEV 0 -#define CONFIG_SYS_MMC_ENV_PART 2 +#define CONFIG_SYS_MMC_ENV_PART 1 /* USB host support */ #define CONFIG_USB_EHCI diff --git a/include/configs/baltos.h b/include/configs/baltos.h index e69c1b63c1..8efd513f32 100644 --- a/include/configs/baltos.h +++ b/include/configs/baltos.h @@ -224,7 +224,7 @@ /* General network SPL, both CPSW and USB gadget RNDIS */ #define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL"*/ -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/am33xx/u-boot-spl.lds" #ifdef CONFIG_NAND #define CONFIG_NAND_OMAP_GPMC diff --git a/include/configs/bav335x.h b/include/configs/bav335x.h index ac47decb63..2f51e2cd5a 100644 --- a/include/configs/bav335x.h +++ b/include/configs/bav335x.h @@ -357,7 +357,7 @@ DEFAULT_LINUX_BOOT_ENV \ /* USB gadget RNDIS */ -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/am33xx/u-boot-spl.lds" #endif #ifdef CONFIG_NAND diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h index e425cb9193..7afffa2ec6 100644 --- a/include/configs/bur_am335x_common.h +++ b/include/configs/bur_am335x_common.h @@ -14,7 +14,6 @@ /* ------------------------------------------------------------------------- */ #define CONFIG_AM33XX #define CONFIG_OMAP -#define CONFIG_OMAP_COMMON #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ /* Timer information */ @@ -113,6 +112,6 @@ /* General parts of the framework, required. */ #define CONFIG_SPL_BOARD_INIT -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/am33xx/u-boot-spl.lds" #endif /* ! __BUR_AM335X_COMMON_H__ */ diff --git a/include/configs/cm_t335.h b/include/configs/cm_t335.h index 7eed776f62..8f24174a21 100644 --- a/include/configs/cm_t335.h +++ b/include/configs/cm_t335.h @@ -25,8 +25,6 @@ #undef CONFIG_MAX_RAM_BANK_SIZE #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* 512MB */ -#define CONFIG_OMAP_COMMON - #define MACH_TYPE_CM_T335 4586 /* Until the next sync */ #define CONFIG_MACH_TYPE MACH_TYPE_CM_T335 @@ -104,7 +102,7 @@ #define CONFIG_SYS_I2C_EEPROM_BUS 0 /* SPL */ -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/am33xx/u-boot-spl.lds" /* Network. */ #define CONFIG_PHY_GIGE diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index 201711d987..da5a4b3fb8 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -25,7 +25,6 @@ #define CONFIG_OMAP /* in a TI OMAP core */ #define CONFIG_OMAP_GPIO #define CONFIG_CM_T3X /* working with CM-T35 and CM-T3730 */ -#define CONFIG_OMAP_COMMON /* Common ARM Erratas */ #define CONFIG_ARM_ERRATA_454179 #define CONFIG_ARM_ERRATA_430973 @@ -300,7 +299,7 @@ #define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_ECC #define CONFIG_SPL_OMAP3_ID_NAND -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" /* NAND boot config */ #define CONFIG_SYS_NAND_5_ADDR_CYCLE diff --git a/include/configs/cm_t3517.h b/include/configs/cm_t3517.h index edb52be5a8..1e2a477027 100644 --- a/include/configs/cm_t3517.h +++ b/include/configs/cm_t3517.h @@ -15,7 +15,6 @@ */ #define CONFIG_OMAP /* in a TI OMAP core */ #define CONFIG_CM_T3517 /* working with CM-T3517 */ -#define CONFIG_OMAP_COMMON /* Common ARM Erratas */ #define CONFIG_ARM_ERRATA_454179 #define CONFIG_ARM_ERRATA_430973 diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h index 5ec4926dd8..9c24ba9965 100644 --- a/include/configs/cm_t43.h +++ b/include/configs/cm_t43.h @@ -103,7 +103,7 @@ #define CONFIG_ENV_OFFSET (768 * 1024) #define CONFIG_ENV_SPI_MAX_HZ 48000000 -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" /* Enhance our eMMC support / experience. */ #define CONFIG_CMD_GPT diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index 309aef8405..5ce0a34a5d 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -21,10 +21,14 @@ /*#define CONFIG_DBG_MONITOR*/ #define PHYS_SDRAM_SIZE SZ_512M +#define CONFIG_ARCH_MISC_INIT #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_LATE_INIT -#define CONFIG_DISPLAY_BOARDINFO_LATE +#define CONFIG_DISPLAY_BOARDINFO_LATE /* Calls show_board_info() */ + +#define CONFIG_ENV_VARS_UBOOT_CONFIG +#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h index e44a84729b..51f7877908 100644 --- a/include/configs/colibri_pxa270.h +++ b/include/configs/colibri_pxa270.h @@ -2,7 +2,7 @@ * Toradex Colibri PXA270 configuration file * * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com> - * Copyright (C) 2015 Marcel Ziswiler <marcel@ziswiler.com> + * Copyright (C) 2015-2016 Marcel Ziswiler <marcel@ziswiler.com> * * SPDX-License-Identifier: GPL-2.0+ */ @@ -21,10 +21,14 @@ /* We will never enable dcache because we have to setup MMU first */ #define CONFIG_SYS_DCACHE_OFF +#define CONFIG_DISPLAY_BOARDINFO_LATE /* Calls show_board_info() */ + /* * Environment settings */ #define CONFIG_ENV_OVERWRITE +#define CONFIG_ENV_VARS_UBOOT_CONFIG +#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG #define CONFIG_SYS_MALLOC_LEN (128 * 1024) #define CONFIG_ARCH_CPU_INIT #define CONFIG_BOOTCOMMAND \ @@ -43,9 +47,6 @@ /* * Serial Console Configuration */ -#define CONFIG_PXA_SERIAL -#define CONFIG_FFUART 1 -#define CONFIG_CONS_INDEX 3 #define CONFIG_BAUDRATE 115200 /* @@ -94,8 +95,8 @@ #define CONFIG_SYS_MAXARGS 16 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_DEVICE_NULLDEV 1 -#define CONFIG_CMDLINE_EDITING 1 -#define CONFIG_AUTO_COMPLETE 1 +#undef CONFIG_CMDLINE_EDITING /* Saves 2.5 KB */ +#undef CONFIG_AUTO_COMPLETE /* Saves 2.5 KB */ /* * Clock Configuration diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index 46349896d7..6a52869026 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -14,7 +14,7 @@ #define CONFIG_ARCH_MISC_INIT /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "Toradex Colibri T20" +#define CONFIG_DISPLAY_BOARDINFO_LATE /* Calls show_board_info() */ /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTA diff --git a/include/configs/colibri_t30.h b/include/configs/colibri_t30.h index e2a2549fb6..e8b3f99f53 100644 --- a/include/configs/colibri_t30.h +++ b/include/configs/colibri_t30.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2015 Stefan Agner + * Copyright (c) 2013-2016 Stefan Agner * * Configuration settings for the Toradex Colibri T30 modules. * @@ -16,7 +16,7 @@ #define CONFIG_ARCH_MISC_INIT /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "Toradex Colibri T30" +#define CONFIG_DISPLAY_BOARDINFO_LATE /* Calls show_board_info() */ /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTA @@ -32,11 +32,12 @@ #define CONFIG_GENERIC_MMC #define CONFIG_TEGRA_MMC -/* Environment in eMMC, at the end of 2nd "boot sector" */ +/* Environment in eMMC, before config block at the end of 1st "boot sector" */ #define CONFIG_ENV_IS_IN_MMC -#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) +#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE + \ + CONFIG_TDX_CFG_BLOCK_OFFSET) #define CONFIG_SYS_MMC_ENV_DEV 0 -#define CONFIG_SYS_MMC_ENV_PART 2 +#define CONFIG_SYS_MMC_ENV_PART 1 /* USB host support */ #define CONFIG_USB_EHCI diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index be773a311a..0cd77fff51 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -1,7 +1,7 @@ /* - * Copyright 2015 Toradex, Inc. + * Copyright 2015-2016 Toradex, Inc. * - * Configuration settings for the Toradex VF50/VF61 module. + * Configuration settings for the Toradex VF50/VF61 modules. * * Based on vf610twr.h: * Copyright 2013 Freescale Semiconductor, Inc. @@ -21,6 +21,7 @@ #define CONFIG_SYS_FSL_CLK #define CONFIG_ARCH_MISC_INIT +#define CONFIG_DISPLAY_BOARDINFO_LATE /* Calls show_board_info() */ #define CONFIG_SKIP_LOWLEVEL_INIT @@ -36,6 +37,7 @@ /* Allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE +#define CONFIG_ENV_VARS_UBOOT_CONFIG #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG #define CONFIG_BAUDRATE 115200 @@ -206,13 +208,6 @@ #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET -/* USB Client Support */ -#define CONFIG_TRDX_VID 0x1B67 -#define CONFIG_TRDX_PID_COLIBRI_VF50 0x0016 -#define CONFIG_TRDX_PID_COLIBRI_VF61 0x0017 -#define CONFIG_TRDX_PID_COLIBRI_VF61IT 0x0018 -#define CONFIG_TRDX_PID_COLIBRI_VF50IT 0x0019 - /* USB DFU */ #define CONFIG_SYS_DFU_DATA_BUF_SIZE (1024 * 1024) diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index 798002d4cd..75a7854204 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -54,11 +54,12 @@ /* Android partitions */ \ "partitions_android=" \ "uuid_disk=${uuid_gpt_disk};" \ - "name=xloader,start=128K,size=128K,uuid=${uuid_gpt_xloader};" \ - "name=bootloader,size=384K,uuid=${uuid_gpt_bootloader};" \ + "name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};" \ + "name=bootloader,size=768K,uuid=${uuid_gpt_bootloader};" \ "name=environment,size=128K,uuid=${uuid_gpt_environment};" \ "name=misc,size=128K,uuid=${uuid_gpt_misc};" \ - "name=efs,start=1280K,size=16M,uuid=${uuid_gpt_efs};" \ + "name=reserved,size=256K,uuid=${uuid_gpt_reserved};" \ + "name=efs,size=16M,uuid=${uuid_gpt_efs};" \ "name=crypto,size=16K,uuid=${uuid_gpt_crypto};" \ "name=recovery,size=10M,uuid=${uuid_gpt_recovery};" \ "name=boot,size=10M,uuid=${uuid_gpt_boot};" \ @@ -133,7 +134,6 @@ #undef CONFIG_CMD_BOOTD #ifdef CONFIG_SPL_DFU_SUPPORT #define CONFIG_SPL_LOAD_FIT_ADDRESS 0x80200000 -#define CONFIG_SPL_HASH_SUPPORT #define DFU_ALT_INFO_RAM \ "dfu_alt_info_ram=" \ "kernel ram 0x80200000 0x4000000;" \ diff --git a/include/configs/exynos7420-common.h b/include/configs/exynos7420-common.h index f7c47094ae..1cea74e954 100644 --- a/include/configs/exynos7420-common.h +++ b/include/configs/exynos7420-common.h @@ -47,6 +47,7 @@ #define CONFIG_IRAM_BASE 0x02100000 #define CONFIG_IRAM_SIZE 0x58000 #define CONFIG_IRAM_END (CONFIG_IRAM_BASE + CONFIG_IRAM_SIZE) +#define CPU_RELEASE_ADDR secondary_boot_addr /* Number of CPUs available */ #define CONFIG_CORE_COUNT 0x8 diff --git a/include/configs/h2200.h b/include/configs/h2200.h index 8e77982580..18b5488392 100644 --- a/include/configs/h2200.h +++ b/include/configs/h2200.h @@ -107,8 +107,6 @@ /* * Serial port */ - -#define CONFIG_PXA_SERIAL #define CONFIG_FFUART #define CONFIG_CONS_INDEX 3 diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h index 0662053f85..dce4438797 100644 --- a/include/configs/imx6_spl.h +++ b/include/configs/imx6_spl.h @@ -25,7 +25,7 @@ * or 64KB */ #define CONFIG_SYS_THUMB_BUILD -#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/omap-common/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" #define CONFIG_SPL_TEXT_BASE 0x00908000 #define CONFIG_SPL_MAX_SIZE 0x10000 #define CONFIG_SPL_STACK 0x0091FFB8 diff --git a/include/configs/k2e_evm.h b/include/configs/k2e_evm.h index 8d6471ae88..777f22540a 100644 --- a/include/configs/k2e_evm.h +++ b/include/configs/k2e_evm.h @@ -12,7 +12,6 @@ /* Platform type */ #define CONFIG_SOC_K2E -#define CONFIG_K2E_EVM /* U-Boot general configuration */ #define CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \ diff --git a/include/configs/k2g_evm.h b/include/configs/k2g_evm.h index a14544526c..2da0d8dd7f 100644 --- a/include/configs/k2g_evm.h +++ b/include/configs/k2g_evm.h @@ -12,7 +12,6 @@ /* Platform type */ #define CONFIG_SOC_K2G -#define CONFIG_K2G_EVM /* U-Boot general configuration */ #define CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \ diff --git a/include/configs/k2hk_evm.h b/include/configs/k2hk_evm.h index 913d4545b8..4adb119b30 100644 --- a/include/configs/k2hk_evm.h +++ b/include/configs/k2hk_evm.h @@ -12,7 +12,6 @@ /* Platform type */ #define CONFIG_SOC_K2HK -#define CONFIG_K2HK_EVM /* U-Boot general configuration */ #define CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \ diff --git a/include/configs/k2l_evm.h b/include/configs/k2l_evm.h index 395e61c21d..9bdd56570b 100644 --- a/include/configs/k2l_evm.h +++ b/include/configs/k2l_evm.h @@ -12,7 +12,6 @@ /* Platform type */ #define CONFIG_SOC_K2L -#define CONFIG_K2L_EVM /* U-Boot general configuration */ #define CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \ diff --git a/include/configs/kc1.h b/include/configs/kc1.h index f8078eff94..76f2b8b7b4 100644 --- a/include/configs/kc1.h +++ b/include/configs/kc1.h @@ -31,7 +31,6 @@ #define CONFIG_OMAP #define CONFIG_OMAP4430 -#define CONFIG_OMAP_COMMON /* * Board @@ -126,7 +125,7 @@ #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 #define CONFIG_SYS_SPL_MALLOC_SIZE (1024 * 1024) -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" #define CONFIG_SPL_BOARD_INIT #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 2 diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 80603c9e46..20f0c6143c 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -110,7 +110,7 @@ "kernel_size=0x2800000\0" \ #define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/ram0 " \ - "earlycon=uart8250,mmio,0x21c0500" + "earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000" #define CONFIG_BOOTCOMMAND "sf probe 0:0; sf read $kernel_load "\ "$kernel_start $kernel_size && "\ "bootm $kernel_load" diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h new file mode 100644 index 0000000000..7af4bc41dc --- /dev/null +++ b/include/configs/ls1021aiot.h @@ -0,0 +1,366 @@ +/* + * Copyright 2016 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_LS102XA + +#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR + +#define CONFIG_SYS_FSL_CLK + +#define CONFIG_BOARD_EARLY_INIT_F + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 16 * 1024 * 1024) + +#define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE + +/* XHCI Support - enabled by default */ +#define CONFIG_HAS_FSL_XHCI_USB + +#ifdef CONFIG_HAS_FSL_XHCI_USB +#define CONFIG_USB_XHCI_FSL +#define CONFIG_USB_XHCI_DWC3 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 +#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 +#endif + +#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_XHCI_USB) +#define CONFIG_USB_STORAGE +#define CONFIG_CMD_EXT2 +#endif + +/* + * Generic Timer Definitions + */ +#define GENERIC_TIMER_CLK 12500000 + +#define CONFIG_SYS_CLK_FREQ 100000000 +#define CONFIG_DDR_CLK_FREQ 100000000 + +/* + * DDR: 800 MHz ( 1600 MT/s data rate ) + */ + +#define DDR_SDRAM_CFG 0x470c0008 +#define DDR_CS0_BNDS 0x008000bf +#define DDR_CS0_CONFIG 0x80014302 +#define DDR_TIMING_CFG_0 0x50550004 +#define DDR_TIMING_CFG_1 0xbcb38c56 +#define DDR_TIMING_CFG_2 0x0040d120 +#define DDR_TIMING_CFG_3 0x010e1000 +#define DDR_TIMING_CFG_4 0x00000001 +#define DDR_TIMING_CFG_5 0x03401400 +#define DDR_SDRAM_CFG_2 0x00401010 +#define DDR_SDRAM_MODE 0x00061c60 +#define DDR_SDRAM_MODE_2 0x00180000 +#define DDR_SDRAM_INTERVAL 0x18600618 +#define DDR_DDR_WRLVL_CNTL 0x8655f605 +#define DDR_DDR_WRLVL_CNTL_2 0x05060607 +#define DDR_DDR_WRLVL_CNTL_3 0x05050505 +#define DDR_DDR_CDR1 0x80040000 +#define DDR_DDR_CDR2 0x00000001 +#define DDR_SDRAM_CLK_CNTL 0x02000000 +#define DDR_DDR_ZQ_CNTL 0x89080600 +#define DDR_CS0_CONFIG_2 0 +#define DDR_SDRAM_CFG_MEM_EN 0x80000000 +#define SDRAM_CFG2_D_INIT 0x00000010 +#define DDR_CDR2_VREF_TRAIN_EN 0x00000080 +#define SDRAM_CFG2_FRC_SR 0x80000000 +#define SDRAM_CFG_BI 0x00000001 + +#ifdef CONFIG_RAMBOOT_PBL +#define CONFIG_SYS_FSL_PBL_PBI \ + board/freescale/ls1021aiot/ls102xa_pbi.cfg +#endif + +#ifdef CONFIG_SD_BOOT +#define CONFIG_SYS_FSL_PBL_RCW \ + board/freescale/ls1021aiot/ls102xa_rcw_sd.cfg +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds" +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_ENV_SUPPORT +#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT +#define CONFIG_SPL_WATCHDOG_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_MMC_SUPPORT +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0xe8 + +#define CONFIG_SPL_TEXT_BASE 0x10000000 +#define CONFIG_SPL_MAX_SIZE 0x1a000 +#define CONFIG_SPL_STACK 0x1001d000 +#define CONFIG_SPL_PAD_TO 0x1c000 +#define CONFIG_SYS_TEXT_BASE 0x82000000 + +#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE + \ + CONFIG_SYS_MONITOR_LEN) +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 +#define CONFIG_SPL_BSS_START_ADDR 0x80100000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 +#define CONFIG_SYS_MONITOR_LEN 0x80000 +#define CONFIG_SYS_NO_FLASH +#endif + +#ifdef CONFIG_QSPI_BOOT +#define CONFIG_SYS_TEXT_BASE 0x40010000 +#endif + +#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) +#define CONFIG_SYS_NO_FLASH +#endif + +#define CONFIG_NR_DRAM_BANKS 1 + +#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL +#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE + +#define CONFIG_FSL_CAAM /* Enable CAAM */ + +/* + * Serial Port + */ +#define CONFIG_CONS_INDEX 1 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE 1 +#define CONFIG_SYS_NS16550_CLK get_serial_clock() +#define CONFIG_BAUDRATE 115200 + +/* + * I2C + */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ +#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ +#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ + +/* EEPROM */ +#define CONFIG_ID_EEPROM +#define CONFIG_SYS_I2C_EEPROM_NXID +#define CONFIG_SYS_EEPROM_BUS_NUM 0 +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x51 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 + +/* + * MMC + */ +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_FSL_ESDHC +#define CONFIG_GENERIC_MMC + +/* SATA */ +#define CONFIG_BOARD_LATE_INIT +#define CONFIG_CMD_SCSI +#define CONFIG_LIBATA +#define CONFIG_SCSI_AHCI +#define CONFIG_SCSI_AHCI_PLAT +#ifndef PCI_DEVICE_ID_FREESCALE_AHCI +#define PCI_DEVICE_ID_FREESCALE_AHCI 0x0440 +#endif +#define CONFIG_SCSI_DEV_LIST {PCI_VENDOR_ID_FREESCALE, \ + PCI_DEVICE_ID_FREESCALE_AHCI} + +#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 +#define CONFIG_SYS_SCSI_MAX_LUN 1 +#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ + CONFIG_SYS_SCSI_MAX_LUN) + +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION + +/* SPI */ +#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) +#define CONFIG_SPI_FLASH_SPANSION + +/* QSPI */ +#define QSPI0_AMBA_BASE 0x40000000 +#define FSL_QSPI_FLASH_SIZE (1 << 24) +#define FSL_QSPI_FLASH_NUM 2 +#define CONFIG_SPI_FLASH_BAR +#define CONFIG_SPI_FLASH_SPANSION +#endif + +/* DM SPI */ +#if defined(CONFIG_FSL_DSPI) || defined(CONFIG_FSL_QSPI) +#define CONFIG_CMD_SF +#define CONFIG_DM_SPI_FLASH +#endif + +/* + * eTSEC + */ +#define CONFIG_TSEC_ENET + +#ifdef CONFIG_TSEC_ENET +#define CONFIG_MII +#define CONFIG_MII_DEFAULT_TSEC 1 +#define CONFIG_TSEC1 1 +#define CONFIG_TSEC1_NAME "eTSEC1" +#define CONFIG_TSEC2 1 +#define CONFIG_TSEC2_NAME "eTSEC2" + +#define TSEC1_PHY_ADDR 1 +#define TSEC2_PHY_ADDR 3 + +#define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) +#define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) + +#define TSEC1_PHYIDX 0 +#define TSEC2_PHYIDX 0 + +#define CONFIG_ETHPRIME "eTSEC2" + +#define CONFIG_PHY_GIGE +#define CONFIG_PHYLIB +#define CONFIG_PHY_ATHEROS + +#define CONFIG_HAS_ETH0 +#define CONFIG_HAS_ETH1 +#define CONFIG_HAS_ETH2 +#endif + +/* PCIe */ +#define CONFIG_PCI /* Enable PCI/PCIE */ +#define CONFIG_PCIE1 /* PCIE controler 1 */ +#define CONFIG_PCIE2 /* PCIE controler 2 */ + +/* Use common FSL Layerscape PCIe code */ +#define CONFIG_PCIE_LAYERSCAPE +#define FSL_PCIE_COMPAT "fsl,ls1021a-pcie" + +#define CONFIG_SYS_PCI_64BIT + +#define CONFIG_SYS_PCIE_CFG0_PHYS_OFF 0x00000000 +#define CONFIG_SYS_PCIE_CFG0_SIZE 0x00001000 /* 4k */ +#define CONFIG_SYS_PCIE_CFG1_PHYS_OFF 0x00001000 +#define CONFIG_SYS_PCIE_CFG1_SIZE 0x00001000 /* 4k */ + +#define CONFIG_SYS_PCIE_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE_IO_PHYS_OFF 0x00010000 +#define CONFIG_SYS_PCIE_IO_SIZE 0x00010000 /* 64k */ + +#define CONFIG_SYS_PCIE_MEM_BUS 0x08000000 +#define CONFIG_SYS_PCIE_MEM_PHYS_OFF 0x04000000 +#define CONFIG_SYS_PCIE_MEM_SIZE 0x08000000 /* 128M */ + +#ifdef CONFIG_PCI +#define CONFIG_PCI_PNP +#define CONFIG_PCI_SCAN_SHOW +#define CONFIG_CMD_PCI +#endif + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII + +#define CONFIG_CMDLINE_TAG +#define CONFIG_CMDLINE_EDITING + +#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT) +#undef CONFIG_CMD_IMLS +#endif + +#define CONFIG_PEN_ADDR_BIG_ENDIAN +#define CONFIG_LAYERSCAPE_NS_ACCESS +#define CONFIG_SMP_PEN_ADDR 0x01ee0200 +#define CONFIG_TIMER_CLK_FREQ 12500000 + +#define CONFIG_HWCONFIG +#define HWCONFIG_BUFFER_SIZE 256 + +#define CONFIG_FSL_DEVICE_DISABLE + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "bootargs=root=/dev/ram0 rw console=ttyS0,115200\0" \ +"initrd_high=0xffffffff\0" \ +"fdt_high=0xffffffff\0" + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE \ + (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_CMD_GREPENV +#define CONFIG_CMD_MEMINFO + +#define CONFIG_SYS_LOAD_ADDR 0x82000000 + +#define CONFIG_LS102XA_STREAM_ID + +/* + * Stack sizes + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE (30 * 1024) + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE +#else +/* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#endif + +#define CONFIG_SYS_QE_FW_ADDR 0x67f40000 + +/* + * Environment + */ + +#define CONFIG_ENV_OVERWRITE + +#if defined(CONFIG_SD_BOOT) +#define CONFIG_ENV_OFFSET 0x100000 +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_ENV_SIZE 0x2000 +#elif defined(CONFIG_QSPI_BOOT) +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_OFFSET 0x100000 +#define CONFIG_ENV_SECT_SIZE 0x10000 +#endif + +#define CONFIG_OF_BOARD_SETUP +#define CONFIG_OF_STDOUT_VIA_ALIAS +#define CONFIG_CMD_BOOTZ + +#define CONFIG_MISC_INIT_R + +/* Hash command with SHA acceleration supported in hardware */ + +#ifdef CONFIG_FSL_CAAM + +#define CONFIG_CMD_HASH + +#define CONFIG_SHA_HW_ACCEL + +#endif + +#include <asm/fsl_secure_boot.h> + +#endif diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index c0f5bd3562..29e0aa5ee1 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -127,6 +127,14 @@ unsigned long get_board_ddr_clk(void); #endif #endif +/* LPUART */ +#ifdef CONFIG_LPUART +#define CONFIG_LPUART_32B_REG +#define CFG_UART_MUX_MASK 0x6 +#define CFG_UART_MUX_SHIFT 1 +#define CFG_LPUART_EN 0x2 +#endif + /* SATA */ #define CONFIG_LIBATA #define CONFIG_SCSI_AHCI diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 32fa0eb3ee..31df781934 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -269,6 +269,7 @@ unsigned long get_board_sys_clk(void); #ifdef CONFIG_FSL_DSPI #define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_BAR +#define CONFIG_SPI_FLASH_STMICRO #endif /* diff --git a/include/configs/mcx.h b/include/configs/mcx.h index 7db9e5a1dd..0c6b1e89fc 100644 --- a/include/configs/mcx.h +++ b/include/configs/mcx.h @@ -15,7 +15,6 @@ #define CONFIG_OMAP /* in a TI OMAP core */ #define CONFIG_OMAP3_MCX /* working with mcx */ #define CONFIG_OMAP_GPIO -#define CONFIG_OMAP_COMMON /* Common ARM Erratas */ #define CONFIG_ARM_ERRATA_454179 #define CONFIG_ARM_ERRATA_430973 @@ -316,7 +315,7 @@ #define CONFIG_SPL_NAND_BASE #define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_ECC -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ #define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index d1230a56f4..4d5265f540 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -27,7 +27,6 @@ #define CONFIG_OMAP3430 /* which is in a 3430 */ #define CONFIG_OMAP3_RX51 /* working with RX51 */ #define CONFIG_SYS_L2CACHE_OFF /* pretend there is no L2 CACHE */ -#define CONFIG_OMAP_COMMON /* Common ARM Erratas */ #define CONFIG_ARM_ERRATA_454179 #define CONFIG_ARM_ERRATA_430973 diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 8a69a5f976..9850aa6c05 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -104,11 +104,52 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ /* devices */ +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) + +#define CONFIG_BOOTCOMMAND \ + "run findfdt; " \ + "run distro_bootcmd; " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ + "if run userbutton; then " \ + "setenv bootenv uEnv.txt;" \ + "else " \ + "setenv bootenv user.txt;" \ + "fi;" \ + "echo SD/MMC found on device ${mmcdev};" \ + "if run loadbootenv; then " \ + "echo Loaded environment from ${bootenv};" \ + "run importbootenv;" \ + "fi;" \ + "if test -n $uenvcmd; then " \ + "echo Running uenvcmd ...;" \ + "run uenvcmd;" \ + "fi;" \ + "if run loadbootscript; then " \ + "run bootscript; " \ + "else " \ + "if run loadimage; then " \ + "run mmcboot;" \ + "fi;" \ + "fi; " \ + "fi;" \ + "run nandboot;" \ + "setenv bootfile zImage;" \ + "if run loadimage; then " \ + "run loadfdt;" \ + "run mmcbootz; " \ + "fi; " \ + +#include <config_distro_bootcmd.h> + #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x80200000\0" \ + "kernel_addr_r=0x80200000\0" \ "rdaddr=0x81000000\0" \ + "initrd_addr_r=0x81000000\0" \ "fdt_high=0xffffffff\0" \ "fdtaddr=0x80f80000\0" \ + "fdt_addr_r=0x80f80000\0" \ "usbtty=cdc_acm\0" \ "bootfile=uImage\0" \ "ramdisk=ramdisk.gz\0" \ @@ -203,39 +244,8 @@ "userbutton=if gpio input 173; then run userbutton_xm; " \ "else run userbutton_nonxm; fi;\0" \ "userbutton_xm=gpio input 4;\0" \ - "userbutton_nonxm=gpio input 7;\0" -/* "run userbutton" will return 1 (false) if pressed and 0 (true) if not */ -#define CONFIG_BOOTCOMMAND \ - "run findfdt; " \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run userbutton; then " \ - "setenv bootenv uEnv.txt;" \ - "else " \ - "setenv bootenv user.txt;" \ - "fi;" \ - "echo SD/MMC found on device ${mmcdev};" \ - "if run loadbootenv; then " \ - "echo Loaded environment from ${bootenv};" \ - "run importbootenv;" \ - "fi;" \ - "if test -n $uenvcmd; then " \ - "echo Running uenvcmd ...;" \ - "run uenvcmd;" \ - "fi;" \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot;" \ - "fi;" \ - "fi; " \ - "fi;" \ - "run nandboot;" \ - "setenv bootfile zImage;" \ - "if run loadimage; then " \ - "run loadfdt;" \ - "run mmcbootz; " \ - "fi; " \ + "userbutton_nonxm=gpio input 7;\0" \ + BOOTENV /* * OMAP3 has 12 GP timers, they can be driven by the system clock diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index f4f4e4917a..6388a9ccaf 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -92,7 +92,6 @@ */ #define CONFIG_OMAP /* This is TI OMAP core */ #define CONFIG_OMAP_GPIO -#define CONFIG_OMAP_COMMON /* Common ARM Erratas */ #define CONFIG_ARM_ERRATA_454179 #define CONFIG_ARM_ERRATA_430973 @@ -340,7 +339,7 @@ #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_OMAP3_ID_NAND -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" /* * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index 0827ebedfd..abce61ae36 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -15,19 +15,6 @@ #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ -/* - * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM - * 64 bytes before this address should be set aside for u-boot.img's - * header. That is 0x800FFFC0--0x80100000 should not be used for any - * other needs. We use this rather than the inherited defines from - * ti_armv7_common.h for backwards compatibility. - */ -#define CONFIG_SYS_TEXT_BASE 0x80100000 -#define CONFIG_SPL_BSS_START_ADDR 0x80000000 -#define CONFIG_SPL_BSS_MAX_SIZE (512 << 10) /* 512 KB */ -#define CONFIG_SYS_SPL_MALLOC_START 0x80208000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 - #include <configs/ti_omap3_common.h> /* @@ -121,9 +108,12 @@ #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ #define CONFIG_MTD_PARTITIONS /* required for UBI partition support */ #define MTDIDS_DEFAULT "nand0=omap2-nand.0" -#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO),"\ - "1920k(u-boot),128k(u-boot-env),"\ - "4m(kernel),-(fs)" +#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:"\ + "512k(MLO),"\ + "1792k(u-boot),"\ + "128k(spl-os)," \ + "128k(u-boot-env),"\ + "6m(kernel),-(fs)" #endif /* Environment information */ diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h index ef081b259b..aff4635e90 100644 --- a/include/configs/pcm051.h +++ b/include/configs/pcm051.h @@ -120,7 +120,7 @@ /* CPU */ #define CONFIG_ENV_IS_NOWHERE -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/am33xx/u-boot-spl.lds" #ifdef CONFIG_SPI_BOOT #define CONFIG_SPL_SPI_LOAD diff --git a/include/configs/pengwyn.h b/include/configs/pengwyn.h index 4130f53582..f1db204910 100644 --- a/include/configs/pengwyn.h +++ b/include/configs/pengwyn.h @@ -207,6 +207,6 @@ /* CPSW support */ -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/am33xx/u-boot-spl.lds" #endif /* ! __CONFIG_PENGWYN_H */ diff --git a/include/configs/pepper.h b/include/configs/pepper.h index e99188fc43..d9c84f27ea 100644 --- a/include/configs/pepper.h +++ b/include/configs/pepper.h @@ -90,6 +90,6 @@ #define CONFIG_PHY_RESET_DELAY 1000 /* SPL */ -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/am33xx/u-boot-spl.lds" #endif /* __CONFIG_PEPPER_H */ diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index 4eef3f8cc6..92be29e7bb 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -79,6 +79,13 @@ #define CONFIG_G_DNL_VENDOR_NUM 0x2207 #define CONFIG_G_DNL_PRODUCT_NUM 0x310a +/* usb host */ +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_DWC2 +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_SMSC95XX +#define CONFIG_USB_ETHER_ASIX +#endif #define ENV_MEM_LAYOUT_SETTINGS \ "scriptaddr=0x60000000\0" \ "pxefile_addr_r=0x60100000\0" \ diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h index 7ca1696a16..9ec71c4baa 100644 --- a/include/configs/rockchip-common.h +++ b/include/configs/rockchip-common.h @@ -27,7 +27,7 @@ "name=reserved2,size=4M,uuid=${uuid_gpt_reserved2};" \ "name=loader2,size=4MB,uuid=${uuid_gpt_loader2};" \ "name=atf,size=4M,uuid=${uuid_gpt_atf};" \ - "name=boot,size=128M,bootable,uuid=${uuid_gpt_boot};" \ + "name=boot,size=112M,bootable,uuid=${uuid_gpt_boot};" \ "name=rootfs,size=-,uuid=${uuid_gpt_rootfs};\0" \ #endif diff --git a/include/configs/rpi.h b/include/configs/rpi.h index 45c8234905..4406366b18 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -16,7 +16,6 @@ /* Architecture, CPU, etc.*/ #define CONFIG_ARCH_CPU_INIT -#define CONFIG_BOARD_EARLY_INIT_F /* Use SoC timer for AArch32, but architected timer for AArch64 */ #ifndef CONFIG_ARM64 @@ -72,7 +71,7 @@ #define CONFIG_BCM2835_GPIO /* LCD */ #define CONFIG_LCD_DT_SIMPLEFB -#define LCD_BPP LCD_COLOR16 +#define LCD_BPP LCD_COLOR32 /* * Prevent allocation of RAM for FB; the real FB address is queried * dynamically from the VideoCore co-processor, and comes from RAM diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 31fcc947dd..456429694e 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -16,7 +16,6 @@ #define CONFIG_AM33XX #define CONFIG_OMAP -#define CONFIG_OMAP_COMMON #include <asm/arch/omap.h> @@ -136,7 +135,7 @@ #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/am33xx/u-boot-spl.lds" #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_NAND_AM33XX_BCH diff --git a/include/configs/sniper.h b/include/configs/sniper.h index 7fada3fec0..e12b101333 100644 --- a/include/configs/sniper.h +++ b/include/configs/sniper.h @@ -26,7 +26,6 @@ */ #define CONFIG_OMAP -#define CONFIG_OMAP_COMMON /* * Board @@ -134,7 +133,7 @@ #define CONFIG_SYS_SPL_MALLOC_SIZE (1024 * 1024) #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" #define CONFIG_SPL_BOARD_INIT #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 2 diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 2e02f8cd18..b0bfc0dfd7 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -145,6 +145,7 @@ #define CONFIG_MMC_SUNXI_SLOT 0 #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */ +#define CONFIG_SYS_MMC_MAX_DEVICE 4 #endif /* 64MB of malloc() pool */ diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h index 098c9bcc6c..ff0c60d01c 100644 --- a/include/configs/tam3517-common.h +++ b/include/configs/tam3517-common.h @@ -15,7 +15,6 @@ */ #define CONFIG_OMAP /* in a TI OMAP core */ #define CONFIG_OMAP_GPIO -#define CONFIG_OMAP_COMMON /* Common ARM Erratas */ #define CONFIG_ARM_ERRATA_454179 #define CONFIG_ARM_ERRATA_430973 @@ -198,7 +197,7 @@ #define CONFIG_SPL_NAND_BASE #define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_ECC -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h index 861e502775..a873e7b553 100644 --- a/include/configs/tao3530.h +++ b/include/configs/tao3530.h @@ -19,7 +19,6 @@ #define CONFIG_OMAP /* in a TI OMAP core */ #define CONFIG_OMAP_GPIO -#define CONFIG_OMAP_COMMON /* Common ARM Erratas */ #define CONFIG_ARM_ERRATA_454179 #define CONFIG_ARM_ERRATA_430973 @@ -284,7 +283,7 @@ #define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_ECC #define CONFIG_SPL_OMAP3_ID_NAND -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" /* NAND boot config */ #define CONFIG_SYS_NAND_5_ADDR_CYCLE diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index a5dc91b3ba..6a5ed196bf 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -20,7 +20,6 @@ #define CONFIG_TI814X #define CONFIG_SYS_NO_FLASH #define CONFIG_OMAP -#define CONFIG_OMAP_COMMON #include <asm/arch/omap.h> @@ -166,7 +165,7 @@ #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" #define CONFIG_SPL_BOARD_INIT diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h index 381e9a3717..5db4c60546 100644 --- a/include/configs/ti816x_evm.h +++ b/include/configs/ti816x_evm.h @@ -14,7 +14,6 @@ #define CONFIG_TI816X #define CONFIG_SYS_NO_FLASH #define CONFIG_OMAP -#define CONFIG_OMAP_COMMON #define CONFIG_ARCH_CPU_INIT @@ -130,7 +129,7 @@ #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" #define CONFIG_SPL_BOARD_INIT diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 7e365aa6c6..cfb4b30da7 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -220,6 +220,8 @@ "set_rd_spec=setenv rd_spec ${rdaddr}:${filesize}\0" \ "init_fw_rd_net=dhcp ${rdaddr} ${tftp_root}/${name_fw_rd}; " \ "run set_rd_spec\0" \ + "init_fw_rd_nfs=nfs ${rdaddr} ${nfs_root}/boot/${name_fw_rd}; " \ + "run set_rd_spec\0" \ "init_fw_rd_ramfs=setenv rd_spec -\0" \ "init_fw_rd_ubi=ubifsload ${rdaddr} ${bootdir}/${name_fw_rd}; " \ "run set_rd_spec\0" \ @@ -228,6 +230,7 @@ "set_name_pmmc=setenv name_pmmc ti-sci-firmware-${soc_variant}.bin\0" \ "dev_pmmc=0\0" \ "get_pmmc_net=dhcp ${loadaddr} ${tftp_root}/${name_pmmc}\0" \ + "get_pmmc_nfs=nfs ${loadaddr} ${nfs_root}/boot/${name_pmmc}\0" \ "get_pmmc_ramfs=run get_pmmc_net\0" \ "get_pmmc_mmc=load mmc ${bootpart} ${loadaddr} " \ "${bootdir}/${name_pmmc}\0" \ diff --git a/include/configs/ti_armv7_omap.h b/include/configs/ti_armv7_omap.h index 7548170afc..6d9d4b2d97 100644 --- a/include/configs/ti_armv7_omap.h +++ b/include/configs/ti_armv7_omap.h @@ -14,7 +14,6 @@ /* Common defines for all OMAP architecture based SoCs */ #define CONFIG_OMAP -#define CONFIG_OMAP_COMMON /* I2C IP block */ #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h index d607f407fd..0ad32353ba 100644 --- a/include/configs/ti_omap3_common.h +++ b/include/configs/ti_omap3_common.h @@ -68,7 +68,7 @@ /* SPL */ #define CONFIG_SPL_TEXT_BASE 0x40200800 -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ (64 << 20)) diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h index 3d2992f737..aa17c09ce9 100644 --- a/include/configs/ti_omap4_common.h +++ b/include/configs/ti_omap4_common.h @@ -148,7 +148,7 @@ * So moving TEXT_BASE down to non-HS limit. */ #define CONFIG_SPL_TEXT_BASE 0x40300000 -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ (128 << 20)) diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index 29b7d96d96..8322f645fe 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -114,7 +114,8 @@ "if test ${dofastboot} -eq 1; then " \ "echo Boot fastboot requested, resetting dofastboot ...;" \ "setenv dofastboot 0; saveenv;" \ - "echo Booting into fastboot ...; fastboot 0;" \ + "echo Booting into fastboot ...; " \ + "fastboot " __stringify(CONFIG_FASTBOOT_USB_DEV) "; " \ "fi;" \ "run findfdt; " \ "run envboot; " \ @@ -157,7 +158,7 @@ #define CONFIG_SPL_TEXT_BASE 0x40300000 #endif -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ (128 << 20)) diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h index fbef1f0e41..07a92ebcf8 100644 --- a/include/configs/tricorder.h +++ b/include/configs/tricorder.h @@ -19,7 +19,6 @@ /* High Level Configuration Options */ #define CONFIG_SYS_THUMB_BUILD #define CONFIG_OMAP /* in a TI OMAP core */ -#define CONFIG_OMAP_COMMON /* Common ARM Erratas */ #define CONFIG_ARM_ERRATA_454179 #define CONFIG_ARM_ERRATA_430973 @@ -315,7 +314,7 @@ #define CONFIG_SPL_NAND_BASE #define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_ECC -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 diff --git a/include/configs/chromebook_jerry.h b/include/configs/veyron.h index b15cc26beb..b15cc26beb 100644 --- a/include/configs/chromebook_jerry.h +++ b/include/configs/veyron.h diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h index ed2c9acdb1..97dfc0e6ec 100644 --- a/include/configs/zipitz2.h +++ b/include/configs/zipitz2.h @@ -49,7 +49,6 @@ * Serial Console Configuration * STUART - the lower serial port on Colibri board */ -#define CONFIG_PXA_SERIAL #define CONFIG_STUART 1 #define CONFIG_CONS_INDEX 2 #define CONFIG_BAUDRATE 115200 diff --git a/include/display.h b/include/display.h index b1c476628b..d0a08d4aaa 100644 --- a/include/display.h +++ b/include/display.h @@ -16,10 +16,12 @@ struct display_timing; * @source_id: ID for the source of the display data, typically a video * controller * @src_dev: Source device providing the video + * @in_use: Display is being used */ struct display_plat { int source_id; struct udevice *src_dev; + bool in_use; }; /** @@ -41,6 +43,14 @@ int display_read_timing(struct udevice *dev, struct display_timing *timing); int display_enable(struct udevice *dev, int panel_bpp, const struct display_timing *timing); +/** + * display_in_use() - Check if a display is in use by any device + * + * @return true if the device is in use (display_enable() has been called + * successfully), else false + */ +bool display_in_use(struct udevice *dev); + struct dm_display_ops { /** * read_timing() - Read information directly diff --git a/include/dm/platform_data/serial_pxa.h b/include/dm/platform_data/serial_pxa.h new file mode 100644 index 0000000000..b19a4a6521 --- /dev/null +++ b/include/dm/platform_data/serial_pxa.h @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2016 Marcel Ziswiler <marcel.ziswiler@toradex.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __SERIAL_PXA_H +#define __SERIAL_PXA_H + +/* + * The numbering scheme differs here for PXA25x, PXA27x and PXA3xx so we can + * easily handle enabling of clock. + */ +#ifdef CONFIG_CPU_MONAHANS +#define UART_CLK_BASE CKENA_21_BTUART +#define UART_CLK_REG CKENA +#define BTUART_INDEX 0 +#define FFUART_INDEX 1 +#define STUART_INDEX 2 +#elif CONFIG_CPU_PXA25X +#define UART_CLK_BASE (1 << 4) /* HWUART */ +#define UART_CLK_REG CKEN +#define HWUART_INDEX 0 +#define STUART_INDEX 1 +#define FFUART_INDEX 2 +#define BTUART_INDEX 3 +#else /* PXA27x */ +#define UART_CLK_BASE CKEN5_STUART +#define UART_CLK_REG CKEN +#define STUART_INDEX 0 +#define FFUART_INDEX 1 +#define BTUART_INDEX 2 +#endif + +/* + * Only PXA250 has HWUART, to avoid poluting the code with more macros, + * artificially introduce this. + */ +#ifndef CONFIG_CPU_PXA25X +#define HWUART_INDEX 0xff +#endif + +/* + * struct pxa_serial_platdata - information about a PXA port + * + * @base: Uart port base register address + * @port: Uart port index, for cpu with pinmux for uart / gpio + * baudrtatre: Uart port baudrate + */ +struct pxa_serial_platdata { + struct pxa_uart_regs *base; + int port; + int baudrate; +}; + +#endif /* __SERIAL_PXA_H */ diff --git a/include/dt-bindings/clock/bcm2835-aux.h b/include/dt-bindings/clock/bcm2835-aux.h new file mode 100644 index 0000000000..d91156e265 --- /dev/null +++ b/include/dt-bindings/clock/bcm2835-aux.h @@ -0,0 +1,17 @@ +/* + * Copyright (C) 2015 Broadcom Corporation + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#define BCM2835_AUX_CLOCK_UART 0 +#define BCM2835_AUX_CLOCK_SPI1 1 +#define BCM2835_AUX_CLOCK_SPI2 2 +#define BCM2835_AUX_CLOCK_COUNT 3 diff --git a/include/dt-bindings/clock/bcm2835.h b/include/dt-bindings/clock/bcm2835.h new file mode 100644 index 0000000000..360e00cefd --- /dev/null +++ b/include/dt-bindings/clock/bcm2835.h @@ -0,0 +1,66 @@ +/* + * Copyright (C) 2015 Broadcom Corporation + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#define BCM2835_PLLA 0 +#define BCM2835_PLLB 1 +#define BCM2835_PLLC 2 +#define BCM2835_PLLD 3 +#define BCM2835_PLLH 4 + +#define BCM2835_PLLA_CORE 5 +#define BCM2835_PLLA_PER 6 +#define BCM2835_PLLB_ARM 7 +#define BCM2835_PLLC_CORE0 8 +#define BCM2835_PLLC_CORE1 9 +#define BCM2835_PLLC_CORE2 10 +#define BCM2835_PLLC_PER 11 +#define BCM2835_PLLD_CORE 12 +#define BCM2835_PLLD_PER 13 +#define BCM2835_PLLH_RCAL 14 +#define BCM2835_PLLH_AUX 15 +#define BCM2835_PLLH_PIX 16 + +#define BCM2835_CLOCK_TIMER 17 +#define BCM2835_CLOCK_OTP 18 +#define BCM2835_CLOCK_UART 19 +#define BCM2835_CLOCK_VPU 20 +#define BCM2835_CLOCK_V3D 21 +#define BCM2835_CLOCK_ISP 22 +#define BCM2835_CLOCK_H264 23 +#define BCM2835_CLOCK_VEC 24 +#define BCM2835_CLOCK_HSM 25 +#define BCM2835_CLOCK_SDRAM 26 +#define BCM2835_CLOCK_TSENS 27 +#define BCM2835_CLOCK_EMMC 28 +#define BCM2835_CLOCK_PERI_IMAGE 29 +#define BCM2835_CLOCK_PWM 30 +#define BCM2835_CLOCK_PCM 31 + +#define BCM2835_PLLA_DSI0 32 +#define BCM2835_PLLA_CCP2 33 +#define BCM2835_PLLD_DSI0 34 +#define BCM2835_PLLD_DSI1 35 + +#define BCM2835_CLOCK_AVEO 36 +#define BCM2835_CLOCK_DFT 37 +#define BCM2835_CLOCK_GP0 38 +#define BCM2835_CLOCK_GP1 39 +#define BCM2835_CLOCK_GP2 40 +#define BCM2835_CLOCK_SLIM 41 +#define BCM2835_CLOCK_SMI 42 +#define BCM2835_CLOCK_TEC 43 +#define BCM2835_CLOCK_DPI 44 +#define BCM2835_CLOCK_CAM0 45 +#define BCM2835_CLOCK_CAM1 46 +#define BCM2835_CLOCK_DSI0E 47 +#define BCM2835_CLOCK_DSI1E 48 diff --git a/include/dt-bindings/pinctrl/bcm2835.h b/include/dt-bindings/pinctrl/bcm2835.h new file mode 100644 index 0000000000..6f0bc37af3 --- /dev/null +++ b/include/dt-bindings/pinctrl/bcm2835.h @@ -0,0 +1,27 @@ +/* + * Header providing constants for bcm2835 pinctrl bindings. + * + * Copyright (C) 2015 Stefan Wahren <stefan.wahren@i2se.com> + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __DT_BINDINGS_PINCTRL_BCM2835_H__ +#define __DT_BINDINGS_PINCTRL_BCM2835_H__ + +/* brcm,function property */ +#define BCM2835_FSEL_GPIO_IN 0 +#define BCM2835_FSEL_GPIO_OUT 1 +#define BCM2835_FSEL_ALT5 2 +#define BCM2835_FSEL_ALT4 3 +#define BCM2835_FSEL_ALT0 4 +#define BCM2835_FSEL_ALT1 5 +#define BCM2835_FSEL_ALT2 6 +#define BCM2835_FSEL_ALT3 7 + +#endif /* __DT_BINDINGS_PINCTRL_BCM2835_H__ */ diff --git a/include/dt-bindings/power/raspberrypi-power.h b/include/dt-bindings/power/raspberrypi-power.h new file mode 100644 index 0000000000..b3ff8e09a7 --- /dev/null +++ b/include/dt-bindings/power/raspberrypi-power.h @@ -0,0 +1,41 @@ +/* + * Copyright © 2015 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _DT_BINDINGS_ARM_BCM2835_RPI_POWER_H +#define _DT_BINDINGS_ARM_BCM2835_RPI_POWER_H + +/* These power domain indices are the firmware interface's indices + * minus one. + */ +#define RPI_POWER_DOMAIN_I2C0 0 +#define RPI_POWER_DOMAIN_I2C1 1 +#define RPI_POWER_DOMAIN_I2C2 2 +#define RPI_POWER_DOMAIN_VIDEO_SCALER 3 +#define RPI_POWER_DOMAIN_VPU1 4 +#define RPI_POWER_DOMAIN_HDMI 5 +#define RPI_POWER_DOMAIN_USB 6 +#define RPI_POWER_DOMAIN_VEC 7 +#define RPI_POWER_DOMAIN_JPEG 8 +#define RPI_POWER_DOMAIN_H264 9 +#define RPI_POWER_DOMAIN_V3D 10 +#define RPI_POWER_DOMAIN_ISP 11 +#define RPI_POWER_DOMAIN_UNICAM0 12 +#define RPI_POWER_DOMAIN_UNICAM1 13 +#define RPI_POWER_DOMAIN_CCP2RX 14 +#define RPI_POWER_DOMAIN_CSI2 15 +#define RPI_POWER_DOMAIN_CPI 16 +#define RPI_POWER_DOMAIN_DSI0 17 +#define RPI_POWER_DOMAIN_DSI1 18 +#define RPI_POWER_DOMAIN_TRANSPOSER 19 +#define RPI_POWER_DOMAIN_CCP2TX 20 +#define RPI_POWER_DOMAIN_CDP 21 +#define RPI_POWER_DOMAIN_ARM 22 + +#define RPI_POWER_DOMAIN_COUNT 23 + +#endif /* _DT_BINDINGS_ARM_BCM2835_RPI_POWER_H */ diff --git a/include/ext4fs.h b/include/ext4fs.h index 965cd9e9c5..bb55639107 100644 --- a/include/ext4fs.h +++ b/include/ext4fs.h @@ -135,7 +135,7 @@ int ext4_write_file(const char *filename, void *buf, loff_t offset, loff_t len, struct ext_filesystem *get_fs(void); int ext4fs_open(const char *filename, loff_t *len); -int ext4fs_read(char *buf, loff_t len, loff_t *actread); +int ext4fs_read(char *buf, loff_t offset, loff_t len, loff_t *actread); int ext4fs_mount(unsigned part_length); void ext4fs_close(void); void ext4fs_reinit_global(void); diff --git a/include/fat.h b/include/fat.h index 8ec91cda75..e38f3808af 100644 --- a/include/fat.h +++ b/include/fat.h @@ -33,6 +33,8 @@ #define FAT16BUFSIZE (FATBUFSIZE/2) #define FAT32BUFSIZE (FATBUFSIZE/4) +/* Maximum number of entry for long file name according to spec */ +#define MAX_LFN_SLOT 20 /* Filesystem identifiers */ #define FAT12_SIGN "FAT12 " diff --git a/include/image.h b/include/image.h index 2b1296c86c..81315959fe 100644 --- a/include/image.h +++ b/include/image.h @@ -1049,7 +1049,9 @@ struct image_sign_info { const char *keyname; /* Name of key to use */ void *fit; /* Pointer to FIT blob */ int node_offset; /* Offset of signature node */ - struct image_sig_algo *algo; /* Algorithm information */ + const char *name; /* Algorithm name */ + struct checksum_algo *checksum; /* Checksum algorithm information */ + struct crypto_algo *crypto; /* Crypto algorithm information */ const void *fdt_blob; /* FDT containing public keys */ int required_keynode; /* Node offset of key to use: -1=any */ const char *require_keys; /* Value for 'required' property */ @@ -1070,18 +1072,19 @@ struct image_region { struct checksum_algo { const char *name; const int checksum_len; - const int pad_len; + const int der_len; + const uint8_t *der_prefix; #if IMAGE_ENABLE_SIGN const EVP_MD *(*calculate_sign)(void); #endif int (*calculate)(const char *name, const struct image_region region[], int region_count, uint8_t *checksum); - const uint8_t *rsa_padding; }; -struct image_sig_algo { +struct crypto_algo { const char *name; /* Name of algorithm */ + const int key_len; /** * sign() - calculate and return signature for given input data @@ -1130,18 +1133,23 @@ struct image_sig_algo { int (*verify)(struct image_sign_info *info, const struct image_region region[], int region_count, uint8_t *sig, uint sig_len); - - /* pointer to checksum algorithm */ - struct checksum_algo *checksum; }; /** - * image_get_sig_algo() - Look up a signature algortihm + * image_get_checksum_algo() - Look up a checksum algorithm + * + * @param full_name Name of algorithm in the form "checksum,crypto" + * @return pointer to algorithm information, or NULL if not found + */ +struct checksum_algo *image_get_checksum_algo(const char *full_name); + +/** + * image_get_crypto_algo() - Look up a cryptosystem algorithm * - * @param name Name of algorithm + * @param full_name Name of algorithm in the form "checksum,crypto" * @return pointer to algorithm information, or NULL if not found */ -struct image_sig_algo *image_get_sig_algo(const char *name); +struct crypto_algo *image_get_crypto_algo(const char *full_name); /** * fit_image_verify_required_sigs() - Verify signatures marked as 'required' diff --git a/include/linux/compat.h b/include/linux/compat.h index c7fd649f5e..533983faff 100644 --- a/include/linux/compat.h +++ b/include/linux/compat.h @@ -15,7 +15,7 @@ struct p_current{ extern struct p_current *current; -#define ndelay(x) udelay(1) +#define ndelay(x) udelay((x) < 1000 ? 1 : (x)/1000) #define dev_dbg(dev, fmt, args...) \ debug(fmt, ##args) diff --git a/include/linux/err.h b/include/linux/err.h index e4d22d508c..22e5756edd 100644 --- a/include/linux/err.h +++ b/include/linux/err.h @@ -36,6 +36,11 @@ static inline long IS_ERR(const void *ptr) return IS_ERR_VALUE((unsigned long)ptr); } +static inline bool IS_ERR_OR_NULL(const void *ptr) +{ + return !ptr || IS_ERR_VALUE((unsigned long)ptr); +} + /** * ERR_CAST - Explicitly cast an error-valued pointer to another pointer type * @ptr: The pointer to cast. diff --git a/include/power/regulator.h b/include/power/regulator.h index f47ab6740b..1a8e5753d7 100644 --- a/include/power/regulator.h +++ b/include/power/regulator.h @@ -261,6 +261,16 @@ int regulator_get_value(struct udevice *dev); int regulator_set_value(struct udevice *dev, int uV); /** + * regulator_set_value_force: set the microvoltage value of a given regulator + * without any min-,max condition check + * + * @dev - pointer to the regulator device + * @uV - the output value to set [micro Volts] + * @return - 0 on success or -errno val if fails + */ +int regulator_set_value_force(struct udevice *dev, int uV); + +/** * regulator_get_current: get microampere value of a given regulator * * @dev - pointer to the regulator device diff --git a/include/spi.h b/include/spi.h index 4c179838ee..deb65efdfb 100644 --- a/include/spi.h +++ b/include/spi.h @@ -30,10 +30,6 @@ #define SPI_RX_DUAL BIT(12) /* receive with 2 wires */ #define SPI_RX_QUAD BIT(13) /* receive with 4 wires */ -/* SPI bus connection options - see enum spi_dual_flash */ -#define SPI_CONN_DUAL_SHARED (1 << 0) -#define SPI_CONN_DUAL_SEPARATED (1 << 1) - /* Header byte that marks the start of the message */ #define SPI_PREAMBLE_END_BYTE 0xec @@ -93,7 +89,6 @@ struct dm_spi_slave_platdata { * @max_write_size: If non-zero, the maximum number of bytes which can * be written at once, excluding command bytes. * @memory_map: Address of read-only SPI flash access. - * @option: Varies SPI bus options - separate, shared bus. * @flags: Indication of SPI flags. */ struct spi_slave { @@ -117,7 +112,6 @@ struct spi_slave { #define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END) #define SPI_XFER_MMAP BIT(2) /* Memory Mapped start */ #define SPI_XFER_MMAP_END BIT(3) /* Memory Mapped End */ -#define SPI_XFER_U_PAGE BIT(4) }; /** diff --git a/include/u-boot/rsa-checksum.h b/include/u-boot/rsa-checksum.h index 3c69d85ecb..c240720249 100644 --- a/include/u-boot/rsa-checksum.h +++ b/include/u-boot/rsa-checksum.h @@ -12,10 +12,6 @@ #include <u-boot/sha1.h> #include <u-boot/sha256.h> -extern const uint8_t padding_sha256_rsa4096[]; -extern const uint8_t padding_sha256_rsa2048[]; -extern const uint8_t padding_sha1_rsa2048[]; - /** * hash_calculate() - Calculate hash over the data * diff --git a/include/u-boot/sha1.h b/include/u-boot/sha1.h index b0d9ce9db9..2634a29c20 100644 --- a/include/u-boot/sha1.h +++ b/include/u-boot/sha1.h @@ -21,6 +21,9 @@ extern "C" { #define SHA1_SUM_POS -0x20 #define SHA1_SUM_LEN 20 +#define SHA1_DER_LEN 15 + +extern const uint8_t sha1_der_prefix[]; /** * \brief SHA-1 context structure diff --git a/include/u-boot/sha256.h b/include/u-boot/sha256.h index beadab35ff..9aa1251789 100644 --- a/include/u-boot/sha256.h +++ b/include/u-boot/sha256.h @@ -2,6 +2,9 @@ #define _SHA256_H #define SHA256_SUM_LEN 32 +#define SHA256_DER_LEN 19 + +extern const uint8_t sha256_der_prefix[]; /* Reset watchdog each time we process this many bytes */ #define CHUNKSZ_SHA256 (64 * 1024) |