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-rw-r--r--include/configs/T208xQDS.h1
-rw-r--r--include/configs/ls1012a2g5rdb.h2
-rw-r--r--include/configs/ls1012a_common.h10
-rw-r--r--include/configs/ls1012afrdm.h2
-rw-r--r--include/configs/ls1012afrwy.h2
-rw-r--r--include/configs/ls1012ardb.h2
-rw-r--r--include/configs/ls1028a_common.h3
-rw-r--r--include/configs/ls1028ardb.h4
-rw-r--r--include/configs/ls1043a_common.h5
-rw-r--r--include/configs/ls1046a_common.h3
-rw-r--r--include/configs/ls1088a_common.h2
-rw-r--r--include/configs/ls1088ardb.h1
-rw-r--r--include/configs/ls2080a_common.h2
-rw-r--r--include/configs/lx2160a_common.h2
-rw-r--r--include/fsl_dspi.h1
-rw-r--r--include/fsl_esdhc.h4
-rw-r--r--include/fsl_sec.h61
-rw-r--r--include/init.h1
18 files changed, 73 insertions, 35 deletions
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index f32e6680b3..b502b0b138 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -632,7 +632,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#define CONFIG_FSL_ESDHC_ADAPTER_IDENT
#endif
/*
diff --git a/include/configs/ls1012a2g5rdb.h b/include/configs/ls1012a2g5rdb.h
index 86cc4b6d30..bbc3ffd7f0 100644
--- a/include/configs/ls1012a2g5rdb.h
+++ b/include/configs/ls1012a2g5rdb.h
@@ -33,7 +33,6 @@
#undef CONFIG_EXTRA_ENV_SETTINGS
#define CONFIG_EXTRA_ENV_SETTINGS \
"verify=no\0" \
- "fdt_high=0xffffffffffffffff\0" \
"initrd_high=0xffffffffffffffff\0" \
"fdt_addr=0x00f00000\0" \
"kernel_addr=0x01000000\0" \
@@ -47,6 +46,7 @@
"load_addr=0xa0000000\0" \
"kernel_size=0x2800000\0" \
"kernelheader_size=0x40000\0" \
+ "bootm_size=0x10000000\0" \
"console=ttyS0,115200\0" \
BOOTENV \
"boot_scripts=ls1012ardb_boot.scr\0" \
diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h
index 3bea9a9186..6cf6a31d76 100644
--- a/include/configs/ls1012a_common.h
+++ b/include/configs/ls1012a_common.h
@@ -10,6 +10,7 @@
#include <asm/arch/config.h>
#include <asm/arch/stream_id_lsch2.h>
+#include <linux/sizes.h>
#define CONFIG_SYS_CLK_FREQ 125000000
@@ -34,10 +35,13 @@
#define CONFIG_LAYERSCAPE_NS_ACCESS
/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
+#define CONFIG_SYS_MALLOC_LEN (5 * SZ_1M)
-/*SPI device */
+/* PFE */
#define CONFIG_SYS_FMAN_FW_ADDR 0x400d0000
+#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x300000
+
+/*SPI device */
#define CONFIG_SYS_FSL_QSPI_BASE 0x40000000
/* SATA */
@@ -83,11 +87,11 @@
"verify=no\0" \
"loadaddr=0x80100000\0" \
"kernel_addr=0x100000\0" \
- "fdt_high=0xffffffffffffffff\0" \
"initrd_high=0xffffffffffffffff\0" \
"kernel_start=0x1000000\0" \
"kernel_load=0xa0000000\0" \
"kernel_size=0x2800000\0" \
+ "bootm_size=0x10000000\0" \
#undef CONFIG_BOOTCOMMAND
#ifdef CONFIG_TFABOOT
diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h
index f8cb97bd12..8de20e3ff4 100644
--- a/include/configs/ls1012afrdm.h
+++ b/include/configs/ls1012afrdm.h
@@ -24,7 +24,6 @@
#define CONFIG_EXTRA_ENV_SETTINGS \
"verify=no\0" \
"fdt_high=0xffffffffffffffff\0" \
- "initrd_high=0xffffffffffffffff\0" \
"fdt_addr=0x00f00000\0" \
"kernel_addr=0x01000000\0" \
"scriptaddr=0x80000000\0" \
@@ -34,6 +33,7 @@
"fdt_addr_r=0x90000000\0" \
"load_addr=0x96000000\0" \
"kernel_size=0x2800000\0" \
+ "bootm_size=0x10000000\0" \
"console=ttyS0,115200\0" \
BOOTENV \
"boot_scripts=ls1012afrdm_boot.scr\0" \
diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h
index 2e20e11377..29c344c63a 100644
--- a/include/configs/ls1012afrwy.h
+++ b/include/configs/ls1012afrwy.h
@@ -45,7 +45,6 @@
#undef CONFIG_EXTRA_ENV_SETTINGS
#define CONFIG_EXTRA_ENV_SETTINGS \
"verify=no\0" \
- "fdt_high=0xffffffffffffffff\0" \
"initrd_high=0xffffffffffffffff\0" \
"fdt_addr=0x00f00000\0" \
"kernel_addr=0x01000000\0" \
@@ -65,6 +64,7 @@
"load_addr=0x92000000\0" \
"kernel_size=0x2800000\0" \
"kernelheader_size=0x40000\0" \
+ "bootm_size=0x10000000\0" \
"console=ttyS0,115200\0" \
"BOARD=ls1012afrwy\0" \
BOOTENV \
diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h
index 7eb1ec9366..94e742ee84 100644
--- a/include/configs/ls1012ardb.h
+++ b/include/configs/ls1012ardb.h
@@ -51,7 +51,6 @@
#undef CONFIG_EXTRA_ENV_SETTINGS
#define CONFIG_EXTRA_ENV_SETTINGS \
"verify=no\0" \
- "fdt_high=0xffffffffffffffff\0" \
"initrd_high=0xffffffffffffffff\0" \
"fdt_addr=0x00f00000\0" \
"kernel_addr=0x01000000\0" \
@@ -65,6 +64,7 @@
"load_addr=0xa0000000\0" \
"kernel_size=0x2800000\0" \
"kernelheader_size=0x40000\0" \
+ "bootm_size=0x10000000\0" \
"console=ttyS0,115200\0" \
BOOTENV \
"boot_scripts=ls1012ardb_boot.scr\0" \
diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h
index d184673a71..4863fb2b64 100644
--- a/include/configs/ls1028a_common.h
+++ b/include/configs/ls1028a_common.h
@@ -7,7 +7,6 @@
#define __L1028A_COMMON_H
#define CONFIG_REMAKE_ELF
-#define CONFIG_FSL_LAYERSCAPE
#define CONFIG_MP
#include <asm/arch/stream_id_lsch3.h>
@@ -29,7 +28,7 @@
/*
* SMP Definitinos
*/
-#define CPU_RELEASE_ADDR secondary_boot_func
+#define CPU_RELEASE_ADDR secondary_boot_addr
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 25000000 /* 25MHz */
diff --git a/include/configs/ls1028ardb.h b/include/configs/ls1028ardb.h
index 0745011326..e6f38f5d00 100644
--- a/include/configs/ls1028ardb.h
+++ b/include/configs/ls1028ardb.h
@@ -38,10 +38,10 @@
#define QIXIS_LBMAP_ALTBANK 0x00
#define QIXIS_LBMAP_SD 0x00
#define QIXIS_LBMAP_EMMC 0x00
-#define QIXIS_LBMAP_QSPI 0x00
+#define QIXIS_LBMAP_XSPI 0x00
#define QIXIS_RCW_SRC_SD 0xf8
#define QIXIS_RCW_SRC_EMMC 0xf9
-#define QIXIS_RCW_SRC_QSPI 0xff
+#define QIXIS_RCW_SRC_XSPI 0xff
#define QIXIS_RST_CTL_RESET 0x31
#define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x10
#define QIXIS_RCFG_CTL_RECONFIG_START 0x11
diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index 3efac1fa78..96fdd6417e 100644
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2015 Freescale Semiconductor
- * Copyright (C) 2019 NXP
+ * Copyright 2019-2020 NXP
*/
#ifndef __LS1043A_COMMON_H
@@ -47,7 +47,7 @@
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL
-#define CPU_RELEASE_ADDR secondary_boot_func
+#define CPU_RELEASE_ADDR secondary_boot_addr
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 25000000 /* 25MHz */
@@ -144,7 +144,6 @@
/* I2C */
#ifndef CONFIG_DM_I2C
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index 8fe6937dfb..d44a7f105e 100644
--- a/include/configs/ls1046a_common.h
+++ b/include/configs/ls1046a_common.h
@@ -48,7 +48,7 @@
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL
-#define CPU_RELEASE_ADDR secondary_boot_func
+#define CPU_RELEASE_ADDR secondary_boot_addr
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 25000000 /* 25MHz */
@@ -129,7 +129,6 @@
/* I2C */
#ifndef CONFIG_DM_I2C
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h
index 3ea16752de..5b83e61ab2 100644
--- a/include/configs/ls1088a_common.h
+++ b/include/configs/ls1088a_common.h
@@ -48,7 +48,7 @@
/*
* SMP Definitinos
*/
-#define CPU_RELEASE_ADDR secondary_boot_func
+#define CPU_RELEASE_ADDR secondary_boot_addr
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2048 * 1024)
diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h
index 16e0486d40..28a458772d 100644
--- a/include/configs/ls1088ardb.h
+++ b/include/configs/ls1088ardb.h
@@ -524,6 +524,7 @@
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0) \
+ func(USB, usb, 0) \
func(SCSI, scsi, 0) \
func(DHCP, dhcp, na)
#include <config_distro_bootcmd.h>
diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index 410872dfd8..d93ff291bd 100644
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -42,7 +42,7 @@
/*
* SMP Definitinos
*/
-#define CPU_RELEASE_ADDR secondary_boot_func
+#define CPU_RELEASE_ADDR secondary_boot_addr
#define CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
#ifdef CONFIG_SYS_FSL_HAS_DP_DDR
diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h
index 9bc287f7aa..0c3d683551 100644
--- a/include/configs/lx2160a_common.h
+++ b/include/configs/lx2160a_common.h
@@ -52,7 +52,7 @@
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
/* SMP Definitinos */
-#define CPU_RELEASE_ADDR secondary_boot_func
+#define CPU_RELEASE_ADDR secondary_boot_addr
/* Generic Timer Definitions */
/*
diff --git a/include/fsl_dspi.h b/include/fsl_dspi.h
index 114f63bce3..4fec83549e 100644
--- a/include/fsl_dspi.h
+++ b/include/fsl_dspi.h
@@ -94,6 +94,7 @@ struct dspi {
#define DSPI_CTAR_ASC(x) (((x) & 0x0F) << 8)
#define DSPI_CTAR_DT(x) (((x) & 0x0F) << 4)
#define DSPI_CTAR_BR(x) ((x) & 0x0F)
+#define DSPI_CTAR_SCALE_BITS 0xf
/* Status */
#define DSPI_SR_TCF 0x80000000
diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h
index 2615d1ad2f..7f8f8edc62 100644
--- a/include/fsl_esdhc.h
+++ b/include/fsl_esdhc.h
@@ -16,10 +16,6 @@
/* needed for the mmc_cfg definition */
#include <mmc.h>
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
-#include "../board/freescale/common/qixis.h"
-#endif
-
/* FSL eSDHC-specific constants */
#define SYSCTL 0x0002e02c
#define SYSCTL_INITA 0x08000000
diff --git a/include/fsl_sec.h b/include/fsl_sec.h
index c0d2c7e866..1c6f1eb23e 100644
--- a/include/fsl_sec.h
+++ b/include/fsl_sec.h
@@ -65,14 +65,49 @@ struct rng4tst {
u32 rtfreqcnt; /* PRGM=0: freq. count register */
};
u32 rsvd1[40];
-#define RNG_STATE0_HANDLE_INSTANTIATED 0x00000001
-#define RNG_STATE1_HANDLE_INSTANTIATED 0x00000002
-#define RNG_STATE_HANDLE_MASK \
- (RNG_STATE0_HANDLE_INSTANTIATED | RNG_STATE1_HANDLE_INSTANTIATED)
+#define RDSTA_IF(idx) (0x00000001 << (idx))
+#define RDSTA_PR(idx) (0x00000010 << (idx))
+#define RDSTA_MASK (RDSTA_PR(1) | RDSTA_PR(0) | RDSTA_IF(1) | RDSTA_IF(0))
+#define RDSTA_SKVN 0x40000000
u32 rdsta; /*RNG DRNG Status Register*/
u32 rsvd2[15];
};
+/* Version registers (Era 10+) */
+struct version_regs {
+ u32 crca; /* CRCA_VERSION */
+ u32 afha; /* AFHA_VERSION */
+ u32 kfha; /* KFHA_VERSION */
+ u32 pkha; /* PKHA_VERSION */
+ u32 aesa; /* AESA_VERSION */
+ u32 mdha; /* MDHA_VERSION */
+ u32 desa; /* DESA_VERSION */
+ u32 snw8a; /* SNW8A_VERSION */
+ u32 snw9a; /* SNW9A_VERSION */
+ u32 zuce; /* ZUCE_VERSION */
+ u32 zuca; /* ZUCA_VERSION */
+ u32 ccha; /* CCHA_VERSION */
+ u32 ptha; /* PTHA_VERSION */
+ u32 rng; /* RNG_VERSION */
+ u32 trng; /* TRNG_VERSION */
+ u32 aaha; /* AAHA_VERSION */
+ u32 rsvd[10];
+ u32 sr; /* SR_VERSION */
+ u32 dma; /* DMA_VERSION */
+ u32 ai; /* AI_VERSION */
+ u32 qi; /* QI_VERSION */
+ u32 jr; /* JR_VERSION */
+ u32 deco; /* DECO_VERSION */
+};
+
+#define CHA_VER_NUM_MASK 0x000000ff
+#define CHA_VER_MISC_SHIFT 8
+#define CHA_VER_MISC_MASK 0x0000ff00
+#define CHA_VER_REV_SHIFT 16
+#define CHA_VER_REV_MASK 0x00ff0000
+#define CHA_VER_VID_SHIFT 24
+#define CHA_VER_VID_MASK 0xff000000
+
typedef struct ccsr_sec {
u32 res0;
u32 mcfgr; /* Master CFG Register */
@@ -98,17 +133,19 @@ typedef struct ccsr_sec {
u32 drr; /* DECO Reset Register */
u8 res5[0x4d8];
struct rng4tst rng; /* RNG Registers */
- u8 res6[0x8a0];
+ u8 res6[0x780];
+ struct version_regs vreg; /* version registers since era 10 */
+ u8 res7[0xa0];
u32 crnr_ms; /* CHA Revision Number Register, MS */
u32 crnr_ls; /* CHA Revision Number Register, LS */
u32 ctpr_ms; /* Compile Time Parameters Register, MS */
u32 ctpr_ls; /* Compile Time Parameters Register, LS */
- u8 res7[0x10];
+ u8 res8[0x10];
u32 far_ms; /* Fault Address Register, MS */
u32 far_ls; /* Fault Address Register, LS */
u32 falr; /* Fault Address LIODN Register */
u32 fadr; /* Fault Address Detail Register */
- u8 res8[0x4];
+ u8 res9[0x4];
u32 csta; /* CAAM Status Register */
u32 smpart; /* Secure Memory Partition Parameters */
u32 smvid; /* Secure Memory Version ID */
@@ -121,16 +158,16 @@ typedef struct ccsr_sec {
u32 secvid_ms; /* SEC Version ID Register, MS */
u32 secvid_ls; /* SEC Version ID Register, LS */
#if defined(CONFIG_FSL_LSCH2) || defined(CONFIG_FSL_LSCH3)
- u8 res9[0x6f020];
+ u8 res10[0x6f020];
#else
- u8 res9[0x6020];
+ u8 res10[0x6020];
#endif
u32 qilcr_ms; /* Queue Interface LIODN CFG Register, MS */
u32 qilcr_ls; /* Queue Interface LIODN CFG Register, LS */
#if defined(CONFIG_FSL_LSCH2) || defined(CONFIG_FSL_LSCH3)
- u8 res10[0x8ffd8];
+ u8 res11[0x8ffd8];
#else
- u8 res10[0x8fd8];
+ u8 res11[0x8fd8];
#endif
} ccsr_sec_t;
@@ -316,6 +353,8 @@ int blob_dek(const u8 *src, u8 *dst, u8 len);
int sec_init_idx(uint8_t);
#endif
int sec_init(void);
+
+u8 caam_get_era(void);
#endif
#endif /* __FSL_SEC_H */
diff --git a/include/init.h b/include/init.h
index e727031514..de408baf89 100644
--- a/include/init.h
+++ b/include/init.h
@@ -213,6 +213,7 @@ int set_cpu_clk_info(void);
int update_flash_size(int flash_size);
int arch_early_init_r(void);
void pci_init(void);
+void pci_ep_init(void);
int misc_init_r(void);
#if defined(CONFIG_VID)
int init_func_vid(void);
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